vriscv

efbf73f6b5 lrw/scw reservation master vhaudiquet 2023-12-20 10:43:17 +0100
9dd57071ce Updated README vhaudiquet 2023-11-07 13:16:00 +0100
c8fbd9f4da Added LICENSE vhaudiquet 2023-11-07 12:29:46 +0100
3e110a82f4 Added MULH test vhaudiquet 2023-11-03 17:19:00 +0100
de202e25b9 Updated README vhaudiquet 2023-11-03 16:36:21 +0100
e9cc295470 Fixed tests using sbi shutdown vhaudiquet 2023-11-03 16:35:08 +0100
b5cf188c0a Makefile: Changed clean rule, fixed dep vhaudiquet 2023-11-03 16:14:03 +0100
923e9d39a0 Better exception/interrupt handle vhaudiquet 2023-11-03 11:25:58 +0100
0983be511c Comments on makefile vhaudiquet 2023-11-03 11:22:28 +0100
c423e6a2aa Makefile can now build linux/bbl vhaudiquet 2023-11-02 18:54:57 +0100
d6af840ed1 CSR: sie=mie, sip=mip vhaudiquet 2023-10-24 00:36:39 +0200
6330104873 CSR: SSTATUS=MSTATUS vhaudiquet 2023-10-24 00:22:33 +0200
2d33e50074 Define CSR STATUS bits, std functions on exception vhaudiquet 2023-10-24 00:19:10 +0200
cf8a1de199 gdbstub on bp, unreachable, previous privilege S vhaudiquet 2023-10-23 17:54:49 +0200
b57739fe38 Hardened MMU permission checks vhaudiquet 2023-10-23 17:52:21 +0200
07f683dc41 Hardened memory bounds check vhaudiquet 2023-10-23 17:52:09 +0200
71f3fbc8b5 Refactor CPU mutex code vhaudiquet 2023-10-22 19:30:42 +0200
02114ea7d8 Multiple cleanups and improvements - Cleanup exception trigger code - Cleanup division to divide by 0 - Cleanup SRET code - Cleanup CSR code - Added interrupts - Added TIMER interrupt vhaudiquet 2023-10-22 19:20:52 +0200
a0935f0aad ELF: added support for SHT_RISCV_ATTRIBUTES seg vhaudiquet 2023-10-20 16:14:01 +0200
326b52ef86 Added CSR_TIME support vhaudiquet 2023-10-20 16:04:57 +0200
256a56f70e Added CSRRSI vhaudiquet 2023-10-20 12:17:41 +0200
608dbba6a0 ebreak now generates BREAKPOINT vhaudiquet 2023-10-20 12:16:17 +0200
b3f915dcb5 CPU privilege modes vhaudiquet 2023-10-20 12:02:50 +0200
082d2dcd4f Added mock SBI_EXTENSION_TIMER vhaudiquet 2023-10-20 11:28:12 +0200
bdc091aab2 Fixed SBI base extension implementation vhaudiquet 2023-10-20 11:14:38 +0200
dcdebcd8e4 Added memory access type for mmu vhaudiquet 2023-10-20 09:58:10 +0200
5bb973e8da Added MMU vhaudiquet 2023-10-19 21:00:12 +0200
9da9b5045f Added SBI functions support vhaudiquet 2023-10-19 20:56:18 +0200
3f6657fe00 Removed logs vhaudiquet 2023-10-19 20:55:36 +0200
ce89df1ed4 Added noreturn, removed logs vhaudiquet 2023-10-19 20:55:27 +0200
5727356559 Added SBI functions vhaudiquet 2023-10-19 16:18:05 +0200
b1a327cccf Added FIXME messages for mulh vhaudiquet 2023-10-19 13:29:10 +0200
a76c9e5e5c Added supervisor level ids vhaudiquet 2023-10-17 15:50:12 +0200
6c5e3fcc32 Added CSRRC/CSRRCI vhaudiquet 2023-10-17 13:28:49 +0200
c404defb42 Added resource, fixed memaccess vhaudiquet 2023-10-17 13:25:31 +0200
43d22052e5 Fix GDB bug (ooops) vhaudiquet 2023-10-13 21:57:55 +0200
c286beb1e1 Changed SW/LW test vhaudiquet 2023-10-12 18:16:28 +0200
9742c89270 Added CSRRWI support vhaudiquet 2023-10-11 21:58:44 +0200
7fbfae1081 UART as MMIO device vhaudiquet 2023-10-11 21:30:57 +0200
58b4bdb1e6 Memory interface is now MMIO-capable vhaudiquet 2023-10-11 21:30:46 +0200
d7e684ad91 Added basic SBI support vhaudiquet 2023-10-11 19:48:01 +0200
31941c0813 MRET jump support vhaudiquet 2023-10-11 19:25:06 +0200
c421595a95 Added MRET/SRET mock support vhaudiquet 2023-10-11 18:37:52 +0200
9e895e9032 Change WFI behavior : halt simulation vhaudiquet 2023-10-11 17:35:32 +0200
13f7f21b49 Added CSRRW/CSRRS basic support For now we allow all write/read in all CSR (just an array) vhaudiquet 2023-10-10 11:06:53 +0200
948ff6493b Added messages for privileged instructions vhaudiquet 2023-10-09 21:49:10 +0200
12c05b4879 Added resource in README vhaudiquet 2023-10-09 19:48:12 +0200
66c89d8630 Bugfix JAL, print enhance vhaudiquet 2023-10-09 15:18:54 +0200
a62148255e Added negative offset case for JALR vhaudiquet 2023-10-09 14:51:42 +0200
1c1b6a7ac0 Added JAL negative case vhaudiquet 2023-10-09 14:38:19 +0200
7f3efb092c Changed jalr test vhaudiquet 2023-10-09 00:20:27 +0200
44a917b398 gdbstub: added REUSEADDR/PORT and socket closing vhaudiquet 2023-10-08 23:52:26 +0200
c3fa088a38 Added 'trace' option vhaudiquet 2023-10-08 22:54:09 +0200
e7b521c589 Added BLT unit test vhaudiquet 2023-10-08 22:50:42 +0200
72dda9aaeb Added unit testing vhaudiquet 2023-10-08 21:50:06 +0200
ce1729d5b1 better printing vhaudiquet 2023-10-08 21:49:23 +0200
cdf2ed883a Added non-debug ebreak intercept vhaudiquet 2023-10-08 20:16:10 +0200
21c85d0bec better printing vhaudiquet 2023-10-08 19:09:12 +0200
980070b204 correct ebreak implementation, gdbstub watcher everything in gdb should work now :) vhaudiquet 2023-10-08 19:04:25 +0200
89da4e56bb fix mutex aquire order vhaudiquet 2023-10-08 18:28:08 +0200
f52699a8bf Multithread gdbstub and execution, with cont/halt vhaudiquet 2023-10-08 17:42:44 +0200
a10f56446a CPU simulation in another thread vhaudiquet 2023-10-08 17:07:24 +0200
f2c573bfc6 Make CPU and memory thread-safe vhaudiquet 2023-10-08 16:50:57 +0200
c878dee7e0 Make CPU code thread safe vhaudiquet 2023-10-08 16:40:03 +0200
afc68c1c96 gdbstub: implemented 'm' 'M' memory commands vhaudiquet 2023-10-08 16:11:41 +0200
629fa5fc56 gdbstub: ctrl-c command support vhaudiquet 2023-10-08 15:15:34 +0200
6b9e5c766b rv32cpu: allocated with calloc (for debug) vhaudiquet 2023-10-08 14:09:20 +0200
cb98752b67 gdbstub: implemented G command vhaudiquet 2023-10-08 14:09:06 +0200
43629abbd4 GDBstub base implementation (gdb is happy) vhaudiquet 2023-10-08 13:02:50 +0200
c466d7d175 Fix J decode wrong immediate TODO recheck maybe vhaudiquet 2023-10-06 12:13:08 +0200
5b020b0444 Added mock gdbstub implementation vhaudiquet 2023-10-05 23:04:59 +0200
378d0fa463 Added M (Multiplication) extension vhaudiquet 2023-10-05 22:34:08 +0200
89744626a7 Better print :) vhaudiquet 2023-10-05 21:48:59 +0200
0adbd15225 Fix wrong OPCODEs for OR/AND vhaudiquet 2023-10-05 21:02:15 +0200
bb1427f77b Fix JALR implementation (rd=rs1 edge case) vhaudiquet 2023-10-05 20:55:48 +0200
57dfd9cb76 Fix branch signextend + offset vhaudiquet 2023-10-05 20:50:11 +0200
24ca9532d4 Added A (Atomic) extension vhaudiquet 2023-10-05 20:39:50 +0200
1b068529c8 ZICSR mock implementation vhaudiquet 2023-10-05 19:52:59 +0200
ad3ec2e504 Debugging instructions (system mostly) vhaudiquet 2023-10-05 11:16:06 +0200
981c35584c Initial commit Added base code, can run ELF files and simulate RV32I instructions vhaudiquet 2023-10-04 21:28:18 +0200

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