Added M (Multiplication) extension
This commit is contained in:
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89744626a7
commit
378d0fa463
@ -64,18 +64,33 @@
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#define FUNC7_SRAI 0x20
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/* OPCODE_ARITHLOG sub functions (func3 + func7) */
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#define FUNC3_ADD_SUB 0x0
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#define FUNC3_ADD_SUB_MUL 0x0
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#define FUNC7_ADD 0x0
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#define FUNC7_SUB 0x20
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#define FUNC3_SLL 0x1
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#define FUNC3_SLT 0x2
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#define FUNC3_SLTU 0x3
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#define FUNC3_XOR 0x4
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#define FUNC3_SRL_SRA 0x5
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#define FUNC3_SLL_MULH 0x1
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#define FUNC7_SLL 0x0
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#define FUNC3_SLT_MULHSU 0x2
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#define FUNC7_SLT 0x0
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#define FUNC3_SLTU_MULHU 0x3
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#define FUNC7_SLTU 0x0
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#define FUNC3_XOR_DIV 0x4
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#define FUNC7_XOR 0x0
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#define FUNC3_SRL_SRA_DIVU 0x5
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#define FUNC7_SRL 0x0
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#define FUNC7_SRA 0x20
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#define FUNC3_OR 0x6
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#define FUNC3_AND 0x7
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#define FUNC3_OR_REM 0x6
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#define FUNC7_OR 0x0
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#define FUNC3_AND_REMU 0x7
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#define FUNC7_AND 0x0
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/* RISC-V RV32 M Extension */
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#define FUNC7_MUL 0x1
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#define FUNC7_MULH 0x1
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#define FUNC7_MULHSU 0x1
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#define FUNC7_MULHU 0x1
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#define FUNC7_DIV 0x1
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#define FUNC7_DIVU 0x1
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#define FUNC7_REM 0x1
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#define FUNC7_REMU 0x1
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/* OPCODE_SYSTEM sub functions (func3 + imm) */
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#define FUNC3_ECALL_EBREAK 0x0
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@ -339,7 +339,7 @@ static void cpu_execute(rv32_cpu_t* cpu, instruction_t* instruction)
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// To find out which operation, we must analyse func3 and func7
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switch(instruction->func3)
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{
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case FUNC3_ADD_SUB:
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case FUNC3_ADD_SUB_MUL:
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switch(instruction->func7)
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{
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case FUNC7_ADD:
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@ -348,41 +348,122 @@ static void cpu_execute(rv32_cpu_t* cpu, instruction_t* instruction)
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case FUNC7_SUB:
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] - cpu->regs.x[instruction->rs2];
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break;
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case FUNC7_MUL:
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cpu->regs.x[instruction->rd] = (uint32_t) (cpu->regs.x[instruction->rs1] * cpu->regs.x[instruction->rs2]);
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break;
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default:
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog ADD/SUB instruction, could not execute\n", instruction->func7);
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog ADD/SUB/MUL instruction, could not execute\n", instruction->func7);
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exit(EXIT_FAILURE);
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break;
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}
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break;
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case FUNC3_SLL:
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// Slide Left Logical
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uint32_t sll_value = cpu->regs.x[instruction->rs2] & 0x1F;
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] << sll_value;
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case FUNC3_SLL_MULH:
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switch(instruction->func7)
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{
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case FUNC7_SLL:
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// Slide Left Logical
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uint32_t sll_value = cpu->regs.x[instruction->rs2] & 0x1F;
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] << sll_value;
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break;
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case FUNC7_MULH:
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// MULtiplication High (32 high bits) (signed * signed)
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uint64_t mulh_result = (uint64_t) (((int64_t) cpu->regs.x[instruction->rs1]) * ((int64_t) cpu->regs.x[instruction->rs2]));
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cpu->regs.x[instruction->rd] = (uint32_t) (mulh_result >> 32);
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break;
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default:
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog SLL/MULH instruction, could not execute\n", instruction->func7);
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exit(EXIT_FAILURE);
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break;
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}
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break;
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case FUNC3_SLT:
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// Set Less Than
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if(((int32_t) cpu->regs.x[instruction->rs1]) < ((int32_t) cpu->regs.x[instruction->rs2]))
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cpu->regs.x[instruction->rd] = 1;
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else
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cpu->regs.x[instruction->rd] = 0;
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case FUNC3_SLT_MULHSU:
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switch(instruction->func7)
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{
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case FUNC7_SLT:
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// Set Less Than
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if(((int32_t) cpu->regs.x[instruction->rs1]) < ((int32_t) cpu->regs.x[instruction->rs2]))
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cpu->regs.x[instruction->rd] = 1;
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else
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cpu->regs.x[instruction->rd] = 0;
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break;
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case FUNC7_MULHSU:
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// MULtiplication High (32 high bits) (signed * unsigned)
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uint64_t mulhsu_result = (uint64_t) (((int64_t) cpu->regs.x[instruction->rs1]) * ((uint64_t) cpu->regs.x[instruction->rs2]));
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cpu->regs.x[instruction->rd] = (uint32_t) (mulhsu_result >> 32);
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break;
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default:
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog SLL/MULH instruction, could not execute\n", instruction->func7);
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exit(EXIT_FAILURE);
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break;
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}
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break;
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case FUNC3_SLTIU:
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// Set Less Than Unsigned
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if(cpu->regs.x[instruction->rs1] < cpu->regs.x[instruction->rs2])
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cpu->regs.x[instruction->rd] = 1;
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else
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cpu->regs.x[instruction->rd] = 0;
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case FUNC3_SLTU_MULHU:
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switch(instruction->func7)
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{
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case FUNC7_SLTU:
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// Set Less Than Unsigned
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if(cpu->regs.x[instruction->rs1] < cpu->regs.x[instruction->rs2])
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cpu->regs.x[instruction->rd] = 1;
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else
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cpu->regs.x[instruction->rd] = 0;
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break;
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case FUNC7_MULHU:
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// MULtiplication High (32 high bits) (unsigned * unsigned)
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uint64_t mulhu_result = (((uint64_t) cpu->regs.x[instruction->rs1]) * ((uint64_t) cpu->regs.x[instruction->rs2]));
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cpu->regs.x[instruction->rd] = (uint32_t) (mulhu_result >> 32);
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break;
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default:
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog SLTU/MULHU instruction, could not execute\n", instruction->func7);
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exit(EXIT_FAILURE);
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break;
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}
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break;
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case FUNC3_XOR:
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] ^ cpu->regs.x[instruction->rs2];
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case FUNC3_XOR_DIV:
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switch(instruction->func7)
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{
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case FUNC7_XOR:
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] ^ cpu->regs.x[instruction->rs2];
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break;
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case FUNC7_DIV:
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cpu->regs.x[instruction->rd] = ((int32_t) cpu->regs.x[instruction->rs1]) / ((int32_t) cpu->regs.x[instruction->rs2]);
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break;
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default:
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog XOR/DIV instruction, could not execute\n", instruction->func7);
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exit(EXIT_FAILURE);
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break;
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}
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break;
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case FUNC3_OR:
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] | cpu->regs.x[instruction->rs2];
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case FUNC3_OR_REM:
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switch(instruction->func7)
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{
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case FUNC7_OR:
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] | cpu->regs.x[instruction->rs2];
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break;
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case FUNC7_REM:
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cpu->regs.x[instruction->rd] = ((int32_t) cpu->regs.x[instruction->rs1]) % ((int32_t) cpu->regs.x[instruction->rs2]);
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break;
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default:
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog OR/REM instruction, could not execute\n", instruction->func7);
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exit(EXIT_FAILURE);
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break;
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}
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break;
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case FUNC3_AND:
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] & cpu->regs.x[instruction->rs2];
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case FUNC3_AND_REMU:
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switch(instruction->func7)
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{
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case FUNC7_AND:
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] & cpu->regs.x[instruction->rs2];
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break;
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case FUNC7_REMU:
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] % cpu->regs.x[instruction->rs2];
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break;
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default:
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog AND/REMU instruction, could not execute\n", instruction->func7);
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exit(EXIT_FAILURE);
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break;
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}
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break;
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case FUNC3_SRL_SRA:
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case FUNC3_SRL_SRA_DIVU:
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switch(instruction->func7)
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{
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case FUNC7_SRL:
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@ -395,8 +476,11 @@ static void cpu_execute(rv32_cpu_t* cpu, instruction_t* instruction)
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uint32_t sra_value = cpu->regs.x[instruction->rs2] & 0x1F;
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cpu->regs.x[instruction->rd] = ((int32_t) cpu->regs.x[instruction->rs1]) >> sra_value;
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break;
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case FUNC7_DIVU:
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cpu->regs.x[instruction->rd] = cpu->regs.x[instruction->rs1] / cpu->regs.x[instruction->rs2];
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break;
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default:
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog SRL/SRA instruction, could not execute\n", instruction->func7);
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fprintf(stderr, "FATAL: Unknown func7 0x%x for arithlog SRL/SRA/DIVU instruction, could not execute\n", instruction->func7);
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exit(EXIT_FAILURE);
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break;
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}
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@ -579,7 +663,7 @@ void cpu_loop(rv32_cpu_t* cpu)
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// Execute
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cpu_execute(cpu, &instruction);
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// Reset value of zero, in case instruction tried to modify
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cpu->regs.zero = 0;
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@ -787,7 +871,7 @@ static void cpu_print_instruction(instruction_t* instruction)
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// To find out which operation, we must analyse func3 and func7
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switch(instruction->func3)
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{
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case FUNC3_ADD_SUB:
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case FUNC3_ADD_SUB_MUL:
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switch(instruction->func7)
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{
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case FUNC7_ADD:
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@ -796,33 +880,105 @@ static void cpu_print_instruction(instruction_t* instruction)
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case FUNC7_SUB:
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printf("sub x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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case FUNC7_MUL:
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printf("mul x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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default:
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog ADD/SUB instruction, could not execute\n", instruction->func7);
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog ADD/SUB/MUL instruction\n", instruction->func7);
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break;
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}
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break;
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case FUNC3_SLL:
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// Slide Left Logical
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printf("sll x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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case FUNC3_SLL_MULH:
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switch(instruction->func7)
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{
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case FUNC7_SLL:
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// Slide Left Logical
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printf("sll x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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case FUNC7_MULH:
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// MULtiplication High (32 high bits) (signed * signed)
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printf("mulh x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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default:
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog SLL/MULH instruction\n", instruction->func7);
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break;
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}
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break;
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case FUNC3_SLT:
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// Set Less Than
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printf("slt x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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case FUNC3_SLT_MULHSU:
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switch(instruction->func7)
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{
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case FUNC7_SLT:
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// Set Less Than
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printf("slt x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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case FUNC7_MULHSU:
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// MULtiplication High (32 high bits) (signed * unsigned)
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printf("mulhsu x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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default:
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog SLL/MULH instruction\n", instruction->func7);
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break;
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}
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break;
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case FUNC3_SLTIU:
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// Set Less Than Unsigned
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printf("sltu x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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case FUNC3_SLTU_MULHU:
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switch(instruction->func7)
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{
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case FUNC7_SLTU:
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// Set Less Than Unsigned
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printf("sltu x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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case FUNC7_MULHU:
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// MULtiplication High (32 high bits) (unsigned * unsigned)
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printf("mulhu x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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default:
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog SLTU/MULHU instruction\n", instruction->func7);
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break;
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}
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break;
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case FUNC3_XOR:
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printf("xor x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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case FUNC3_XOR_DIV:
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switch(instruction->func7)
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{
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case FUNC7_XOR:
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printf("xor x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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case FUNC7_DIV:
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printf("div x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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default:
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog XOR/DIV instruction\n", instruction->func7);
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break;
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}
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break;
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case FUNC3_OR:
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printf("or x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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case FUNC3_OR_REM:
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switch(instruction->func7)
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{
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case FUNC7_OR:
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printf("or x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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case FUNC7_REM:
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printf("rem x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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default:
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog OR/REM instruction\n", instruction->func7);
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break;
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}
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break;
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case FUNC3_AND:
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printf("and x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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case FUNC3_AND_REMU:
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switch(instruction->func7)
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{
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case FUNC7_AND:
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printf("and x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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case FUNC7_REMU:
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printf("remu x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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default:
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog AND/REMU instruction\n", instruction->func7);
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break;
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}
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break;
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case FUNC3_SRL_SRA:
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case FUNC3_SRL_SRA_DIVU:
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switch(instruction->func7)
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{
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case FUNC7_SRL:
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@ -833,15 +989,16 @@ static void cpu_print_instruction(instruction_t* instruction)
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// Slide Right Arithmetical
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printf("sra x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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case FUNC7_DIVU:
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printf("divu x%u, x%u, x%u\n", instruction->rd, instruction->rs1, instruction->rs2);
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break;
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default:
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog SRL/SRA instruction\n", instruction->func7);
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exit(EXIT_FAILURE);
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fprintf(stderr, "Warning: Unknown func7 0x%x for arithlog SRL/SRA/DIVU instruction\n", instruction->func7);
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break;
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}
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break;
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default:
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fprintf(stderr, "Warning: Unknown func3 0x%x for arithlog instruction\n", instruction->func3);
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exit(EXIT_FAILURE);
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break;
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}
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break;
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