The R35 rotation edit used PUT 77.=77 against a stale line number and
overwrote CONFIG_USB=y with a duplicate VIDEO block, leaving the USB
menuconfig unset: no USB controller, no usb command, no keyboard.
Restore CONFIG_USB=y (deduplicate VIDEO) and verify the full USB set
in .config after the defconfig re-run.
Also flip the console rotation from 1 (90 degrees clockwise) to 3
(270 degrees clockwise): rot=1 read upside down on the device with
the keyboard attached.
The BOE TV101WUM-NL6 panel is mounted rotated 270 degrees in the
krane chassis (rotation property on the panel node in the upstream
DT). With the keyboard attached the tablet is used in landscape, so
set video rot=1 and enable CONFIG_CONSOLE_ROTATION: the uclass then
binds the rotated vidconsole1 driver, which writes glyphs rotated by
90 degrees clockwise into the native 1200x1920 portrait scanout and
uses the swapped console geometry (240 columns x 75 rows).
The framebuffer geometry and the depthcharge scanout path are
unchanged; only the console text placement rotates.
Add a display driver for the MT8183 kukui family of ChromeOS devices
(e.g. the Lenovo IdeaPad Duet, google,krane), where the display
pipeline is already initialized and running when the payload is
handed off by depthcharge. depthcharge's display_cleanup() stops the
overlay engines and turns the backlight off before the jump, so the
driver only revives the pipeline: it re-enables the OVL0 engines
(OVL_EN @ +0x000c and OVL0_2L_EN @ +0x100c, offsets from depthcharge's
device-era mtk_ddp.c), drives the backlight GPIOs high (DISP_PWM,
pin 43, and EN_LCD_BL, pin 176, through the GPIO controller dout block
at 0x10005000+0x100), and renders the console into the live scanout
surface.
The geometry comes from the coreboot table framebuffer record, which
sits at the fixed kukui address 0xffed9000; when its physical_address
is 0 (what upstream coreboot 4.14 publishes on kukui), the live
scanout address is taken from the OVL layer 0 address register
(+0x0f40), which the firmware leaves in place across the handoff.
The driver binds to the existing ovl0 device tree node
(mediatek,mt8183-disp-ovl) and requires no display initialization.
The M-PHY and SRAM readiness poll loops move out of the UFS controller
driver and into the firmware backend, exposed as blocking waits with
a caller-owned timeout budget. This keeps the UFS driver backend-agnostic
and lets an other backends offload the wait to the platform in a single
call instead of round-tripping every poll.
set_sram_bypass() now performs the SRAM_CSR read-modify-write in the
firmware layer.
Hook up functions are also update to reflect their usage.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://patch.msgid.link/26bc9aa2c02921690e126ab3401f7974ef04ad6e.1785394153.git.michal.simek@amd.com
Move the controller/PHY reset and SRAM-bypass sequence from
hce_enable_notify(PRE_CHANGE) into ufs_versal2_init().
The reset sequence releases the host controller from reset, and the UFS
core reads the capability and version registers right after .init() and
before ufshcd_hba_enable() (the only caller of hce_enable_notify()).
Doing the reset in .init() ensures those registers are read after the
controller is out of reset, and keeps the driver aligned with Linux.
ufs_versal2_phy_init() stays in POST_CHANGE.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://patch.msgid.link/6b4cbfa6cc58bef86da86971e4b27726a4e510f0.1785394153.git.michal.simek@amd.com
Starting the GENFIFO after each CMD and ADDR entry creates a gap
between the address phase (TX) and data phase (RX). For read commands
without dummy cycles, the controller is still driving DQ2/DQ3 HIGH
when the flash switches to output mode, causing a bus conflict.
Split the GENFIFO helper into a write-only variant and a
start-and-wait variant. Queue CMD, ADDR and dummy entries without
starting the GENFIFO. The data phase appends its entry and starts
the queued sequence, keeping the address-to-data transition
continuous.
Since genfifo_cmd() no longer triggers after each entry, operations
without a data phase have no trigger path. Call start_gen_fifo()
from exec_op() before deasserting chip select to execute the queued
CMD and ADDR entries.
Fixes: 22cca1730e ("spi: zynqmp_gqspi: Add support for ZynqMP qspi driver")
Signed-off-by: Suraj Kakade <suraj.hanumantkakade@amd.com>
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://patch.msgid.link/20260709083757.1851446-1-suraj.hanumantkakade@amd.com
We can have many pci hotplug groups, each introduced
by a "pci@<addr>" token such as,
pci_iommu_extra=pci@0x3600000,1.0.0,hp,pci@0x3700000,1.0.0,hp,
pci@0x3800000,1.0.0,hp,pci@0x3900000,1.0.0,hp
Without this fix, we have the error:
Added iommu map for hotplug 1.0.0
ERROR: invalid action in extra iommu entry
ERROR: invalid action in extra iommu entry
ERROR: invalid action in extra iommu entry
Fixes: 2a5bbb13cc ("pci: layerscape: add a way of specifying additional iommu mappings")
Signed-off-by: Vincent Jardin <vjardin@free.fr>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The TPS65219 bind function continues when the regulators subnode is
missing. This causes pmic_bind_children() to be called with an invalid
ofnode and permits a misleading message indicating that the subnode
was found.
Return -ENXIO when the regulators subnode is absent, matching the
behavior of other TI PMIC drivers.
Signed-off-by: Kumara Bhimeswararao Matsa <bhimesh.matsa@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Preparing to add the AMD/Xilinx SCMI vendor protocol driver, support probe
of SCMI vendor ID 0x81. Add the protocol ID, the per-agent protocol device
slot, the probe/lookup switch cases and the scmi command name, gated by a
Kconfig option for conditional compilation.
The same wiring has been done by commit 7830ccc77a ("firmware: scmi:
Support probe vendor ID 0x80 and 0x82").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
U-Boot running as a coreboot payload obtains serial console
information either from the coreboot table or from the ACPI DBG2
table.
When serial console support is disabled in coreboot, the coreboot
table does not contain serial information. In this case U-Boot falls
back to parsing the DBG2 table.
Some AMD platforms or any other platforms that uses memory-mapped I/O
advertise the debug UART using DBG2 subtype 0x0012 ("16550-compatible
with parameters defined in Generic Address Structure"). U-Boot
currently accepts only subtype 0x0000, causing DBG2 UART detection to
fail and leaving no console output.
Accept subtype 0x0012 as well and keep the existing handling logic.
Signed-off-by: Desapogu Jayaramudu <jayaramudu.desapogu@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simplify the code, replace env_get_f() with env_get_yesno(). The
env_get_yesno() internally calls env_get() which may fall back to
env_get_f() if the environment access is not initialized yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
MediaTek platforms may need the MTU3 controller before U-Boot proper is
available, but the driver is currently selected and built only with the
main U-Boot configuration symbols.
Add an explicit SPL controller option with host and gadget modes. Make
the driver build and its role checks phase-aware so each phase can select
the MTU3 role it needs without coupling it to the U-Boot proper controller
configuration.
The upstream binding locates the xHCI child registers through the parent
ranges property. Select SPL_OF_TRANSLATE for host mode so SPL can resolve
that address before mapping it.
Signed-off-by: Julien Masson <jmasson@baylibre.com>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
The MTU3 glue driver expects a synthetic mediatek,ssusb child that
combines the device and xHCI register windows. Upstream devicetrees
instead put the device resources on the controller node and describe the
xHCI window with a standard child node, so U-Boot cannot use an upstream
topology.
Switch to the upstream layout. The controller owns the shared resources
and the device MAC, with the device register offsets relative to it as in
Linux. The gadget role binds as a node-less internal device, while the
host role binds to an enabled xHCI child and uses its own clocks,
supplies and register window. dr_mode selects the role and defaults to
otg, and the Kconfig choice constrains which role the build provides.
The legacy child layout is rejected explicitly so its combined register
window cannot be mistaken for the device MAC.
Convert the in-tree MT8183 and MT8512 devicetrees in the same commit so
neither platform is left without USB. MT8512 stays peripheral-only
because its xHCI host interrupt is not documented and the
mediatek,mtk-xhci binding requires it.
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add device tree compatible string "renesas,rcar-gen5-rpc-if" to
the driver to match on upstream RPC DT node in R-Car Gen5 DTs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Remove the IF from RPCIF to align the register macros with each other.
No functional change.
Fixes: d516246324 ("mtd: spi: renesas: Configure RPC PHY timing registers")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add device tree compatible string "renesas,rcar-gen5-rpc-if" to
the driver to match on upstream RPC DT node in R-Car Gen5 DTs.
Adjust Kconfig to allow driver enablement on all 64bit R-Car.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Simplify the DT register address parsing using dev_read_addr_name(),
switch away from raw fdt_*() functions. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* Clock fix for MT8188 (Genio 700/520)
* SPL support preparatory patch for MT8188.
* Compile error fix for when enabling LWIP network stack on some MediaTek targets.
* Fix a regression in clock driver binding from the previous PR.
* Add display-related clocks on MT8188.
* Another wave of clock driver refactoring and de-duplication.
The MPFS mailbox driver currently checks the BUSY bit at the start of
mpfs_mbox_send() and immediately returns -EBUSY if the controller is
busy.
On MPFS, BUSY may be transiently asserted during early boot even though
no other U-Boot service is actively executing. In Linux, returning
-EBUSY here is retryable via the mailbox framework and scheduler, but in
U-Boot this results in a hard failure.
Replace the immediate BUSY check with a bounded wait using
regmap_read_poll_timeout(), waiting for the controller to become idle
before issuing a new request. This preserves the intent of the BUSY
check while avoiding spurious early-boot failures in U-Boot’s
synchronous, polled execution model.
The timeout is conservative and based on observed MPFS behaviour, where
BUSY clears within a few milliseconds.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
The MPFS mailbox driver used unbounded polling loops and treated the
BUSY bit as a fatal condition in several paths. On MPFS, BUSY may be
transiently reasserted even after response data is written, which is
observable in U-Boot’s synchronous, polled execution model.
Replace the unbounded loops with a bounded
regmap_read_poll_timeout()-based helper that waits for the controller to
become idle.
This preserves existing behaviour while preventing infinite stalls
and avoiding spurious failures during early boot.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Add a U-Boot RNG driver for Microchip's PolarFire SoC (MPFS). The
hardware RNG is accessed indirectly via the MPFS system controller using
the mailbox interface.
The driver implements the UCLASS_RNG interface, requesting random data
from the system controller and returning it to the caller.
This allows use of the PolarFire SoC hardware RNG via the
standard 'rng' command and DM RNG API.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
The MPFS RNG driver is not described by the device tree and is instead
registered dynamically by the system controller. Explicitly bind the
MPFS RNG driver as a child device during system controller probe.
This ensures the RNG device is instantiated and available via UCLASS_RNG
without requiring a device tree node.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
The MPFS system controller run_service() helper only submits the mailbox
request but does not read back the response data. However, the caller
must explicitly receive the response.
Add a public system controller helper to receive mailbox service
responses to populate the response buffer after issuing a system
controller request.
Without this, the drivers copy uninitialised stack data instead of
mailbox response data, resulting in deterministic output.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
RTL8126A and RTL8127A share most of the register layouts and quirks with
RTL8125 series, but require explicit desc type and CRC-drop setup during
init.
This patch adds PCI IDs and MAC versions. RTL8126A is 0x66 and RTL8127A
is 0x6e. And RTL8127A requires Tx Desc V3 format and an additional RADM
FIFO protection configuration according to vendor driver.
Signed-off-by: Javen Xu <javen_xu@realsil.com.cn>
The AST2700 reuses the AST2600 watchdog block unchanged. Bind the
driver to the aspeed,ast2700-wdt compatible and enable WDT_AST2600
on the AST2700.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Reduce the PFC tables further by gating DRIF, MLB, TMU, TPU and SATA
behind PINCTRL_PFC_FULL, none of which are currently supported by
U-Boot. This helps reduce the size of the bootloader in 4 kiB range.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables further by gating DRIF, MLB, TMU and TPU
behind PINCTRL_PFC_FULL, none of which are currently supported by
U-Boot. This helps reduce the size of the bootloader in 4 kiB range.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reduce the PFC tables further by gating DRIF, MLB, TMU, TPU and SATA
behind PINCTRL_PFC_FULL, none of which are currently supported by
U-Boot. This helps reduce the size of the bootloader in 4 kiB range.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The clock controller driver for the device which supplies reference
clock to the PCIe core and bus may not implement .enable / .disable
callbacks in case the clock supplied by the device are always on,
in which case the clk_prepare_enable() call returns -ENOSYS. This
is the case on e.g. 9FGV0441. Handle the -ENOSYS as a valid return
value and proceed with probing.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add driver for Renesas 9-series PCIe clock generators. This driver
is designed to support 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ series I2C
PCIe clock generators.
The driver is capable of configuring per-chip spread spectrum mode
and output amplitude, as well as per-output slew rate.
Losely based on Linux 7.1 commit
5ec820fc28d0 ("clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The SCMI IDs did not change between SDK SCP 4.32 and SDK SCP 4.36.
Add SDK SCP 4.36 as supported version and reuse SDK SCP 4.32 remap
table.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Fastboot unregisters the USB gadget from the completion callback of
its final OKAY response. MTU3 QMU can report that request complete
while bytes remain in the endpoint TX FIFO. Disabling the USB function
immediately can therefore disconnect the host before it receives the
response.
Before selecting the high-speed or SuperSpeed disconnect operation, poll
the FIFO state of enabled IN endpoints that have no pending requests.
Bound the wait to 1 ms. If a FIFO does not drain, reset its endpoint,
force the disconnect, and propagate -ETIMEDOUT through the gadget pullup
operation. Endpoints with pending requests are skipped so an ordinary
disconnect does not wait for an active transfer.
Fixes: e09b88cd08 ("usb: add MediaTek USB3 DRD driver")
Signed-off-by: Vitor Sato Eschholz <vsatoes@baylibre.com>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
A bunch of code calls info->dev, mostly dev_* messages and devm_kzalloc.
The former can be passed a NULL device and _dev_printk handles this just
fine.
The latter ignores the dev argument whenever !CONFIG_IS_ENABLED(DEVRES)
which was true in most cases until we made CONFIG_DEVRES mandatory for
U-Boot proper in commit 217cf656e2 ("dm: core: Default to using DEVRES
outside of xPL"). Failing to set info->dev before it's used by
devm_kzalloc results in crashes, therefore let's set info->dev before it
can be used.
Reported-by: Ben Schneider <ben@bens.haus>
Closes: https://lore.kernel.org/u-boot/IRefanijM8fTzOXeGe-H5hmhRkm7pt4Q83BV6VcWKlWp0s4i8mYcONTQz-IVhvNWlGta4LtnfK7ti6gxlrqq8h8cotgG1S0Fs6_DviAHvyo=@bens.haus/
Fixes: 0871806629 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Fixes: 217cf656e2 ("dm: core: Default to using DEVRES outside of xPL")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Ben Schneider <ben@bens.haus>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
The hash command currently always uses the software implementation for
the selected algorithm, even when driver-model hash providers are
available.
Add a hash_digest_wd_lookup() helper which probes UCLASS_HASH devices in
order and uses the first provider supporting the requested algorithm.
Continue past unavailable providers and unsupported operations, but
propagate a hard digest failure once a provider accepts the operation.
Remember probe failures so they are not silently hidden by software
fallback when no later provider succeeds.
Use the helper from the hash command and retain its software fallback
when no usable provider is present. Add sandbox tests covering provider
fallback and hard-error propagation.
Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
vhaudiquet
Tom Rini
Michal Simek
Suraj KakadeandMichal Simek
Vincent JardinandPeng Fan
Kumara Bhimeswararao MatsaandPeng Fan
Desapogu JayaramuduandTom Rini
Marek VasutandTom Rini
Carlo CaioneandMarek Vasut
Tuyen DangandMarek Vasut
Julien StephanandDavid Lechner
Jamie GibbonsandLeo Yu-Chi Liang
Javen XuandJerome Forissier
Ryan ChenandStefan Roese
Quentin SchulzandStefan Roese
James HilliardandTom Rini