106973 Commits
Author SHA1 Message Date
Hiago De FrancoandLeo Yu-Chi Liang bacb61a06f board: sophgo: move ethernet driver to common directory
This will make easier for future boards to reuse the same driver (e.g.
Milk-V Duo 256MB).

Signed-off-by: Hiago De Franco <hfranco@baylibre.com>
Acked-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
2026-08-05 10:16:08 -07:00
Jamie GibbonsandLeo Yu-Chi Liang d803fb548e mailbox: mpfs: add bounded wait for BUSY to clear before sending request
The MPFS mailbox driver currently checks the BUSY bit at the start of
mpfs_mbox_send() and immediately returns -EBUSY if the controller is
busy.

On MPFS, BUSY may be transiently asserted during early boot even though
no other U-Boot service is actively executing. In Linux, returning
-EBUSY here is retryable via the mailbox framework and scheduler, but in
U-Boot this results in a hard failure.

Replace the immediate BUSY check with a bounded wait using
regmap_read_poll_timeout(), waiting for the controller to become idle
before issuing a new request. This preserves the intent of the BUSY
check while avoiding spurious early-boot failures in U-Boot’s
synchronous, polled execution model.

The timeout is conservative and based on observed MPFS behaviour, where
BUSY clears within a few milliseconds.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
2026-08-05 10:16:07 -07:00
Jamie GibbonsandLeo Yu-Chi Liang 47cd1fd361 mailbox: mpfs-mbox: replace unbounded BUSY polling with bounded waits
The MPFS mailbox driver used unbounded polling loops and treated the
BUSY bit as a fatal condition in several paths. On MPFS, BUSY may be
transiently reasserted even after response data is written, which is
observable in U-Boot’s synchronous, polled execution model.

Replace the unbounded loops with a bounded
regmap_read_poll_timeout()-based helper that waits for the controller to
become idle.

This preserves existing behaviour while preventing infinite stalls
and avoiding spurious failures during early boot.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
2026-08-05 10:16:07 -07:00
Jamie GibbonsandLeo Yu-Chi Liang 899cbeee1c configs: microchip_mpfs_generic: enable MPFS RNG support
Enable the MPFS hardware RNG and associated infrastructure in
the Microchip PolarFire SoC generic defconfig.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
2026-08-05 10:16:07 -07:00
Jamie GibbonsandLeo Yu-Chi Liang c58dc99616 rng: add Microchip PolarFire SoC hardware RNG driver
Add a U-Boot RNG driver for Microchip's PolarFire SoC (MPFS). The
hardware RNG is accessed indirectly via the MPFS system controller using
the mailbox interface.

The driver implements the UCLASS_RNG interface, requesting random data
from the system controller and returning it to the caller.

This allows use of the PolarFire SoC hardware RNG via the
standard 'rng' command and DM RNG API.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <leo.liang@sifive.com>
2026-08-05 10:16:07 -07:00
Jamie GibbonsandLeo Yu-Chi Liang 752704d854 misc: mpfs_syscontroller: bind RNG sub-device
The MPFS RNG driver is not described by the device tree and is instead
registered dynamically by the system controller. Explicitly bind the
MPFS RNG driver as a child device during system controller probe.

This ensures the RNG device is instantiated and available via UCLASS_RNG
without requiring a device tree node.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
2026-08-05 02:03:29 -07:00
Jamie GibbonsandLeo Yu-Chi Liang a5f93037f2 misc: mpfs_syscontroller: add mailbox RX helper for service responses
The MPFS system controller run_service() helper only submits the mailbox
request but does not read back the response data. However, the caller
must explicitly receive the response.

Add a public system controller helper to receive mailbox service
responses to populate the response buffer after issuing a system
controller request.

Without this, the drivers copy uninitialised stack data instead of
mailbox response data, resulting in deterministic output.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
2026-08-05 02:03:23 -07:00
Javen XuandJerome Forissier a1aaacc968 net: rtl8169: add support for RTL8126A and RTL8127A
RTL8126A and RTL8127A share most of the register layouts and quirks with
RTL8125 series, but require explicit desc type and CRC-drop setup during
init.

This patch adds PCI IDs and MAC versions. RTL8126A is 0x66 and RTL8127A
is 0x6e. And RTL8127A requires Tx Desc V3 format and an additional RADM
FIFO protection configuration according to vendor driver.

Signed-off-by: Javen Xu <javen_xu@realsil.com.cn>
2026-08-04 10:00:32 +02:00
Ryan ChenandStefan Roese d9ce7ed305 watchdog: ast2600: add AST2700 support
The AST2700 reuses the AST2600 watchdog block unchanged. Bind the
driver to the aspeed,ast2700-wdt compatible and enable WDT_AST2600
on the AST2700.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
2026-08-03 15:00:33 +02:00
Rasmus VillemoesandStefan Roese 2f44bb1417 cyclic: return early from cyclic_run() if the list is empty
It is possible that schedule(), and hence cyclic_run(), gets called
very early, perhaps even from assembly code. With
commit 9c1b13b3fd ("cyclic: reduce get_timer_us() calls inside
hlist_for_each_entry_safe()"), there is now an unconditional
get_timer_us(0) done outside the loop, and depending on the platform,
the timer infrastructure may not be set up yet. In at least one case,
that has caused a divide-by-0 and hence a failure to boot.

Platforms should really ensure their timers are ready ASAP, and in the
concrete case reported, that was indeed possible to fix that
way. However, it doesn't hurt to also insert an early return here, and
that could prevent other such hard-to-debug boot failures.

Reported-by: Emanuele Ghidoli <ghidoliemanuele@gmail.com>
Link: https://marc.info/?l=u-boot&m=178481834846283&w=2
Fixes: 9c1b13b3fd ("cyclic: reduce get_timer_us() calls inside hlist_for_each_entry_safe()")
Signed-off-by: Rasmus Villemoes <rv@rasmusvillemoes.dk>
Reviewed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
[sr: fix Fixes: tag SHA length and return statement indentation]
2026-08-03 15:00:33 +02:00
Rasmus VillemoesandStefan Roese dcadbeed2a cyclic: get rid of cyclic_get_list() helper
As the comment indicates, this was used to silence a warning without
having to add casts everywhere gd->cyclic_list was referenced. But
nowadays gd is not volatile qualified, so this helper is not needed
and only obfuscates the code somewhat, because the head of the list
being operated on with the hlist_ or list_ macros is usually not
obtained via a function call.

Remove the helper and refer to the list head using the idiomatic
&gd->cyclic_list.

Signed-off-by: Rasmus Villemoes <rv@rasmusvillemoes.dk>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
2026-08-03 14:46:51 +02:00
Franz SchnyderandFabio Estevam 8a6f042dc3 toradex: tdx-cfg-block: Add Aquila iMX95 0243 PID4
Add the new 0243 PID4 to config block handling:

- 0243 Aquila iMX95 Hexa 8GB IT

Signed-off-by: Franz Schnyder <franz.schnyder@toradex.com>
2026-08-03 09:32:42 -03:00
Emanuele GhidoliandFabio Estevam 9dfa2015e0 arm: imx: initialize the system counter earlier on i.MX7
imx_gpcv2_init() calls udelay(), which through schedule() reaches
cyclic_run(). Since commit 9c1b13b3fd ("cyclic: reduce get_timer_us()
calls inside hlist_for_each_entry_safe()") get_timer_us() is called even
when no cyclic function is registered, so tick_to_time_us() divides by a
still zero CNTFRQ and __div0() hangs the board before the console is up.
The requested delay was a no-op as well, since us_to_tick() reads a CNTFRQ
of zero.

Initialize the system counter before imx_gpcv2_init(), and move the
"already initialized" guard from timer_get_boot_us() into timer_init() so
that the later timer_init() from the generic init sequence is a no-op.
Where the system counter timer_init() is not compiled in, the weak
definition is empty and the calling it is harmless.

Fixes: b059837850 ("imx: mx7: add gpc initialization for low power mode")
Fixes: 9c1b13b3fd ("cyclic: reduce get_timer_us() calls inside hlist_for_each_entry_safe()")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
2026-08-03 09:32:19 -03:00
Joseph GuoandFabio Estevam 01b7aee2ee imx: scmi: suppress invalid origin/errid in reset reason print
Only print origin and errid fields when the corresponding valid bits
(MISC_BOOT_FLAG_ORG_VLD and MISC_BOOT_FLAG_ERR_VLD) are set. For a
normal power-on reset, these fields are not valid, and printing -1
is just noise.

Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
2026-08-03 09:31:54 -03:00
Marek VasutandFabio Estevam 4eeaaee054 binman: add CST backend selection for i.MX8M signing
Add support for setting the CST backend, both via DT property and
CST_BACKEND environment variable. The CST currently supports two
backends, 'ssl' and 'pkcs11', with 'ssl' being the default when
CST tool is invoked without any -b parameter. Keep 'ssl' backend
as the default, but explicitly pass it via the '-b' parameter,
unless the user selects 'pkcs11' via either method.

Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-08-03 09:31:24 -03:00
INgo RahandFabio Estevam 14ca9eb18d board: phycore_imx8mm: add 1 and 4GB RAM timings
The Phytec Tauri L is sold with multiple memory configurations beyond the
base 2 GB variant. To support these alternative capacities seamlessly,
read the physical memory size directly from the EEPROM of the underlying
phyCORE module and apply the appropriate DDR timing parameters at runtime.

Alternatively, a fixed memory configuration can still be enforced via a
dedicated Kconfig option if dynamic detection is not desired.

Note that while U-Boot correctly discovers the full physical memory bank,
the device tree excludes the memory beyond 3 GB  (below the 4 GB boundary).
This ensures that U-Boot allocations and early EFI staging buffers remain
safe from 32-bit interconnect DMA limitations inherent to some i.MX8MM
IP blocks.

Signed-off-by: INgo Rah <ingo.rah@linutronix.de>
Reviewed-by: Gregor Herburger <gregor.herburger@linutronix.de>
Reviewed-by: Benedikt Spranger <b.spranger@linutronix.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
2026-08-03 09:31:05 -03:00
INgo RahandFabio Estevam f2f1a1e7d2 board: phycore_imx8mm: update RAM timings
Updated RAM timings with new generated settings using
DDR Tool v3.6.0_22-aa018543.
Provide functions for 1GB, 4GB and revision 7 variants.

Signed-off-by: INgo Rah <ingo.rah@linutronix.de>
Reviewed-by: Gregor Herburger <gregor.herburger@linutronix.de>
Reviewed-by: Benedikt Spranger <b.spranger@linutronix.de>
Tested-by: Yannic Moog <y.moog@phytec.de>
2026-08-03 09:31:05 -03:00
Michal SimekandIlias Apalodimas cd6f2f4519 fwu: Make boottime check failures visible
On systems with FWU enabled but without the required DT changes the
boottime checks fail. The failures are only reported via log_debug()
which is compiled out by default, so the user has no idea what is going
on.

Use log_err() to make these failures visible.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-08-03 13:05:21 +03:00
Marek Vasut 8fa2ad1a2c arm: dts: renesas: Remove unused OPP nodes from R-Car H3/M3-W/M3-W+/M3-N
Remove OPP DT nodes from R-Car H3, M3-W, M3-W+ and M3-N DTs,
those nodes are not used by U-Boot and only increase the control
DT size and complexity. This saves about 1 kiB on the resulting
U-Boot binary without any impact on functionality.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:15:37 +02:00
Marek Vasut 7feb56b8ef pinctrl: renesas: Further minimize R8A77965 M3-N PFC tables
Reduce the PFC tables further by gating DRIF, MLB, TMU, TPU and SATA
behind PINCTRL_PFC_FULL, none of which are currently supported by
U-Boot. This helps reduce the size of the bootloader in 4 kiB range.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:15:37 +02:00
Marek Vasut 394e63e7c9 pinctrl: renesas: Further minimize R8A77960 M3-W and R8A77961 M3-W+ PFC tables
Reduce the PFC tables further by gating DRIF, MLB, TMU and TPU
behind PINCTRL_PFC_FULL, none of which are currently supported by
U-Boot. This helps reduce the size of the bootloader in 4 kiB range.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:15:37 +02:00
Marek Vasut 18b1ecb34a pinctrl: renesas: Further minimize R8A77951 H3 PFC tables
Reduce the PFC tables further by gating DRIF, MLB, TMU, TPU and SATA
behind PINCTRL_PFC_FULL, none of which are currently supported by
U-Boot. This helps reduce the size of the bootloader in 4 kiB range.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:15:37 +02:00
Marek Vasut 53e0237c15 Revert "arm64: dts: renesas: r8a779g3: Reinstate basic PCIe clock description for Sparrow Hawk"
This reverts commit a6f018b7b5.

The a6f018b7b5 ("arm64: dts: renesas: r8a779g3: Reinstate basic PCIe
clock description for Sparrow Hawk") workaround for missing PCIe clock
generator driver is no longer necessary, as the Renesas 9-series PCIe
clock generator driver is now available. Drop the workaround.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:15:37 +02:00
Marek Vasut e8bb5fdab9 arm64: renesas: r8a779g3: Enable PCIe clock generator and I2C mux drivers on Retronix R-Car V4H Sparrow Hawk board
Enable Renesas 9-series PCIe clock generator driver to operate the
Renesas 9FGV0441 PCIe clock generator which supplies PCIe busses on
this device with 100 MHz clock. Enable PCA954x I2C mux driver to
access the PCIe clock generator which is attached to one of the
muxed I2C busses.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:15:37 +02:00
Marek Vasut 50d7330920 pci: pcie-rcar-gen4: Handle always on reference clock
The clock controller driver for the device which supplies reference
clock to the PCIe core and bus may not implement .enable / .disable
callbacks in case the clock supplied by the device are always on,
in which case the clk_prepare_enable() call returns -ENOSYS. This
is the case on e.g. 9FGV0441. Handle the -ENOSYS as a valid return
value and proceed with probing.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:15:37 +02:00
Marek Vasut 99203d9dac clk: rs9: Add Renesas 9-series PCIe clock generator driver
Add driver for Renesas 9-series PCIe clock generators. This driver
is designed to support 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ series I2C
PCIe clock generators.

The driver is capable of configuring per-chip spread spectrum mode
and output amplitude, as well as per-output slew rate.

Losely based on Linux 7.1 commit
5ec820fc28d0 ("clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841")

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:15:37 +02:00
Marek Vasut 202d31f930 clk: renesas: Add SDK SCP 4.36 map to Renesas R-Car R8A78000 X5H CPG clock driver
The SCMI IDs did not change between SDK SCP 4.32 and SDK SCP 4.36.
Add SDK SCP 4.36 as supported version and reuse SDK SCP 4.32 remap
table.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:15:37 +02:00
Carlo CaioneandMarek Vasut 9879c40f6d usb: mtu3: wait for TX FIFO to drain before disconnect
Fastboot unregisters the USB gadget from the completion callback of
its final OKAY response. MTU3 QMU can report that request complete
while bytes remain in the endpoint TX FIFO. Disabling the USB function
immediately can therefore disconnect the host before it receives the
response.

Before selecting the high-speed or SuperSpeed disconnect operation, poll
the FIFO state of enabled IN endpoints that have no pending requests.
Bound the wait to 1 ms. If a FIFO does not drain, reset its endpoint,
force the disconnect, and propagate -ETIMEDOUT through the gadget pullup
operation. Endpoints with pending requests are skipped so an ordinary
disconnect does not wait for an active transfer.

Fixes: e09b88cd08 ("usb: add MediaTek USB3 DRD driver")
Signed-off-by: Vitor Sato Eschholz <vsatoes@baylibre.com>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
2026-08-02 22:13:19 +02:00
Marek Vasut 20f2b9bbd2 MAINTAINERS: Update SH/SoCFPGA/USB email addresses
Update the email addresses to a valid one.
Use N: usb to match on all USB related bits.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-08-02 22:07:17 +02:00
Tom Rini baa64b2f89 Merge tag 'efi-2026-10-rc2-2' of https://git.u-boot-project.org/u-boot/custodians/u-boot-efi
Pull request efi-2026-10-rc2-2

CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-efi/-/pipelines/839

Documentation:

* README: Slightly rephrase env set and env print paragraph
* cmd: gpt: Reinstate gpt setenv
* CONTRIBUTE: replace "as" with "like"

UEFI:

* Unify the memory map output of 'efi mem' and 'efidebug memmap'
* Print ISA-specific and unknown memory attributes
* Rix memory leak in efi_sigstore_parse_siglist
* Fix use of uninitialized guid in variable enumeration loops
2026-07-31 08:55:30 -06:00
Tom Rini 1fc320fdf8 Merge tag 'u-boot-at91-fixes-2026.10-a' of https://git.u-boot-project.org/u-boot/custodians/u-boot-at91
First set of u-boot-at91 fixes for the 2026.10 cycle:

- MAINTAINERS file update
2026-07-31 08:54:48 -06:00
Tom Rini 8f50b59036 Merge tag 'u-boot-marvell-20260731' of https://git.u-boot-project.org/u-boot/custodians/u-boot-marvell
CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-marvell/-/pipelines/834

u-boot-marvell changes 2026-07-31:
- arm64: a37xx: pinctrl: fix info->dev used but never set (Quentin)
- arm: mach-mvebu: Add more AC3 & PC3 variants (Chris)
- arm: mvebu: Update docs for Allied Telesis x220 (Chris)
- arm: mvebu: Add Allied Telesis x960 board (Chris)
2026-07-31 08:54:22 -06:00
Scott MoserandHeinrich Schuchardt d78ba22ab2 efi_loader: fix use of uninitialized guid in variable enumeration loops
efi_bootmgr_delete_invalid_boot_option(), eficonfig_show_boot_selection(),
and eficonfig_create_change_boot_order_entry() each enumerate all EFI
variables by repeatedly calling efi_next_variable_name() in a loop,
passing the same efi_guid_t as both input and output. GetNextVariableName()
needs the vendor GUID returned by the previous call, together with the
variable name it returned, to know where to resume.

In each of these loops the efi_guid_t was declared inside the loop body,
so a new instance comes into scope on every iteration. Relying on it to
still hold the previous iteration's value depends on the compiler reusing
the same stack slot across iterations, which is undefined behavior. With
a compiler that zero-initializes locals by default (e.g. clang, or gcc
configured with -ftrivial-auto-var-init=zero), the GUID is cleared on
every iteration, so the lookup of the variable name returned by the
previous call fails and efi_init_obj_list() aborts:

  Cannot initialize UEFI sub-system
  ** Booting bootflow ... with efi
  Boot failed (err=-22)

Move the efi_guid_t declarations out of the loops so the value written
by the previous efi_next_variable_name() call is preserved across
iterations.

Fixes: 140a8959d4 ("eficonfig: use efi_get_next_variable_name_int()")
Signed-off-by: Scott Moser <smoser@brickies.net>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-07-31 11:06:37 +02:00
Marek VasutandHeinrich Schuchardt c9baa7611b doc: cmd: gpt: Reinstate gpt setenv
Commit dc3765ede5 ("doc: Switch from setenv to env set") was
too eager to switch "setenv" to "env set" and also incorrectly
rewrote "gpt setenv" to "gpt env set". Undo this error.

Fixes: dc3765ede5 ("doc: Switch from setenv to env set")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-07-31 11:05:31 +02:00
Marek VasutandHeinrich Schuchardt b4d2bad93e README: Slightly rephrase env set and env print paragraph
Adjust the paragraph to make it a bit more readable.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-07-31 11:04:48 +02:00
Quentin SchulzandHeinrich Schuchardt a0d79a8e59 doc: CONTRIBUTE: replace "as" with "like"
It's either "as with" or "like" but not "as", as reported by Simon.
Let's fix this oversight.

Fixes: 06f0143945 ("doc: CONTRIBUTE: tell people reviewing *is* contributing")
Reported-by: Simon Glass <sjg@chromium.org>
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-07-31 11:03:57 +02:00
Heinrich Schuchardt 2f61c8b068 efi_loader: fix memory leak in efi_sigstore_parse_siglist
In case of an error in efi_sigstore_parse_siglist() function
efi_sigstore_free() is called. Currently it fails to free allocated data
because siglist->sig_data_list is not set on the error path.

Always update siglist->sig_data_list when a struct efi_sig_data is
allocated.

Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-07-31 11:00:44 +02:00
Aristo ChenandHeinrich Schuchardt e394b1e848 efi: Print ISA-specific and unknown memory attributes
The attribute mnemonic table did not cover EFI_MEMORY_ISA_VALID and the
EFI_MEMORY_ISA_MASK field, and attribute bits without a mnemonic were
silently dropped, so a memory map carrying ISA-specific, invalid or not
yet known attributes displayed incomplete information without any hint
that something was missing.

Add a mnemonic for EFI_MEMORY_ISA_VALID and print the ISA-specific
field as ISA=<value> when it is valid, instead of decoding bits whose
meaning U-Boot cannot know. Any remaining bits that match neither the
mnemonic table nor the ISA field are printed as a hexadecimal value.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
2026-07-31 09:22:40 +02:00
Aristo ChenandHeinrich Schuchardt 6abd738e20 efi: Unify the memory map output of 'efi mem' and 'efidebug memmap'
The efi and efidebug commands each carried their own code for printing
the EFI memory map, with separate tables of memory type and attribute
names. The copies had drifted: efidebug knew EFI_PERSISTENT_MEMORY_TYPE
while 'efi mem' printed it as '<invalid>', neither table knew
EFI_UNACCEPTED_MEMORY_TYPE, and the 'efi mem' printer had misaligned
column headers, a broken '<gap>' line and a superfluous Virtual column:
the map is identity mapped before SetVirtualAddressMap() is called, so
the field carries no information at the time the command can run.

Move the printing loop of 'efidebug memmap' into efi_common.c as
efi_show_memmap(), which is linked into both commands, and use it from
both. The second copy in 'efi mem' is deleted together with
efi_print_mem_table() and the private sorting and merging code,
including the 'all' argument.

The memory type names follow the UEFI specification with the leading
'Efi' and the trailing 'Type' stripped, for example ConventionalMemory
for EfiConventionalMemory, and the missing name for unaccepted memory
is added. The type column is widened to fit the longest name,
MemoryMappedIOPortSpace.

The shared function iterates the map with the descriptor size reported
by the firmware instead of assuming sizeof(struct efi_mem_desc). This
matters for 'efi mem' under EDK II based firmware, which reports a
descriptor size of 0x30. The memory map key, which was printed
uninitialized on the payload path, is now initialized. The command
documentation is updated with output captured from the app running
under OVMF, and documents why virtual addresses are not shown.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
2026-07-31 09:21:02 +02:00
Chris PackhamandStefan Roese 57f382db43 arm: mvebu: Add Allied Telesis x960 board
The  x960-28YSQ is a 25G/100G layer 3 switch from Allied Telesis.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
[sr: fix DT file name in MAINTAINERS]
2026-07-30 22:06:23 +02:00
Chris PackhamandStefan Roese cd26b17f87 arm: mvebu: Update docs for Allied Telesis x220
The current documentation doesn't work as-is for extracting the DDR
training binary from the vendor bootloader. There are some seemingly
undocumented alignment requirements that we need to meet by padding the
binary file. Add some instructions on how to do this with objcopy. Also
fix a minor spelling mistake while we're here.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
[sr: fix title underline length]
2026-07-30 22:06:22 +02:00
Chris PackhamandStefan Roese c2bd067668 arm: mach-mvebu: Add more AC3 & PC3 variants
Add IDs for more of the Alleycat3 and Poncat3 variants. This makes the
SoC information at boot say something other than "Unknown-??".

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
2026-07-30 21:04:16 +02:00
Quentin SchulzandStefan Roese 93c1d38cd8 arm64: a37xx: pinctrl: fix info->dev used but never set
A bunch of code calls info->dev, mostly dev_* messages and devm_kzalloc.

The former can be passed a NULL device and _dev_printk handles this just
fine.
The latter ignores the dev argument whenever !CONFIG_IS_ENABLED(DEVRES)
which was true in most cases until we made CONFIG_DEVRES mandatory for
U-Boot proper in commit 217cf656e2 ("dm: core: Default to using DEVRES
outside of xPL"). Failing to set info->dev before it's used by
devm_kzalloc results in crashes, therefore let's set info->dev before it
can be used.

Reported-by: Ben Schneider <ben@bens.haus>
Closes: https://lore.kernel.org/u-boot/IRefanijM8fTzOXeGe-H5hmhRkm7pt4Q83BV6VcWKlWp0s4i8mYcONTQz-IVhvNWlGta4LtnfK7ti6gxlrqq8h8cotgG1S0Fs6_DviAHvyo=@bens.haus/
Fixes: 0871806629 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Fixes: 217cf656e2 ("dm: core: Default to using DEVRES outside of xPL")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Ben Schneider <ben@bens.haus>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
2026-07-30 21:04:16 +02:00
Tom Rini 100e12ea78 Merge tag 'mmc-for-2026.10-rc2' of https://git.u-boot-project.org/u-boot/custodians/u-boot-mmc
CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-mmc/-/pipelines/781

- Enable MMC CMD23 for multi-block transfers
- Various fixes to mmc core
- Add PF9453 pmic/regulator driver
- Support SCP 4.36 map for renesas-r8a78000
2026-07-30 08:50:13 -06:00
Shahriyar JalayeriandJerome Forissier 7946774a0f test: net: add regression test for IP reassembly overflow
Add a DM test that feeds __net_defragment() a single crafted fragment
whose trailing hole descriptor lands just past pkt_buff.  Without the
preceding fix the 8-byte hole write goes out of bounds; with it the
fragment is dropped and no datagram is delivered.

Signed-off-by: Shahriyar Jalayeri <shahriyar@byteray.co.uk>
Acked-by: Jerome Forissier <jerome.forissier@arm.com>
2026-07-30 13:56:26 +02:00
Shahriyar JalayeriandJerome Forissier 04ca915d5b net: fix out-of-bounds write in IP fragment reassembly
__net_defragment() reassembles IP fragments into the static buffer
pkt_buff[CONFIG_NET_MAXDEFRAG].  The bounds check

	if (start + len > IP_MAXUDP)
		return NULL;

only covers the fragment data copy.  The split-hole and move-hole
branches additionally write an 8-byte struct hole via "*newh = *h" at
newh = thisfrag + len / 8, which can land up to sizeof(struct hole)
bytes past the end of pkt_buff.  A single fragment with a non-zero
fragment offset and the More-Fragments flag set reaches this path, so
a crafted fragment received during netboot overflows the buffer.

Reject any fragment whose trailing hole descriptor would fall outside
pkt_buff.

Signed-off-by: Shahriyar Jalayeri <shahriyar@byteray.co.uk>
Acked-by: Jerome Forissier <jerome.forissier@arm.com>
2026-07-30 13:56:26 +02:00
James HilliardandTom Rini 94b349bd90 crypto: hash: use DM providers from hash command
The hash command currently always uses the software implementation for
the selected algorithm, even when driver-model hash providers are
available.

Add a hash_digest_wd_lookup() helper which probes UCLASS_HASH devices in
order and uses the first provider supporting the requested algorithm.
Continue past unavailable providers and unsupported operations, but
propagate a hard digest failure once a provider accepts the operation.
Remember probe failures so they are not silently hidden by software
fallback when no later provider succeeds.

Use the helper from the hash command and retain its software fallback
when no usable provider is present. Add sandbox tests covering provider
fallback and hard-error propagation.

Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
2026-07-29 14:53:46 -06:00
Daniel GolleandTom Rini de61c59164 spl: atf: fix BL32 entry point for multi-segment TEE images
binman's split-elf operation records one FIT image node per ELF
segment, all with os = "tee", and only the segment containing the ELF
entry point carries an entry property. Since fdt_add_subnode() inserts
new subnodes in front of existing ones, the /fit-images nodes end up in
reverse recording order, so spl_fit_images_find() would return the
*last* TEE segment and its load address was passed to BL31 as the BL32
entry point.

On RK3588 with an OP-TEE tee.elf consisting of two PT_LOAD segments
this made BL31 (SPD=opteed) ERET into OP-TEE's data segment at
0x30200000 instead of the entry point at 0x30000000, hanging the boot
right after 'BL31: Initializing BL32'.

Prefer the FIT image node which provides an entry property and only
fall back to the first matching node when none of them has one.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2026-07-29 14:52:23 -06:00
Tom Rini 06c49ce4f1 Merge patch series "rtc: pcf8563: HYM8563 support and unreliable-time reporting"
Daniel Golle <daniel@makrotopia.org> says:

The Haoyu HYM8563, found for example on the Radxa ROCK 5B, is a clone of
the NXP PCF8563 with an identical timekeeping register layout, but the
pcf8563 driver does not match its compatible used in upstream DT.

Boards fitted with it end up without DM_RTC and, as a consequence,
without usable EFI GetTime and SetTime runtime services. On top of
that, when the chip reports that the time may be unreliable after a
supply voltage drop, the driver returns a bare -1, which callers
interpret as -EPERM rather than as invalid data.

This series makes the existing driver serve the HYM8563 and lets callers
distinguish an unreliable time from a permission problem.

The driver gains the additional compatible string and returns -EINVAL
when the voltage-low flag is set, matching the rv3032 driver and the
behaviour of the Linux driver for the same chips.

Link: https://lore.kernel.org/r/cover.1784423738.git.daniel@makrotopia.org
2026-07-29 14:51:17 -06:00
Daniel GolleandTom Rini 9811c57b2e rtc: pcf8563: return -EINVAL when the voltage-low flag is set
Return a proper error code instead of a bare -1 (-EPERM) when VL
indicates the time is not reliable, matching rv3032 and the Linux
driver behaviour.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2026-07-29 14:50:18 -06:00