a risc-v simulator
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vhaudiquet 923e9d39a0 Better exception/interrupt handle 1 year ago
hardware Makefile can now build linux/bbl 1 year ago
src Better exception/interrupt handle 1 year ago
tests Changed SW/LW test 1 year ago
.clang-format Initial commit 1 year ago
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README.md

vriscv - a risc-v simulator

Unit tests

Unit tests can be compiled and run using :

make tests

Resources used

RISC-V Specifications:

Device Tree Source :

Juraj's Blog, mostly:

RISC-V SBI Specifications:

Buildroot fork for nommu linux: