Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Mark Kettenis <kettenis@openbsd.org>
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The struct clk_ops sunxi_clk_ops is private to the clock driver
and there are no external users, no need to expose it this way.
Drop the extern.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
- SM6125 gains initial support
- The qcom clock drivers get better support for configuring UFS clocks
- ufetch gets some aesthetic improvements
- A minor bug in the qcm2290 clock driver is fixed
- A few qcom drivers get static/constified
- The GENI serial driver has the RX watermark register properly set
Move UFS clock initialization and enabling before hardware setup
to ensure clocks are running when accessing UFS registers.
Previously, U-Boot depended on earlier bootloader stages to
initialize UFS clocks. When these bootloaders failed to do so,
UFS registers became inaccessible, causing initialization to fail.
This change makes U-Boot initialize and enable UFS clocks early
in the init sequence, removing the dependency on previous
bootloaders.
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260427-ufs_clk-v2-6-36e10a7c0ef6@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Extend ENETC driver to support i.MX952 platform where 2 ENETC
controllers are located on different PCIe buses.
Key changes:
- Add enetc_dev_id_imx() to derive device ID from device tree "reg"
property for i.MX952, mapping bus_devfn values 0x0 and 0x100 to device
IDs 0 and 1 respectively
- Implement imx952_netcmix_init() to configure MII protocol and PCS
settings based on PHY mode parsed from device tree
- Add i.MX952 to FSL_ENETC_NETC_BLK_CTRL Kconfig dependencies
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The iMX and LS platforms use different bits in the same register to
set duplex, but their logics are opposite.
The current settings will result in unexpected configurations in
RGMII mode.
Fixes: e6df2f5e22 ("net: fsl_enetc: Update enetc driver to support i.MX95")
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Change to not use NXP_RECOG fuse, but detect part number according
to feature disable fuses and SPEED fuse.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add config.h to fix CAAM_BASE_ADDR undeclared build error when
CONFIG_CMD_PRIBLOB enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
pmic_reg_read returns a negative value if an error occurs. This
commit adds a missing check after calling pmic_reg_read.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Update node path for 5.10 Kernel.
- aips-bus renamed to bus
- gpmi-nand renamed to nand-controller
cherry picked from https://github.com/nxp-imx/uboot-imx,
tag lf-6.12.3-1.0.0,
commit feb8178e97d4 ("LF-2637 mx6: fuse: update node path")
add changes node path for Linux 6.13
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The RGPIO2P driver contains legacy handling for compatible combinations
that expose two reg ranges (dual base) for i.MX8ULP and i.MX93.
The i.MX95 GPIO controller exposes a single register range, so the
dual-base handling is unnecessary.
Additionally, the second address of the gpio1 reg property was wrong.
When used, it needs to be offsetted by 0x40 to start at the Port Data
Output register.
Fixes: 60d8255d8d ("board: toradex: add Toradex Verdin iMX95")
Signed-off-by: Antoine Gouby <antoine.gouby@toradex.com>
The RGPIO2P driver contains legacy handling for compatible combinations
that expose two reg ranges (dual base) for i.MX8ULP and i.MX93.
The i.MX95 GPIO controller exposes a single register range, so the
dual-base handling is unnecessary.
Signed-off-by: Antoine Gouby <antoine.gouby@toradex.com>
Add instructions on how to use U-Boot to save
DDR training data to NVM and explain the saving
process.
Signed-off-by: Simona Toaca <simona.toaca@nxp.com>
Call qb save automatically in the board-specific
spl_board_init(), if SPL_IMX_QB option is enabled.
This makes sure qb_save is called before any image
loading is done by the SPL. This option is also
suitable for the case where U-Boot proper is
missing (Falcon mode).
qb save refers to saving DDR training data to NVM,
so that OEI runs Quickboot flow on next reboot,
skipping full training and achieveing a lower boot
time.
Signed-off-by: Simona Toaca <simona.toaca@nxp.com>
This command exposes 3 methods:
- check -> checks if the data in volatile memory is valid
(integrity check)
- save -> saves the data to non-volatile memory and
erases the data in volatile memory
- erase -> erases the data in non-volatile memory
cmd_qb can be used either directly in the U-Boot console
or in an uuu script to save the QB data during flashing.
It supports specifying a different boot medium than the
current boot device for saving the data.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Simona Toaca <simona.toaca@nxp.com>
DDR training data can be saved to NVM and be available
to OEI at boot time, which will trigger QuickBoot flow.
U-Boot only checks for data integrity (CRC32), while
OEI is in charge of authentication when it tries to
load the data from NVM.
On iMX95 A0/A1, 'authentication' is done via another
CRC32. On the other SoCs, authentication is done by
using ELE to check the MAC stored in the ddrphy_qb_state
structure.
Supported platforms: iMX94, iMX95, iMX952 (using OEI)
Supported storage types: eMMC, SD, SPI flash.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Simona Toaca <simona.toaca@nxp.com>
When loading container image, the container header is loaded into
heap memory. If ahab is enabled, the header is be copied to another
fixed RAM for authentication in ahab_auth_cntr_hdr. The better method
is using container header memory being authenticated for following
image loading.
So update ahab_auth_cntr_hdr to return the address of container header
being authenticated. Caller uses this header for following parsing
and image loading.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The 'CONFIG_IS_ENBLAED' check only works when there is a
CONFIG_SPL_IMX8M_VDD_SOC_850MV config a option is defined and enabled.
So use the 'IS_ENABLED' macro instead to fix the ND mode VDD_SOC voltage.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In bus_i2c_stop, the MSR SDF is checked in a loop after stop command
is sent. Meanwhile, some error status in MSR is also checked by
imx_lpci2c_check_clear_error. But the imx_lpci2c_check_clear_error
will clear the MSR.
It causes problem in below situation:
In current loop, SDF does not set, but error status is found by
imx_lpci2c_check_clear_error (for example, NDF), then NDF will be cleared
and result has NDF error. However, because SDF does not set in this loop,
it goes not next loop. When SDF is set in next loop,
imx_lpci2c_check_clear_error is re-executed, but as the MSR is cleared,
the result is 0. Then the stop return 0. But it should return NDF error.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
devm_kzalloc needs to pass udevice for first parameter, this phy driver
wrongly pass the priv in phy_device. And because the dev in phy_device
is only valid after phy_connect, in probe phase this dev is NULL, so
we can't use devm_kzalloc, replace it with kzalloc.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When ROM boots from secondary container set, SPL should select
correct offset to load u-boot-atf container.
The implementation uses ROM passover information:
1) For non-eMMC boot partition device, use image offset in ROM
passover data to get u-boot-atf container offset.
2) For eMMC boot partition device, use boot stage (secondary)
in ROM passover data to select correct eMMC boot partition
for u-boot-atf container.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Implement the 'getprisec' subcommand of 'bmode' command for i.MX95 by
reading out the ROM log events. This event is set by the BootROM if it
switched to the secondary copy due to primary copy being corrupted.
Signed-off-by: Fedor Ross <fedor.ross@ifm.com>
Reviewed-by: Marek Vasut <marex@nabladev.com>
