a risc-v simulator
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 
 
vriscv/README.md

32 lines
814 B

# vriscv - a risc-v simulator
Linux and the BBL bootloader can be downloaded, built, and ran on the simulator using:
```
make run
```
## Unit tests
Unit tests can be compiled and run using :
```
make tests
```
## Resources used
RISC-V Specifications:
- https://five-embeddev.com/riscv-isa-manual/latest/instr-table.html (instruction table)
- https://five-embeddev.com/riscv-isa-manual/latest/priv-instr-table.html (privileged instructions)
Device Tree Source :
- https://elinux.org/Device_Tree_Usage
Juraj's Blog, mostly:
- https://jborza.com/post/2021-04-04-riscv-supervisor-mode/
- https://jborza.com/emulation/2021/04/22/ecalls-and-syscalls.html
RISC-V SBI Specifications:
- https://github.com/riscv-non-isa/riscv-sbi-doc/releases
Buildroot fork for nommu linux:
- https://github.com/regymm/buildroot