Upstream DT bindings define "mediatek,mt7623-scpsys" to fall back to
"mediatek,mt2701-scpsys". Align the driver with this convention by
using MT2701 naming throughout.
This also allows the driver to use the upstream
dts/upstream/include/dt-bindings/power/mt2701-power.h header instead of
the local include/dt-bindings/power/mt7623-power.h, since both expose
equivalent power domain definitions.
Rename scp_domain_mt7623 to scp_domain_mt2701, replace SCPSYS_MT7623
enum by SCPSYS_MT2701, and switch all MT7623 power domain defines to
their MT2701 equivalents.
Note:
we intentionally keep the explicit "mediatek,mt7623-scpsys"
compatible entry to avoid breaking legacy boards
(mt7623a_unielec_u7623_02 and mt7623n_bpir2_defconfig) that didn't
switched yet to OF_UPSTREAM. Same for
include/dt-bindings/power/mt7623-power.h that is only used in these
boards.
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260709-mt8188-add-power-domain-v2-4-589ace7d30e2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Upstream DT bindings define "mediatek,mt7629-scpsys" to fall back to
"mediatek,mt7622-scpsys". Align the driver with this convention by
using MT7622 naming throughout.
This also allows the driver to use the upstream
dts/upstream/include/dt-bindings/power/mt7622-power.h header instead of
the local include/dt-bindings/power/mt7629-power.h, since both expose
equivalent power domain definitions.
Rename scp_domain_mt7629 to scp_domain_mt7622, remove the
SCPSYS_MT7629 enum, and switch all MT7629 power domain defines to their
MT7622 equivalents.
Also drop the explicit "mediatek,mt7629-scpsys" compatible entry and
rely on the DT fallback instead.
Suggested-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260709-mt8188-add-power-domain-v2-3-589ace7d30e2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
The MT7981, MT7986, MT7987 and MT7988 SoCs do not have a scpsys power
domain block: none of their device trees carry a "mediatek,*-scpsys"
compatible, so the driver never binds and enabling CONFIG_MTK_POWER_DOMAIN
only builds dead code.
Note: the MT7987 and MT7988 device trees do carry a
"mediatek,mt79xx-power-controller" compatible on their topmisc syscon,
but no U-Boot driver binds it and no node consumes power-domains, so
the symbols are unused there as well.
Remove the unused symbols (CONFIG_MTK_POWER_DOMAIN and
CONFIG_POWER_DOMAIN) from these defconfigs.
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260709-mt8188-add-power-domain-v2-2-589ace7d30e2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Remove the parent field from the mediatek clock private data structures.
This was no longer used other than debug prints.
The uclass_get_device_* functions had the effect of ensuring that
parents were probed. This is done now by having parent providers
probe on bind, so re-probing here is no longer necessary. Clock trees
could have more than one parent anyway, so the existing code was not
completely correct anyway.
Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-19-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Replace complex and fragile parent/grandparent lookup logic with a
simple lookup that matches CLK_PARENT_* flags to registered clock
providers.
Previously, we were walking priv->parent path to find a the matching
provider by either looking at driver name or driver ops. This was
fragile because more than one udevice could match the criteria and the
search depth had different rules depending on the clock type and the
parent type.
This will also enable more simplification in the future since we no
longer have to keep track of the udevice parents.
Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-18-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add a new enum, field and function for registering clock tree types.
These types will be later used when looking up parent clocks. This
will replace fragile code that depends on lookup up devices by driver
names or ops.
We also need a way to ensure that any parent clock trees are probed
before trying to use a clock tree that depends on them. Since the
devicetree does not provide these relationships and there are only
a small number of clock parent providers (2 or 3 per SoC) vs. a large
number of clock trees that depend on them, it will simpler to just
always probe the parent clock trees on bind rather than trying to
add device info to all of the clocks to describe their parent
relations. For this, a mtk_common_clk_parent_bind() is added that the
drivers will use to set DM_FLAG_PROBE_AFTER_BIND.
Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-2-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
U-Boot autostarts the SoC watchdog (CONFIG_WATCHDOG_AUTOSTART default
y) and services it from its main loop, but nothing services it after
ExitBootServices()/bootm: an EFI-booted OS that does not take over the
watchdog in time is reset mid-boot at a wall-clock-dependent point.
The MediaTek toprgu can count at most ~16 seconds, once firmware stops
servicing it at the handoff, the OS has whatever is left of those 16
seconds.
On the Genio 700 EVK the generic Ubuntu 26.04 arm64 image is hard-reset
before its first boot reaches the login prompt: the mtk-wdt driver is
a module loaded from the rootfs and cannot win that race. Nothing tells
a generic OS that the watchdog is armed, so the failure is silent and,
from the user's side, indistinguishable from broken firmware.
Disable WATCHDOG_AUTOSTART for the Genio EVK boards (mt8365_evk
directly, mt8188.config for the Genio 510/700).
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20260706133322.68010-1-ccaione@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
The bounds check in do_rw() was written as:
if (cnt + blk > limit)
with cnt and blk declared as uint (unsigned int) and limit as ulong.
C's usual arithmetic conversions are applied per binary operator, so
"cnt + blk" is evaluated entirely in unsigned int and wraps modulo
2^32 before the result is widened for the comparison against limit.
With cnt = 0xFFFFFFFF and blk = 1 the sum wraps to 0 and the guard
passes, allowing blk_dread()/blk_dwrite() to be issued with a 4 GiB
transfer count that runs past the partition (or, when no partition
is selected, the entire device).
Rewrite the check as two comparisons that do not overflow:
if (blk > limit || cnt > limit - blk)
The subtraction is performed in ulong (limit's type), so no truncation
occurs, and the two sub-conditions cover both "start block past end"
and "count would push us past end" failure modes.
Signed-off-by: Naveen Kumar Chaudhary <naveen.osdev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Julien StephanandDavid Lechner
Carlo CaioneandDavid Lechner
Marek VasutandDavid Lechner
Naveen Kumar ChaudharyandTom Rini