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clk: mediaTek: mt8516: add clock tree type flags

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Add clock tree type flags to the mt8516 clock tree structures. These
will be used later for parent lookup.

Clock trees had to be split now that each tree has a different type
flag.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-16-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
This commit is contained in:
David Lechner
2026-07-22 12:01:17 -05:00
parent ad5b38f036
commit 8a95973130
1 changed files with 19 additions and 5 deletions
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drivers/clk/mediatek/clk-mt8516.c
+19 -5
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@@ -744,30 +744,42 @@ static const struct mtk_gate top_clks[] = {
GATE_TOP5(CLK_TOP_APLL12_DIV6, CLK_TOP_APLL12_CK_DIV6, 8),
};
static const struct mtk_clk_tree mt8516_clk_tree = {
static const struct mtk_clk_tree mt8516_apmixed_clk_tree = {
.pll_parent = EXT_PARENT(CLK_PAD_CLK26M),
.ext_clk_rates = ext_clock_rates,
.num_ext_clks = ARRAY_SIZE(ext_clock_rates),
.plls = apmixed_plls,
.num_plls = ARRAY_SIZE(apmixed_plls),
.type = MTK_CLK_TREE_APMIXED,
};
static const struct mtk_clk_tree mt8516_topckgen_clk_tree = {
.ext_clk_rates = ext_clock_rates,
.num_ext_clks = ARRAY_SIZE(ext_clock_rates),
.fdivs_offs = CLK_TOP_DMPLL,
.muxes_offs = CLK_TOP_UART0_SEL,
.plls = apmixed_plls,
.fclks = top_fixed_clks,
.fdivs = top_fixed_divs,
.muxes = top_muxes,
.num_plls = ARRAY_SIZE(apmixed_plls),
.num_fclks = ARRAY_SIZE(top_fixed_clks),
.num_fdivs = ARRAY_SIZE(top_fixed_divs),
.num_muxes = ARRAY_SIZE(top_muxes),
.type = MTK_CLK_TREE_TOPCKGEN,
};
static const struct mtk_clk_tree mt8516_clk_tree = {
.ext_clk_rates = ext_clock_rates,
.num_ext_clks = ARRAY_SIZE(ext_clock_rates),
};
static int mt8516_apmixedsys_probe(struct udevice *dev)
{
return mtk_common_clk_init(dev, &mt8516_clk_tree);
return mtk_common_clk_init(dev, &mt8516_apmixed_clk_tree);
}
static int mt8516_topckgen_probe(struct udevice *dev)
{
return mtk_common_clk_init(dev, &mt8516_clk_tree);
return mtk_common_clk_init(dev, &mt8516_topckgen_clk_tree);
}
static int mt8516_topckgen_cg_probe(struct udevice *dev)
@@ -795,6 +807,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
.name = "mt8516-apmixedsys",
.id = UCLASS_CLK,
.of_match = mt8516_apmixed_compat,
.bind = mtk_common_clk_parent_bind,
.probe = mt8516_apmixedsys_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_apmixedsys_ops,
@@ -805,6 +818,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
.name = "mt8516-topckgen",
.id = UCLASS_CLK,
.of_match = mt8516_topckgen_compat,
.bind = mtk_common_clk_parent_bind,
.probe = mt8516_topckgen_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_topckgen_ops,