Setting GPIO by reading the value of the GPRT register, toggling the
correct bit and then writing it causes input values to transfer to the
output. Here's how (example):
1) set gpio 17 and 18 as input.
2) set gpio 17 output value to 0 (read gprt, change 17 to 0, write).
3) set gpio 18 output value to 0 (read gprt, change 18 to 0, write).
The problem here is that because we set 17 as input, and it's a pull-up,
when we read gprt in step 3, the bit 17 will be 1 and not 0.
Instead of doing read/write/modify, the solution is to keep track
internally of the user set GPIOs, and replace the read step with this
static variable.
Signed-off-by: Tomas Alvarez Vanoli <tomas.alvarez-vanoli@hitachienergy.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
strlen only reports length of string not including terminating 0 byte
but this has to be included in length of receiving buffer on copy so
adjust length check to be correct.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Fastboot currently supports MMC and NAND flash devices. Similarly,
extend the support to SPI flash memories.
Note that in this initial implementation, partitions on the device are
not supported yet, but raw partitions can be set in U-Boot environment.
To define a raw partition descriptor, add an environment variable
similar to the MMC case:
```
fastboot_raw_partition_<raw partition name>=<offset> <size>
```
for example:
```
fastboot_raw_partition_boot=0x0 0x1000000
```
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
As the size of 64b ARM kernels, DTs, vendor firmware, and initial ram
disks continues to grow, the 256MB size limit set aside for image
processing by the bootm command has become too small for some K3
reference boards.
For ARMv7 removing this limit could introduce issues so move the
bootm_size variable to ti_armv7_keystone2.env and remove the limit for
any board using a TI K3 SoC.
Signed-off-by: Bryan Brattlof <bb@ti.com>
To get the [] annotation working with python 3.7 and 3.8, import
annotations.
Reported-by: Tim Harvey <tharvey@gateworks.com>
Fixes: 21bc3433a4 ("binman: rework dropping absent entries from packaged image")
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Tim Harvey <tharvey@gateworks.com>
PRAM usage is not taken into account when reserving lmb for ARM
architecture, this means that predefined PRAM region is marked as
reserved by the architecture and cannot be used by other users.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
KASLR, or Kernel Address Space Layout Randomization, is a security
feature in the Linux kernel that randomizes the memory location
where the kernel is loaded during boot.
OP-TEE RNG is a Random Number Generator (RNG) component within the
Open Portable Trusted Execution Environment (OP-TEE) which provides
a random number to U-BOOT and U-BOOT provides this random number
as seed value to the LINUX kernel for KASLR.
Add KASLR OPTEE RNG support across K3 devices by enabling the required
configs.
Signed-off-by: Gokul Praveen <g-praveen@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Use new email for community work. Also remove my
capricorn SoM maintainer entry since I do not
have access to this hardware anymore.
Signed-off-by: Anatolij Gustschin <ag.dev.uboot@gmail.com>
i2c updates for v2025.10
- i2c Kconfig updates from Tom
- add some driver dependencies
- added missing include delay.h in iproc_i2c.c
- i2c: muxes: Add PCA9541 i2c arbitrator driver
from Padmarao Begari
- pca954x: add pca9545 support
from Frank Wunderlich
- cmd: i2c: fix build when CFG_SYS_I2C_NOPROBES defined with DM_I2C
From Holger Brunck
This is only a reformatting, with a few grammar fixes (capitalization,
and a missing "is" and "be" added each).
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
Cc: Tom Rini <trini@konsulko.com>
Correct the references for
* the x86 boot protocol description
* the FIT file format
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Introducing documentation support for Qualcomm Dragonwing IQ8 QCS8300
board. Documents the build and flashing steps.
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Systems that use clang may not have gcc installed. Set
HOSTCC to cc and HOSTCXX to c++ like we did before to make those
systems work again.
Fixes: 5f520875bd ("kbuild: Bump the build system to 5.1")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
The GitHub dependabot tool has reported a number of issues recently with
some modules that we use. While unlikely to be exploitable in the way we
use them, update various libraries to the latest.
Reported-by: GitHub dependabot
Signed-off-by: Tom Rini <trini@konsulko.com>
As no platforms use this driver anymore and it's not been converted from
to DM_I2C for use, remove it.
Fixes: ed7fe2bee1 ("ppc: Remove xpedite boards")
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver has not been converted to DM_I2C and the last platform that
used it was removed as well. Remove the driver.
Fixes: 4bbcec08eb ("arm: Remove mx6dlarm2 board")
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver requires that the gdsys legacy driver option also be enabled
in order to build. Express that requirement in Kconfig as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
A large number of mmc drivers cannot build without access to some
platform specific header files. Express those requirements in Kconfig as
well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Instead of returning -EINVAL directly which will not call the cleanup
path to free memory, fix the code to set the error and then goto the
cleanup code.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
While this is interesting and useful for debugging there isn't extremely
useful information so we will only show it if debug is enabled.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Update the ddr phy config values to those created by the mscale_v3.10
tool. The original values were obtained using mscale_v3.10. The v3.10
tool removed ddr phy register values of 0x0.
This has no functional change but makes comparing and patching ddr
configuration easier in addition to slightly shrinking the DRAM config
size.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add dram support for the MT53E1G32D2FW-046 RevC part which is a single die
32Gbit density part vs RevA/B which were dual-die parts:
- use a previously unused EEPROM byte to denote a variant of the
base config to be patched
- add a dram description string
- return the board struct from eeprom_init and pass it to the
spl_dram_init function so that it has access to the EEPROM
- move ddr_init into the spl_dram_init so that it can be patched
in the per-soc init function
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add the configuration register for DDRC_ADDRMAP7 which was added in the
RAP spreadsheet v19. This has no functional change but allows DRAM
configuration to be patched in a later commit.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
These erratas are only useful if USB is enabled. If it is disabled
these erratas might cause issues.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
The options related to FSL_SEC_MON are part of the chain of trust
related options and should be under that menu, so move it there.
Furthermore we don't need to prompt for the driver itself but do need to
allow for configuration of the monitor endianess.
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of splitting the i.MX parts of FSL_ESDHC out from the more
legacy parts, the FSL_ESDHC_IMX symbol was added. This platform is the
only one which was not converted correctly.
Fixes: e37ac717d7 ("Convert to use fsl_esdhc_imx for i.MX platforms")
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable standard boot for the phycore-imx8mp and use it as default. Add
all variables required for standard boot to the environment.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Tested-by: Martin Schwan <m.schwan@phytec.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
i.MX95 B0 uses image container format v2 and needs DUMMY_DDR so that
update imximage.cfg and container.cfg for it.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
To support PQC container format which is used for post quantum
authentication on new i.MX parts like i.MX94
The major changes compared to legacy container format is in
signature block, new container tag and version, and new alignment
of container header.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
i.MX95 B0 uses image container format v2, and `one container header
occupies 0x4000, so that CMD_CNTR_VERSION needs to be added.
The purpose of CMD_DUMMY_DDR is to create a dummy image entry in boot
container prior the DDR OEI image entry. ROM reads the address of DUMMY
DDR image entry and passes it to DDR OEI in OEI entry function as
parameter value, in order to indicate the offset of training data with
the boot container.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Since i.MX94, the ELE get_info structure is updated to add
OEM PQC SRK hash, so update it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Enable the network stack, the designware ethernet driver and
corresponding glue driver. The Lichee Pi 4A board ships two RTL8211F
phys, both attached to GMAC 0, thus support for Realtek phys and DM
support for MDIO devices are enabled as well.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
TH1520 SoC ships two MAC controllers based on Designware Ethernet IP
that are capable of Gigabit operation. Describe them in SoC devicetree
and enable them for Lichee Pi 4A.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The Designware IP integrated in TH1520 SoC requires extra clock
configuration to operate correctly. The Linux kernel's T-Head DWMAC glue
driver is ported and adapted to U-Boot's API.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
TH1520 SoC ships DMA peripherals that could only reach the first 32-bit
range of memory, for example, the GMAC controllers. Let's limit the
usable top of RAM below 4GiB to ensure DMA allocations are accessible to
all peripherals.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Unlike the gate clocks which make no use of flags, most dividers in
TH1520 SoC are one-based, thus are applied with CLK_DIVIDER_ONE_BASED
flag. We couldn't simply ignore the flag, which causes wrong results
when calculating the clock rates.
Add a member to ccu_div_internal for defining the flags, and pass it to
divider_recalc_rate(). With this fix, frequency of all the clocks match
the Linux kernel's calculation.
Fixes: e6bfa6fc94 ("clk: thead: Port clock controller driver of TH1520 SoC")
Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Holger BrunckandTom Rini
Tomas Alvarez VanoliandTom Rini
Andrew GoodbodyandTom Rini
Ariel D'AlessandroandTom Rini
Bryan BrattlofandTom Rini
Yannic MoogandTom Rini
Francesco DolciniandTom Rini
Gokul PraveenandTom Rini
Anatolij GustschinandTom Rini
Fiona KluteandHeinrich Schuchardt
Balaji SelvanathanandHeinrich Schuchardt
Mark KettenisandTom Rini
Tim HarveyandFabio Estevam
David ZangandFabio Estevam
Leonard AnderweitandFabio Estevam
Alice GuoandFabio Estevam
Ye LiandFabio Estevam
Yao ZiandLeo Yu-Chi Liang