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Merge tag 'mmc-2025-07-16' of https://source.denx.de/u-boot/custodians/u-boot-mmc

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Drop unused kona_sdhci driver
Tighten config dependencies and a minor cleanup
This commit is contained in:
Tom Rini
2025-07-17 11:39:07 -06:00
parent 3b4604a40b fee5f4b619
commit d63b99748f
4 changed files with 14 additions and 151 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/mmc/Kconfig
+10 -16
View File
@@ -284,7 +284,7 @@ config MMC_DW_K3
config MMC_DW_ROCKCHIP
bool "Rockchip SD/MMC controller support"
depends on OF_CONTROL
depends on OF_CONTROL && ARCH_ROCKCHIP
depends on MMC_DW
help
This enables support for the Rockchip SD/MMM controller, which is
@@ -391,6 +391,7 @@ config MVEBU_MMC
config MMC_OMAP_HS
bool "TI OMAP High Speed Multimedia Card Interface support"
depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
select DM_REGULATOR_PBIAS if DM_REGULATOR
help
This selects the TI OMAP High Speed Multimedia card Interface.
@@ -597,7 +598,7 @@ config MMC_SDHCI_BCM2835
config MMC_SDHCI_BCMSTB
tristate "SDHCI support for the BCMSTB SD/MMC Controller"
depends on MMC_SDHCI
depends on MMC_SDHCI && (ARCH_BCMSTB || ARCH_BCM283X)
help
This selects the Broadcom set-top box SD/MMC controller.
@@ -660,19 +661,9 @@ config MMC_SDHCI_F_SDH30
If you have a controller with this interface, say Y here.
If unsure, say N.
config MMC_SDHCI_KONA
bool "SDHCI support on Broadcom KONA platform"
depends on MMC_SDHCI
help
This selects the Broadcom Kona Secure Digital Host Controller
Interface(SDHCI) support.
This is used in Broadcom mobile SoCs.
If you have a controller with this interface, say Y here.
config MMC_SDHCI_MSM
bool "Qualcomm SDHCI controller"
depends on MMC_SDHCI
depends on MMC_SDHCI && ARCH_SNAPDRAGON
help
Enables support for SDHCI 2.0 controller present on some Qualcomm
Snapdragon devices. This device is compatible with eMMC v4.5 and
@@ -718,7 +709,7 @@ config MMC_SDHCI_ROCKCHIP
config MMC_SDHCI_S5P
bool "SDHCI support on Samsung S5P SoC"
depends on MMC_SDHCI
depends on MMC_SDHCI && S5P
help
This selects the Secure Digital Host Controller Interface (SDHCI)
on Samsung S5P SoCs.
@@ -740,7 +731,7 @@ config MMC_SDHCI_SNPS
config MMC_SDHCI_STI
bool "SDHCI support for STMicroelectronics SoC"
depends on MMC_SDHCI && OF_CONTROL
depends on MMC_SDHCI && OF_CONTROL && ARCH_STI
help
This selects the Secure Digital Host Controller Interface (SDHCI)
on STMicroelectronics STiH410 SoC.
@@ -794,6 +785,7 @@ config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
config MMC_SDHCI_ZYNQ
bool "Arasan SDHCI controller support"
depends on OF_CONTROL
depends on ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2 || ARCH_ZYNQ || ARCH_ZYNQMP
depends on MMC_SDHCI
help
Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform
@@ -852,7 +844,7 @@ config GENERIC_ATMEL_MCI
config STM32_SDMMC2
bool "STMicroelectronics STM32H7 SD/MMC Host Controller support"
depends on OF_CONTROL
depends on OF_CONTROL && (ARCH_STM32 || ARCH_STM32MP)
help
This selects support for the SD/MMC controller on STM32H7 SoCs.
If you have a board based on such a SoC and with a SD/MMC slot,
@@ -886,6 +878,7 @@ config FSL_SDHC_V2_3
config FSL_ESDHC
bool "Freescale/NXP eSDHC controller support"
depends on ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 || PPC
select FSL_SDHC_V2_3 if ARCH_P1010 || ARCH_BSC9131 || ARCH_BSC9132 \
|| ARCH_C29X
help
@@ -938,6 +931,7 @@ config ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
config FSL_ESDHC_IMX
bool "Freescale/NXP i.MX eSDHC controller support"
depends on MACH_IMX
help
This selects support for the i.MX eSDHC (Enhanced Secure Digital Host
Controller) found on numerous Freescale/NXP SoCs.
drivers/mmc/Makefile
-1
View File
@@ -64,7 +64,6 @@ obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence6.o
obj-$(CONFIG_MMC_SDHCI_CV1800B) += cv1800b_sdhci.o
obj-$(CONFIG_MMC_SDHCI_AM654) += am654_sdhci.o
obj-$(CONFIG_MMC_SDHCI_IPROC) += iproc_sdhci.o
obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o
obj-$(CONFIG_MMC_SDHCI_MSM) += msm_sdhci.o
obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o
obj-$(CONFIG_MMC_SDHCI_NPCM) += npcm_sdhci.o
drivers/mmc/kona_sdhci.c
-132
View File
@@ -1,132 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2013 Broadcom Corporation.
*/
#include <malloc.h>
#include <sdhci.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <asm/kona-common/clk.h>
#define SDHCI_CORECTRL_OFFSET 0x00008000
#define SDHCI_CORECTRL_EN 0x01
#define SDHCI_CORECTRL_RESET 0x02
#define SDHCI_CORESTAT_OFFSET 0x00008004
#define SDHCI_CORESTAT_CD_SW 0x01
#define SDHCI_COREIMR_OFFSET 0x00008008
#define SDHCI_COREIMR_IP 0x01
static int init_kona_mmc_core(struct sdhci_host *host)
{
unsigned int mask;
unsigned int timeout;
if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) {
printf("%s: sd host controller reset error\n", __func__);
return -EBUSY;
}
/* For kona a hardware reset before anything else. */
mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET;
sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
/* Wait max 100 ms */
timeout = 1000;
do {
if (timeout == 0) {
printf("%s: reset timeout error\n", __func__);
return -ETIMEDOUT;
}
timeout--;
udelay(100);
} while (0 ==
(sdhci_readl(host, SDHCI_CORECTRL_OFFSET) &
SDHCI_CORECTRL_RESET));
/* Clear the reset bit. */
mask = mask & ~SDHCI_CORECTRL_RESET;
sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
/* Enable AHB clock */
mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET);
sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET);
/* Enable interrupts */
sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET);
/* Make sure Card is detected in controller */
mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET);
sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET);
/* Wait max 100 ms */
timeout = 1000;
while (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
if (timeout == 0) {
printf("%s: CARD DETECT timeout error\n", __func__);
return -ETIMEDOUT;
}
timeout--;
udelay(100);
}
return 0;
}
int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)
{
int ret = 0;
u32 max_clk;
void *reg_base;
struct sdhci_host *host = NULL;
host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
if (!host) {
printf("%s: sdhci host malloc fail!\n", __func__);
return -ENOMEM;
}
switch (dev_index) {
case 0:
reg_base = (void *)CONFIG_SYS_SDIO_BASE0;
ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO0_MAX_CLK,
&max_clk);
break;
case 1:
reg_base = (void *)CONFIG_SYS_SDIO_BASE1;
ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO1_MAX_CLK,
&max_clk);
break;
case 2:
reg_base = (void *)CONFIG_SYS_SDIO_BASE2;
ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO2_MAX_CLK,
&max_clk);
break;
case 3:
reg_base = (void *)CONFIG_SYS_SDIO_BASE3;
ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO3_MAX_CLK,
&max_clk);
break;
default:
printf("%s: sdio dev index %d not supported\n",
__func__, dev_index);
ret = -EINVAL;
}
if (ret) {
free(host);
return ret;
}
host->name = "kona-sdhci";
host->ioaddr = reg_base;
host->quirks = quirks;
host->max_clk = max_clk;
if (init_kona_mmc_core(host)) {
free(host);
return -EINVAL;
}
add_sdhci(host, 0, min_clk);
return ret;
}
drivers/mmc/mmc.c
+4 -2
View File
@@ -2365,8 +2365,10 @@ static int mmc_startup_v4(struct mmc *mmc)
return -ENOMEM;
memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN);
#endif
if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions))
return -EINVAL;
if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions)) {
err = -EINVAL;
goto error;
}
mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]];