Commit Graph
106610 Commits
Author SHA1 Message Date
Julien StephanandDavid Lechner 89e39800f5 power: domain: mediatek: remove enum scp_domain_type
The driver mapped each compatible to an enum scp_domain_type via the
match data, then used mtk_power_domain_hook() to switch on that enum
and select the per-SoC domain table. This forces every new SoC to add
an enum value and a switch case in shared code.

Store a pointer to the per-SoC table directly in the match data and
drop the enum, the type field, and mtk_power_domain_hook(). This keeps
per-SoC information in the match data where it belongs, making it
possible to later split the SoC-specific tables into standalone drivers.

No functional change intended.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260709-mt8188-add-power-domain-v2-5-589ace7d30e2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 13:54:54 -05:00
Julien StephanandDavid Lechner bd1621d61a power: domain: mediatek: use MT2701 naming instead of MT7623
Upstream DT bindings define "mediatek,mt7623-scpsys" to fall back to
"mediatek,mt2701-scpsys". Align the driver with this convention by
using MT2701 naming throughout.

This also allows the driver to use the upstream
dts/upstream/include/dt-bindings/power/mt2701-power.h header instead of
the local include/dt-bindings/power/mt7623-power.h, since both expose
equivalent power domain definitions.

Rename scp_domain_mt7623 to scp_domain_mt2701, replace SCPSYS_MT7623
enum by SCPSYS_MT2701, and switch all MT7623 power domain defines to
their MT2701 equivalents.

Note:
we intentionally keep the explicit "mediatek,mt7623-scpsys"
compatible entry to avoid breaking legacy boards
(mt7623a_unielec_u7623_02 and mt7623n_bpir2_defconfig) that didn't
switched yet to OF_UPSTREAM. Same for
include/dt-bindings/power/mt7623-power.h that is only used in these
boards.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260709-mt8188-add-power-domain-v2-4-589ace7d30e2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 13:54:54 -05:00
Julien StephanandDavid Lechner 0b4bfb0c97 power: domain: mediatek: use MT7622 naming instead of MT7629
Upstream DT bindings define "mediatek,mt7629-scpsys" to fall back to
"mediatek,mt7622-scpsys". Align the driver with this convention by
using MT7622 naming throughout.

This also allows the driver to use the upstream
dts/upstream/include/dt-bindings/power/mt7622-power.h header instead of
the local include/dt-bindings/power/mt7629-power.h, since both expose
equivalent power domain definitions.

Rename scp_domain_mt7629 to scp_domain_mt7622, remove the
SCPSYS_MT7629 enum, and switch all MT7629 power domain defines to their
MT7622 equivalents.

Also drop the explicit "mediatek,mt7629-scpsys" compatible entry and
rely on the DT fallback instead.

Suggested-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260709-mt8188-add-power-domain-v2-3-589ace7d30e2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 13:54:54 -05:00
Julien StephanandDavid Lechner 76e2f6f221 configs: mediatek: drop unused CONFIG_MTK_POWER_DOMAIN
The MT7981, MT7986, MT7987 and MT7988 SoCs do not have a scpsys power
domain block: none of their device trees carry a "mediatek,*-scpsys"
compatible, so the driver never binds and enabling CONFIG_MTK_POWER_DOMAIN
only builds dead code.

Note: the MT7987 and MT7988 device trees do carry a
"mediatek,mt79xx-power-controller" compatible on their topmisc syscon,
but no U-Boot driver binds it and no node consumes power-domains, so
the symbols are unused there as well.

Remove the unused symbols (CONFIG_MTK_POWER_DOMAIN and
CONFIG_POWER_DOMAIN) from these defconfigs.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260709-mt8188-add-power-domain-v2-2-589ace7d30e2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 13:54:54 -05:00
Julien StephanandDavid Lechner 88364c9ebf power: domain: keep Makefile and Kconfig sorted
Sort the Makefile and Kconfig alphabetically.

No functional change.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://patch.msgid.link/20260709-mt8188-add-power-domain-v2-1-589ace7d30e2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 13:54:54 -05:00
David Lechner f4f1287bd8 clk: mediatek: mt8518: unique driver names
Change driver names for MediaTek mt8518 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-15-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner 3e69cd14e1 clk: mediatek: mt8516: unique driver names
Change driver names for MediaTek mt8516 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-14-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner cc8cb613f4 clk: mediatek: mt8512: unique driver names
Change driver names for MediaTek mt8512 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-13-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner 98c458cd32 clk: mediatek: mt8365: unique driver names
Change driver names for MediaTek mt8365 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-12-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner 82946f1797 clk: mediatek: mt8195: unique driver names
Change driver names for MediaTek mt8195 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-11-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner c99eaea4e9 clk: mediatek: mt8189: unique driver names
Change driver names for MediaTek mt8189 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-10-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner 9a44134779 clk: mediatek: mt8188: unique driver names
Change driver names for MediaTek mt8188 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-9-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner aae6e3b156 clk: mediatek: mt8183: unique driver names
Change driver names for MediaTek mt8183 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-8-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner 9d111995f0 clk: mediatek: mt7988: unique driver names
Change driver names for MediaTek mt7988 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-7-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner bd9bf2ad5e clk: mediatek: mt7987: unique driver names
Change driver names for MediaTek mt7987 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-6-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner ebe95d6a27 clk: mediatek: mt7986: unique driver names
Change driver names for MediaTek mt7986 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-5-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner 9b9ecfdba4 clk: mediatek: mt7981: unique driver names
Change driver names for MediaTek mt7981 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-4-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner 552431a59f clk: mediatek: mt7629: unique driver names
Change driver names for MediaTek mt7629 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-3-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner e17d2af3c6 clk: mediatek: mt7623: unique driver names
Change driver names for MediaTek mt7623 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-2-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner 9b52211d15 clk: mediatek: mt7622: unique driver names
Change driver names for MediaTek mt7622 clocks to be globally unique.
This will allow better build bot testing by allowing all clocks to be
compiled at the same time.

Link: https://patch.msgid.link/20260707-mtk-clk-unique-driver-names-v1-1-283d9a55361e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:41:03 -05:00
David Lechner f518796ffd clk: mediatek: mt7629: remove mt7629_peri_clk_tree
Remove the mt7629_peri_clk_tree struct. Most of the fields are unused
and we can just use mt7629_clk_tree instead as it has the required
fields.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-24-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner e3f5fd01d4 arm: dts: mt7988: remove clock-parent properties
Remove all clock-parent properties from mt7988.dtsi. The clock driver
for this no longer uses this property. And this property would not be
acceptable upstream anyway.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-23-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 9a919ebebb arm: dts: mt7986: remove clock-parent properties
Remove all clock-parent properties from mt7986.dtsi. The clock driver
for this no longer uses this property. And this property would not be
acceptable upstream anyway.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-22-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner c897d9f06e arm: dts: mt7981: remove clock-parent properties
Remove all clock-parent properties from mt7981.dtsi. The clock driver
for this no longer uses this property. And this property would not be
acceptable upstream anyway.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-21-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner d50a79e8fc clk: mediatek: remove mtk_common_clk_infrasys_init()
Remove mtk_common_clk_infrasys_init() and replace callers with
mtk_common_clk_init() as there is no longer any difference between
these functions.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-20-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner baf76de595 clk: mediatek: drop parent udevice field
Remove the parent field from the mediatek clock private data structures.
This was no longer used other than debug prints.

The uclass_get_device_* functions had the effect of ensuring that
parents were probed. This is done now by having parent providers
probe on bind, so re-probing here is no longer necessary. Clock trees
could have more than one parent anyway, so the existing code was not
completely correct anyway.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-19-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 8ef0ad4c7a clk: mediatek: use registered provider for parent lookup
Replace complex and fragile parent/grandparent lookup logic with a
simple lookup that matches CLK_PARENT_* flags to registered clock
providers.

Previously, we were walking priv->parent path to find a the matching
provider by either looking at driver name or driver ops. This was
fragile because more than one udevice could match the criteria and the
search depth had different rules depending on the clock type and the
parent type.

This will also enable more simplification in the future since we no
longer have to keep track of the udevice parents.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-18-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner eac5696bb8 clk: mediaTek: mt8518: add clock tree type flags
Add clock tree type flags to the mt8518 clock tree structures. These
will be used later for parent lookup.

Clock trees had to be split now that each tree has a different type
flag.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-17-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 8a95973130 clk: mediaTek: mt8516: add clock tree type flags
Add clock tree type flags to the mt8516 clock tree structures. These
will be used later for parent lookup.

Clock trees had to be split now that each tree has a different type
flag.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-16-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner ad5b38f036 clk: mediaTek: mt8512: add clock tree type flags
Add clock tree type flags to the mt8512 clock tree structures. These
will be used later for parent lookup.

Clock trees had to be split now that each tree has a different type
flag.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-15-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 6795ecfb0a clk: mediaTek: mt8365: add clock tree type flags
Add clock tree type flags to the mt8365 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-14-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 5c15fdc8e0 clk: mediaTek: mt8195: add clock tree type flags
Add clock tree type flags to the mt8195 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-13-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 9ad117b8fc clk: mediaTek: mt8189: add clock tree type flags
Add clock tree type flags to the mt8189 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-12-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 8ae02df8a3 clk: mediaTek: mt8188: add clock tree type flags
Add clock tree type flags to the mt8188 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-11-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 7fb926c3cf clk: mediaTek: mt8183: add clock tree type flags
Add clock tree type flags to the mt8183 clock tree structures. These
will be used later for parent lookup.

Clock trees had to be split now that each tree has a different type
flag.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-10-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner eaeeab40b1 clk: mediaTek: mt7988: add clock tree type flags
Add clock tree type flags to the mt7988 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-9-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 3bb8ad2397 clk: mediaTek: mt7987: add clock tree type flags
Add clock tree type flags to the mt7987 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-8-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner de2cffba44 clk: mediaTek: mt7986: add clock tree type flags
Add clock tree type flags to the mt7986 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-7-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner b1c0fb40d6 clk: mediaTek: mt7981: add clock tree type flags
Add clock tree type flags to the mt7981 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-6-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 72983e2553 clk: mediaTek: mt7629: add clock tree type flags
Add clock tree type flags to the mt7629 clock tree structures. These
will be used later for parent lookup.

Clock trees had to be split now that each tree has a different type
flag.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-5-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner f28ea3a26a clk: mediaTek: mt7623: add clock tree type flags
Add clock tree type flags to the mt7623 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-4-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 269ba05881 clk: mediaTek: mt7622: add clock tree type flags
Add clock tree type flags to the mt7622 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-3-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 5d631beb2c clk: mediatek: add registration function for clock tree types
Add a new enum, field and function for registering clock tree types.
These types will be later used when looking up parent clocks. This
will replace fragile code that depends on lookup up devices by driver
names or ops.

We also need a way to ensure that any parent clock trees are probed
before trying to use a clock tree that depends on them. Since the
devicetree does not provide these relationships and there are only
a small number of clock parent providers (2 or 3 per SoC) vs. a large
number of clock trees that depend on them, it will simpler to just
always probe the parent clock trees on bind rather than trying to
add device info to all of the clocks to describe their parent
relations. For this, a mtk_common_clk_parent_bind() is added that the
drivers will use to set DM_FLAG_PROBE_AFTER_BIND.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-2-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner 2c8577318a clk: mediatek: mt7622: set parent flag for GATE_APMIXED()
Set the parent flag for GATE_APMIXED() clocks.

By having parent flags on all clocks we can simplify the parent lookup
process. This is the only mediatek clock still without this flag.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-1-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 12:01:17 -05:00
David Lechner a29d3dd85b arm: dts: mt7623: remove duplicate topckgen override
Remove a duplicate topckgen override setting `bootph-all;`. The same
code was written twice in a row (probably copy/paste leftover).

Link: https://patch.msgid.link/20260708-mtk-mt7623-remove-dup-dt-override-v1-1-efffd4b6c12a@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 11:58:58 -05:00
David Lechner dfde529a78 clk: mediatek: mt8189: fix VLP_CK wrong parents
Fix a couple of places where we used the wrong macro to set the parent
flag for vlpcfg_ao_clks.

Fixes: 04b3a834c6 ("clk: mediatek: mt8189: add some VLP clocks")
Link: https://patch.msgid.link/20260706-mtk-clk-mt8189-fix-vlp-parent-v1-1-aedc2f8cc69d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 11:55:23 -05:00
Carlo CaioneandDavid Lechner f309d23e3a configs: mediatek: do not autostart the watchdog on the Genio EVKs
U-Boot autostarts the SoC watchdog (CONFIG_WATCHDOG_AUTOSTART default
y) and services it from its main loop, but nothing services it after
ExitBootServices()/bootm: an EFI-booted OS that does not take over the
watchdog in time is reset mid-boot at a wall-clock-dependent point.

The MediaTek toprgu can count at most ~16 seconds, once firmware stops
servicing it at the handoff, the OS has whatever is left of those 16
seconds.

On the Genio 700 EVK the generic Ubuntu 26.04 arm64 image is hard-reset
before its first boot reaches the login prompt: the mtk-wdt driver is
a module loaded from the rootfs and cannot win that race. Nothing tells
a generic OS that the watchdog is armed, so the failure is silent and,
from the user's side, indistinguishable from broken firmware.

Disable WATCHDOG_AUTOSTART for the Genio EVK boards (mt8365_evk
directly, mt8188.config for the Genio 510/700).

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20260706133322.68010-1-ccaione@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 11:51:19 -05:00
Julien StephanandDavid Lechner 729eadd987 clk: mediatek: mt8188: add missing clock in pericfg_ao
Add CLK_PERI_AO_PCIE_P0_FMEM clock in pericfg_ao.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260701-mt8188-clk-add-missing-clock-in-pericfg-ao-v1-1-13109b199248@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 11:47:38 -05:00
Julien StephanandDavid Lechner 3e9fa1d62e arm: dts: mediatek: add U-Boot dtsi overrides for Genio 510 and Genio 700
U-Boot applies DTS overrides by searching for files in the following
priority order [1]:

  <orig_filename>-u-boot.dtsi
  <CONFIG_SYS_SOC>-u-boot.dtsi
  <CONFIG_SYS_CPU>-u-boot.dtsi
  <CONFIG_SYS_VENDOR>-u-boot.dtsi
  u-boot.dtsi

For Genio 510 and Genio 700, the common mt8188-u-boot.dtsi override is
never applied because none of the lookup paths resolve to it
(CONFIG_SYS_SOC="mediatek", CONFIG_SYS_CPU="armv8",
CONFIG_SYS_VENDOR="mediatek").

Add board-specific overrides for mt8370-genio-510-evk and
mt8390-genio-700-evk that include mt8188-u-boot.dtsi.

While at it, also add mt8188-u-boot.dtsi into
board/mediatek/MAINTAINERS.

[1]: https://docs.u-boot.org/en/stable/develop/devicetree/control.html#adding-tweaks-for-u-boot

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://patch.msgid.link/20260701-fix-genio-510-genio-700-dts-override-v1-1-cb571f8c9296@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 11:47:37 -05:00
Marek VasutandDavid Lechner e7b59552d8 MAINTAINERS: Replace Mediatek with N:
Use N: to match on all mediatek/mtk files, drop the large list of
entries which represent the same set of relevant files and miss a
few in the process.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20260617024105.152655-1-marek.vasut+renesas@mailbox.org
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-07-22 11:47:37 -05:00