vriscv/tests/swlw.s
2023-10-12 18:16:28 +02:00

28 lines
449 B
ArmAsm

.global _start
_start:
# Set base value of a0 to 'test failed'
addi a0, zero, 1
# Store Word 0xBA at 0x104
addi t0, zero, 0x100
addi t1, zero, 0xBA
sw t1, 4(t0)
# Load Word at 0x104 in t0 and t2, using 2 different addressing modes
addi t2, t0, 8
lw t2, -4(t2)
lw t0, 4(t0)
# Compare
beq t0, t1, good
ebreak
good:
beq t0, t2, xtragood
ebreak
xtragood:
addi a0, zero, 0
ebreak