a risc-v simulator
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vhaudiquet 58b4bdb1e6 Memory interface is now MMIO-capable 1 year ago
src Memory interface is now MMIO-capable 1 year ago
tests Added negative offset case for JALR 1 year ago
.clang-format Initial commit 1 year ago
.gitignore Initial commit 1 year ago
Makefile Added unit testing 1 year ago
README.md Added resource in README 1 year ago

README.md

vriscv - a risc-v simulator

Unit tests

Unit tests can be compiled and run using :

make tests

Resources used

RISC-V Specifications:

Juraj's Blog, mostly:

RISC-V SBI Specifications:

Buildroot fork for nommu linux: