lrw/scw reservation
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9dd57071ce
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@ -636,13 +636,19 @@ static void cpu_execute(rv32_cpu_t* cpu, instruction_t* instruction)
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case FUNC75_LRW:
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case FUNC75_LRW:
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// Load-Reserved Word
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// Load-Reserved Word
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cpu->regs.x[instruction->rd] = mem_read32(address);
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cpu->regs.x[instruction->rd] = mem_read32(address);
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// TODO register reservation set that subsumes the bytes in word
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cpu->load_reservation = address;
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break;
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break;
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case FUNC75_SCW:
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case FUNC75_SCW:
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// Store-Conditional Word
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// Store-Conditional Word
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// TODO succeed only if the reservation is still valid and the reservation set contains the bytes written
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if(cpu->load_reservation == address)
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mem_write32(address, cpu->regs.x[instruction->rs2]);
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{
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cpu->regs.x[instruction->rd] = 0; // TODO write 1 in rd on failure
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mem_write32(address, cpu->regs.x[instruction->rs2]);
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cpu->regs.x[instruction->rd] = 0; // Write 0 in rd on success
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}
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else
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{
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cpu->regs.x[instruction->rd] = 1; // Write 1 in rd on failure
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}
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break;
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break;
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case FUNC75_AMOSWAPW:
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case FUNC75_AMOSWAPW:
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// Atomic Memory Operation SWAP Word
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// Atomic Memory Operation SWAP Word
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@ -200,6 +200,7 @@ typedef struct RV32_CPU
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uint32_t csr[CSR_COUNT];
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uint32_t csr[CSR_COUNT];
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rvcpu_privilege_mode_t privilege_mode;
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rvcpu_privilege_mode_t privilege_mode;
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uint32_t load_reservation;
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// Simulation data
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// Simulation data
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ssize_t sim_ticks_left; // -1 : simulate forever
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ssize_t sim_ticks_left; // -1 : simulate forever
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