diff --git a/src/cpu/rv32cpu.c b/src/cpu/rv32cpu.c
index 30bc5f8..c71ab7e 100644
--- a/src/cpu/rv32cpu.c
+++ b/src/cpu/rv32cpu.c
@@ -636,13 +636,19 @@ static void cpu_execute(rv32_cpu_t* cpu, instruction_t* instruction)
 				case FUNC75_LRW:
 					// Load-Reserved Word
 					cpu->regs.x[instruction->rd] = mem_read32(address);
-					// TODO register reservation set that subsumes the bytes in word
+					cpu->load_reservation = address;
 					break;
 				case FUNC75_SCW:
 					// Store-Conditional Word
-					// TODO succeed only if the reservation is still valid and the reservation set contains the bytes written
-					mem_write32(address, cpu->regs.x[instruction->rs2]);
-					cpu->regs.x[instruction->rd] = 0; // TODO write 1 in rd on failure
+					if(cpu->load_reservation == address)
+					{
+						mem_write32(address, cpu->regs.x[instruction->rs2]);
+						cpu->regs.x[instruction->rd] = 0; // Write 0 in rd on success
+					}
+					else
+					{
+						cpu->regs.x[instruction->rd] = 1; // Write 1 in rd on failure
+					}
 					break;
 				case FUNC75_AMOSWAPW:
 					// Atomic Memory Operation SWAP Word
diff --git a/src/cpu/rv32cpu.h b/src/cpu/rv32cpu.h
index 9c416b8..9738ceb 100644
--- a/src/cpu/rv32cpu.h
+++ b/src/cpu/rv32cpu.h
@@ -200,6 +200,7 @@ typedef struct RV32_CPU
 	uint32_t csr[CSR_COUNT];
 
 	rvcpu_privilege_mode_t privilege_mode;
+	uint32_t load_reservation;
 
 	// Simulation data
 	ssize_t sim_ticks_left; // -1 : simulate forever