Commit Graph
84081 Commits
Author SHA1 Message Date
Mark KettenisandTom Rini e330c8b83e usb: xhci: Fix root hub descriptor
When a system has multiple XHCI controllers, some of the
properties described in the descriptor of the root hub (such as
the number of ports) might differ between controllers.  Fix this
by switching from a single global hub descriptor to a hub
descriptor per controller.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-27 14:47:58 -05:00
Mark KettenisandTom Rini 06af0e8026 arm: apple: Enable PCIe USB controller
Some Apple Silicon machines have a PCIe XHCI controller in additon
to the DWC3 controllers integrated on the SoC.  On the Mac mini
the Type-A ports are handled by this PCIe controller.  Enabling
it allows the use of these ports in U-Boot.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27 14:47:58 -05:00
Mark KettenisandTom Rini bdebb00d83 pci: Add Apple PCIe controller driver
This driver supports the PCIe controller on the Apple M1 and
M2 SoCs.  The code is adapted from the Linux driver.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27 14:47:58 -05:00
Mark KettenisandTom Rini 08386da0c6 test: Add test for mapping IOMMUs for PCI devices
Test that we correctly probe an IOMMU that is mapped by an
"iommu-map" device tree property of a PCIe controller node.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27 14:47:58 -05:00
Mark KettenisandTom Rini 1fc2329121 iommu: Implement mapping IOMMUs for PCI devices
Systems such as Apple's M1 and M2 SoCs may have separate IOMMUs
for each PCIe root port.  In this case the right IOMMU for a
PCI device behind a particular root port is described by an
"iommu-map" property in the device tree.  Parse this property
and use it to find the right IOMMU device for PCI devices.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27 14:47:58 -05:00
Mark KettenisandTom Rini ba1efb3d24 usb: xhci: Implement DMA mapping
An XHCI controller that sits behind an IOMMU needs to map and unmap
its memory buffers to do DMA.  Implement this by inroducing new
xhci_dma_map() and xhci_dma_unmap() helper functions.  The
xhci_dma_map() function replaces the existing xhci_virt_to_bus()
function in the sense that it returns the bus address in the case
of simple address translation in the absence of an IOMMU.  The
xhci_bus_to_virt() function is eliminated by storing the CPU
address of the allocated scratchpad memory in struct xhci_ctrl.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-27 14:47:58 -05:00
Mark KettenisandTom Rini 862b4a0f32 iommu: apple: Implement DMA mapping operations for Apple DART
Implement translation table support for all the variations of
Apple's DART IOMMU that can be found on Apple's M1 and M2 SoCs.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27 14:47:58 -05:00
Mark KettenisandTom Rini 49a1a4becb test: Add test for IOMMU uclass map/unmap ops
Test that the map and unmap operations work for devices that
have DMA translated by an IOMMU and devices that don't have
DMA translated by an IOMMU.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27 14:47:58 -05:00
Mark KettenisandTom Rini dd6b68ed4f iommu: Add DMA mapping operations
In order to support IOMMUs in non-bypass mode we need device ops
to map and unmap DMA memory.  The map operation enters a mapping
for a region specified by CPU address and size into the translation
table of the IOMMU and returns a DMA address suitable for
programming the device to do DMA.  The unmap operation removes
this mapping from the translation table of the IOMMU.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27 14:47:57 -05:00
Mark KettenisandTom Rini 053827b3c3 serial: s5p: Use IS_ENABLED where appropriate
There are no SPL/TPL variants of CONFIG_CLK_EXYNOS and
CONFIG_ARCH_APPLE, so switch from CONFIG_IS_ENABLED to
IS_ENABLED.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27 14:32:55 -05:00
Tom Rini 424d4f4509 Merge branch '2023-01-27-assorted-updates'
- TI j721s2 support, Nuvoton npcm8xx updates, bouncebuf fix, mkimage fix
  so you can adjust the magic image, pinctrl fixes, ifwitool bugfix
2023-01-27 14:04:51 -05:00
Massimo PegorerandTom Rini b93a65209c mkimage: fit: Support signed configurations in 'auto' FITs
Extend support for signing in auto-generated (-f auto) FIT. Previously,
it was possible to get signed 'images' subnodes in the FIT using
options -g and -o together with -f auto. This patch allows signing
'configurations' subnodes instead of 'images' ones (which are hashed),
using option -f auto-conf instead of -f auto. Adding also -K <dtb> and
-r options, will add public key to <dtb> file with required = "conf"
property.

Summary:
    -f auto => FIT with crc32 images
    -f auto -g ... -o ... => FIT with signed images
    -f auto-conf -g ... -o ... => FIT with sha1 images and signed confs

Example: FIT with kernel, two device tree files, and signed
configurations; public key (needed to verify signatures) is
added to u-boot.dtb with required = "conf" property.

mkimage -f auto-conf -A arm -O linux -T kernel -C none -a 43e00000 \
        -e 0 -d vmlinuz -b /path/to/first.dtb -b /path/to/second.dtb \
        -k /folder/with/key-files -g keyname -o sha256,rsa4096 \
        -K u-boot.dtb -r kernel.itb

Example: Add public key with required = "conf" property to u-boot.dtb
without needing to sign anything. This will also create a useless FIT
named unused.itb.

mkimage -f auto-conf -d /dev/null -k /folder/with/key-files \
        -g keyname -o sha256,rsa4096 -K u-boot.dtb -r unused.itb

Signed-off-by: Massimo Pegorer <massimo.pegorer@vimar.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27 12:51:27 -05:00
Andrew DavisandTom Rini b75ca26b22 common: bouncebuf: Use dma-mapping for cache ops
This matches how this would be done in Linux and these functions
do the alignment for us which makes the code look cleaner.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27 12:51:27 -05:00
Sinthu RajaandTom Rini 9787ecfd0d include: configs: Update env for selecting right dtb
Now that single defconfig shall be used for booting J721S2 EVM and
AM68 SK, the default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:27 -05:00
Sinthu RajaandTom Rini ca04b7da6d arm: dts: k3-am68-sk: Add r5 specific dt support
Add initial support for AM68 SK device tree that runs on R5.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:27 -05:00
Sinthu RajaandTom Rini cc07b6c346 arm: dts: Add support for A72 specific AM68 Starter Kit Base Board
The SK architecture comprises of baseboard and a SOM board. The
AM68 Starter Kit's baseboard contains most of the actual connectors,
power supply etc. The System on Module (SoM) is plugged on to the base
board. Therefore, add support for peripherals brought out in the base
board.

Schematics: https://www.ti.com/lit/zip/SPRR463

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:27 -05:00
Sinthu RajaandTom Rini 3499deaf28 arm: dts: Add initial support for AM68 Starter Kit System on Module
AM68 Starter Kit (SK) is a low cost, small form factor board designed
for TI’s AM68 SoC. TI’s AM68 SoC comprises of dual core A72, high
performance vision accelerators, hardware accelerators, latest C71x
DSP, high bandwidth real-time IPs for capture and display. The SoC is
power optimized to provide best in class performance for industrial
applications.

        AM68 SK supports the following interfaces:
        * 16 GB LPDDR4 RAM
        * x1 Gigabit Ethernet interface
        * x1 USB 3.1 Type-C port
        * x2 USB 3.1 Type-A ports
        * x1 PCIe M.2 M Key
        * 512 Mbit OSPI flash
        * x2 CSI2 Camera interface (RPi and TI Camera connector)
        * 40-pin Raspberry Pi GPIO header

SK's System on Module (SoM) contains the SoC, PMIC, DDR and OSPI flash.
Therefore, add support for the components present on the SoM.

Schematics: https://www.ti.com/lit/zip/SPRR463
TRM: http://www.ti.com/lit/pdf/spruj28

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:27 -05:00
Sinthu RajaandTom Rini 554f8e84b6 board: ti: j721s2: Add board_init and support for selecting DT based on EEPROM
Add the board_init_f API for SPL and run the platform-required SoC
initialization.

Add the functionality for board name-based DTB selection from FIT
within SPL. This will make it easier to utilise one defconfig for
both the EVM and the SK.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:27 -05:00
Sinthu RajaandTom Rini fca27ee8b9 arch: mach-k3: Update board specific API name to K3 generic API name
Although the board_init_f API initialises the SoC, the API name is
incorrectly specified and misleads the functionality. This file should
only include k3-specific functionality. Change the API's name to something
more K3-specific and separate the function to make it more modular.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:27 -05:00
Sinthu RajaandTom Rini 1aaf9df197 board: ti: j721s2: Add support for detecting multiple device trees
Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.

Also restrict multpile EEPROM reads by verifying if EEPROM is already
read

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:26 -05:00
Sinthu RajaandTom Rini ad45a17578 board: ti: j721s2: Enable support for reading EEPROM at next alternate address
J721S2 EVM has EEPROM populated at 0x50. AM68 SK has EEPROM populated at
next address 0x51 in order to be compatible with RPi. So start looking
for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:26 -05:00
Sinthu RajaandTom Rini 24bbe09a91 board: ti: j721s2: Add support to update board_name for am68-sk
Update setup_board_eeprom_env() to choose the right board name
for am68-sk.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-27 12:51:26 -05:00
Sinthu RajaandTom Rini 76361af76c configs: j721s2_evm: Enable configs to store env in MMC FAT partition
J721S2 EVM used to store env on eMMC, since EVM and SK uses same
defconfig and there is no eMMC on SK, we need to keep env in an
interface which available on both EVM and SK. So, save env in FAT
partition of MMC SD Card.

Enable defconfigs relevant for storing env on FAT partition of MMC.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:26 -05:00
Sinthu RajaandTom Rini 7b6e7270c0 configs: j721s2_evm_a72: Enable support for building multiple dtbs into FIT
Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. Add k3-am68-sk-base-board
dtb along with evm dtb inside DTB FIT image. This helps to use same
defconfig for both EVM and SK

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:26 -05:00
Sinthu RajaandTom Rini ab977c8b91 configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT
Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. This will help to use same
defconfig for both EVM and SK.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:26 -05:00
John KeepingandTom Rini 69c82fa2ea MAINTAINERS: add include/power/ to POWER
Add the related include files to the power MAINTAINERS entry.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27 12:51:26 -05:00
Simon GlassandTom Rini a092f1e906 ifwitool: Fix member access
On a second and third look, a recent patch seems to be writing to the
wrong place - updating offsets from the address of the pointer instead
of what the pointer points to.

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 2d1b2ac13f ("tool: ifwitool: Fix buffer overflow")
Acked-by: Sean Anderson <seanga2@gmail.com>
2023-01-27 12:51:26 -05:00
Michael WalleandTom Rini e71505fc98 pinctrl: fix docstring
Fix the copy and paste error.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27 12:51:26 -05:00
Michael WalleandTom Rini 75013fa724 pinctrl: get rid of some ifdeffery
Don't define an empty version for pinconfig_post_bind(). Just guard the
call and let the linker garbage collection do the rest. This way, we
also don't have to do any guesswork.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-27 12:51:26 -05:00
Michael WalleandTom Rini 72b8c6d1eb pinctrl: don't fall back to pinctrl_select_state_simple()
If CONFIG_PINCTRL_FULL is enabled, never fall back to the simple
implementation. pinctrl_select_state() is called for each device and it
is expected to fail. A fallback to the simple imeplementation doesn't
make much sense.

To keep the return code consistent, we need to change the -EINVAL (which
was ignored before) to -ENOSYS.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27 12:51:26 -05:00
Jim LiuandTom Rini 337bc26f05 arm: npcm8xx: add security feature header
The NPCM driver can use on npcm7xx/npcm8xx
so add npcm8xx header for driver.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-01-27 12:51:26 -05:00
Jim LiuandTom Rini a3c191aec0 ARM: config: enable function for nuvoton npcm845 bmc
Enable npcm845 i2c、ethernet、REGULATOR and security feature

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-01-27 12:51:26 -05:00
Jim LiuandTom Rini 04bd6c8997 ARM: dts: npcm8xx: add npcm845 function node
Add functaion node list as below:
1. i2c
2. gmac
3. otp
4. aes
5. sha
6. rng
7. serial

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-01-27 12:51:26 -05:00
Tom Rini 9ddbd70ff9 Merge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx chnages for v2023.04-rc1

makefile:
- Add multi_dtb_fit dependency

clk:
- Handle error cases

microblaze:
- Disable falcon mode and cleanup code around

xilinx:
- Enable regular expression matching in board_fit_config_name_match()
- Fix FRU handling for 0xC1 format
- Fix Xilinx legacy format eeprom parsing

zynqmp:
- Some DT updates/cleanups
- Fix IDcode for xck24
- Remove empty mini config files
- Add support for k24

versal:
- Remove empty mini config files

versal_net:
- Setup timer when runs in EL3
- Build u-boot.elf for mini configurations

zynq-gem:
- Add support for new compatible strings
- Remove support for Avnet Ultrazedev SOM
- Handle SGMII with PCS phy

spi:
- Add support for gigadevice parts

misc:
- Remove CONFIG_TARGET_VENUS ifdef
- Add missing headers to remove sparse warnings
2023-01-27 10:15:39 -05:00
Algapally Santosh SagarandMichal Simek f0f86d39fe fru: ops: Display FRU fields properly for 0xc1 fields
FRU data is not displayed properly in case of 0xc1 fields.
The 0xC1 can be used in two cases.
1. Char record type 8-bit ASCII + Latin 1 with length of 1.
(For example board revision 'A')

2. C1h (type/length byte encoded to indicate no more info fields).
which can follow by 00h to fill all remaining unused space

Hence removed the check end-of-the field c1 to allow c1 fields.

"ASCII+LATIN1" is defined as the printable characters from the
first set of 256 characters of Unicode 6.2 (U+0000h through U+00FFh,
inclusive) expressed as an eight-bit value. (Unicode follows ISO/IEC
8859-1 in the layout of printable characters up to U+00FFh).

So, print only printable chars and limit range from 0x20 ' ' to 0x7e '-'
which will be also indication if 0xc1 behaves as record with one char or
end of record.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4198d73de600627872c80a5b07e5068502c589d7.1674648379.git.michal.simek@amd.com
2023-01-27 08:49:24 +01:00
Michal Simek 5563167e6e xilinx: board: Update logic in xilinx_read_eeprom_legacy
When eeprom has random content printing random chars can stuck U-Boot.
That's why update legacy eeprom format decoding algorithm to copy only
maximum amount of chars allocated for fields.
And also print them directly from desc structure.

Previous algorithm was printing strings first directly from eeprom content
and then copy them to desc structure.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com
2023-01-27 08:48:32 +01:00
Michal Simek e6c62537db xilinx: board: Fix xilinx_eeprom_legacy_cleanup()
When ethernet mac address contains 0x20 or 0xff MAC address is changed and
bytes are converted to zeros. That's why fix decoding algorithm to ignore
fields where MAC address is stored and all non printable chars (including
space) are zeroed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com
2023-01-27 08:48:32 +01:00
Michal Simek b86b135fc6 xilinx: board: Use ETH_ALEN macro for mac address size
Use predefined macro for eth_mac legacy format.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com
2023-01-27 08:48:32 +01:00
Stefan RoeseandMichal Simek a33ad8051e net: zynq_gem: Wait for SGMII PCS link in zynq_gem_init()
In our system using ZynqMP with an external SGMII PHY it's necessary
to wait for the PCS link and auto negotiation to finish before the xfer
starts. Otherwise the first packet(s) might get dropped, resulting in a
delay at the start of the ethernet transfers.

This is only done when the PHY link is already up, which is done in
phy_startup(). As waiting for the PHY link bits via pcsstatus does not
make much sense, when the link is not available in general (e.g. no
cable connected).

This patch adds the necessary code including a minimal delay of 1 ms
which fixes problems of dropped first packages.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@amd.com>
Cc: Katakam Harini <harini.katakam@amd.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Sean Anderson <sean.anderson@seco.com>
Link: https://lore.kernel.org/r/20230125070908.1343256-1-sr@denx.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:47:37 +01:00
Algapally Santosh SagarandMichal Simek b387c25824 drivers: mmc: Change datatype of tuning_loop_counter to int
tuning_loop_counter is of char type, which is not capable of handling
the entire data range of this variable. This is pointed by below sparse
warning. Change datatype to int to fix this.
warning: comparison is always false due to limited range of data type.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-5-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:42:47 +01:00
Algapally Santosh SagarandMichal Simek 1d15612b99 xilinx: versal: Add missing header
Add missing prototype to fix the sparse warning, warning: no
previous prototype for 'do_go_exec' [-Wmissing-prototypes].

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:42:47 +01:00
Algapally Santosh SagarandMichal Simek 508e1aa58c gpio: zynqmp: Handle error from get_gpio_modepin
There is a unused variable ret, due to which we are getting sparse warning
as below.
warning: variable 'ret' set but not used [-Wunused-but-set-variable].

Return ret incase of error.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:42:47 +01:00
Algapally Santosh SagarandMichal Simek fb737f1ed8 xilinx: common: Include header file to fix warning
Prototype is missing for board_get_usable_ram_top, which is pointed by
below sparse warning. Include init.h header file to fix this.

warning: no previous prototype for 'board_get_usable_ram_top'
[-Wmissing-prototypes].

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:42:47 +01:00
Michal Simek cd04c95926 arm64: versal-net: Enable remaking ELF from bin
U-Boot is composing u-boot.bin from u-boot-nodtb.bin with appended
dts/dt.dtb. It means U-Boot doesn't have DTB inside. When REMAKE_ELF is
enabled make will also create u-boot.elf which is recreated from
u-boot.bin. Below is build output for mini configuration how ELF is
recreated.

cat arch/arm/dts/versal-net-mini.dtb > dts/dt.dtb
cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin
cp dts/dt.dtb u-boot.dtb
cp u-boot-dtb.bin u-boot.bin
aarch64-linux-gnu-objcopy -I binary -B aarch64 -O elf64-littleaarch64
 u-boot.bin u-boot-elf.o
aarch64-linux-gnu-ld.bfd u-boot-elf.o -o u-boot.elf -EL -T u-boot-elf.lds
 --defsym="_start"=0xBBF00000 -Ttext=0xBBF00000

It is useful to have u-boot.elf present because Xilinx XSDB debugger can
load ELF file and user doesn't need to specify loading address for
u-boot.bin.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ca550c5c4bf908e757a49a83fdfab0e7100de45e.1674121617.git.michal.simek@amd.com
2023-01-27 08:41:32 +01:00
Ovidiu PanaitandMichal Simek 2ec3609d10 microblaze: spl: disable falcon mode by default
Drop falcon mode configs from microblaze-generic_defconfig, so that a
defconfig build will still boot into u-boot proper.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230125164157.1638680-3-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:38:34 +01:00
Ovidiu PanaitandMichal Simek 8e2378e559 microblaze: spl: drop boot_linux
Drop boot_linux variable as it is not assigned anywhere. Now that there is
no variable controlling linux boot in spl_start_uboot(), make this
function always return false when falcon mode is enabled.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230125164157.1638680-2-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:38:34 +01:00
Ovidiu PanaitandMichal Simek 4dd5a9fcb5 microblaze: spl: wrap spl_start_uboot() in SPL_OS_BOOT ifdefs
Make spl_start_uboot() available only if CONFIG_SPL_OS_BOOT is enabled,
since it is only used for falcon mode.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20230125164157.1638680-1-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27 08:38:34 +01:00
Tom Rini b3b6cc28c2 Merge tag 'dm-pull-26jan23' of https://source.denx.de/u-boot/custodians/u-boot-dm
FIT improvements with split-elf, especially for Rockchip
Binman positioning by ELF symbol
2023-01-26 21:57:38 -05:00
Tom Rini b6904cc98a Merge https://source.denx.de/u-boot/custodians/u-boot-spi
- fix return code of sf command (Heinrich)
- fix register reads in STIG Mode (Dhruva)
- Infineon s25fs256t support (Takahiro)
2023-01-26 13:07:06 -05:00
Simon Glass 060a65e899 binman: Fix a test-coverage regression
Unfortunately a recent patch snuck through without the require test
coverage. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 571bc4e67d ("binman: Support positioning an entry by and ELF symbol")
2023-01-26 10:47:45 -07:00