Commit Graph
102405 Commits
Author SHA1 Message Date
Casey ConnollyandTom Rini ada314a7ca configs: qualcomm: use fragments for debug UART
The QCM6490 and QCS9100 targets always enable debug UART, but this is
not really optimal for typical users.

Move these debug UART options to config fragments so that they aren't
enabled by default.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20250722-b4-qcom-tooling-improvements-v5-6-df143f1247fc@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Jens ReidelandTom Rini 077ae372da clk/stub: add sc7180-rpmh clock
Stub the RPMh clock controller on SC7180.

Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250826231752.60633-1-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Danila TikhonovandTom Rini 30eb854a56 configs: qcom_defconfig: Enable SM7150 GCC and Pinctrl
Enable the necessary drivers so that SM7150 devices can boot with
qcom_defconfig.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250831004602.699953-5-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:27 -06:00
Danila TikhonovandCasey Connolly 3a44e56290 phy: qcom-qmp-ufs: Import SM7150 tables from Linux
Import the init sequence for the UFS on SM7150.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250831004602.699953-4-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Danila TikhonovandCasey Connolly 23fc229eb4 pinctrl: qcom: add SM7150 pinctrl driver
This SoC features a pinctrl block with north, south, and west tiles
accessible to the AP.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Co-developed-by: Jens Reidel <adrian@mainlining.org>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Link: https://lore.kernel.org/r/20250831004602.699953-3-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Danila TikhonovandCasey Connolly 834cbecce7 clk/qcom: add driver for SM7150 GCC
Add a clock driver for the SM7150 SoC. This driver can enable necessary
clocks for UART, UFS, USB, and MMC.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Co-developed-by: Jens Reidel <adrian@mainlining.org>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250831004602.699953-2-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Stephan GerholdandCasey Connolly ff70183785 serial: msm: Use single character mode
The UART DM controller supports different channel data packing modes,
either the 4-character packing mode (where 32-bit are read/written at once)
or the single-character mode (where only a single character is read/written
at a time). The 4-character mode can be more efficient, but the
single-character mode is much easier to implement.

At the moment, serial_msm uses the 4-character mode. Since the
dm_serial_ops operate on one character at the time, the code goes through
quite some hoops in order to break this down to single characters. This
code is prone to race conditions (e.g. priv->chars_cnt is read from the
registers, then a command is issued, what if another char came in
inbetween?). It also seems to cause another subtle issue with autoboot:

Unlike the previous autoboot failures that happened when UART was
disconnected, this problem occurs when UART is connected and open in a
terminal: For EFI boot, the console size is queried in efi_console.c
query_console_serial() by sending an ANSI escape code via UART. For some
reason, with the current driver we get yet another 0x00 byte (UART break
event?) when reading the reply from serial input. Because of that, reading
the console size fails in efi_console.c, the actual reply remains in the
UART buffer, and later the boot flow aborts because it detects input after
printing a prompt.

Rather than trying to fix the issue in the current complicated approach,
switch the driver to use the single-character mode. This is simple and
straightforward to implement without race conditions:

 - We write one character at a time to UARTDM_TF, as long as the TX FIFO
   has space available (TX_READY). To flush the console before starting
   Linux, we wait for TX_EMPTY.

 - We read one character at a time from UARTDM_RF and strip off the
   additional error information (assuming there is something in the
   RX FIFO, as indicated by RX_READY).

In this mode, querying the serial console size works and autoboot is no
longer interrupted. The overall code is also much shorter.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-6-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Stephan GerholdandCasey Connolly 5b83a081a7 serial: msm: Re-enable after resetting
The documentation for the UART controller in the APQ8016E specifies that
both RESET and ENABLE commands must be issued to set up the receiver and
transmitter, but at the moment we only issue RESET. This doesn't seem to
cause issues in practice (looks like the reset already re-enables the
receiver/transmitter), but let's add the two writes to RX_ENABLE/TX_ENABLE
to better match the recommendations in the documentation.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-5-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Stephan GerholdandCasey Connolly eac35b9027 serial: msm: Reset after writing to DMEN
According to the documentation of the UART controller in the APQ8016E TRM,
clearing bits inside UARTDM_DMEN requires resetting the transmitter and/or
receiver. We do reset inside uart_dm_init(), but before writing to
UARTDM_DMEN. This doesn't seem to cause problems in practice, but let's
move the reset to the end of uart_dm_init() to better match the
recommendations in the documentation.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-4-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Stephan GerholdandCasey Connolly a8f5b34ec5 serial: msm: Cleanup register naming
Some of the register definitions are inconsistently named (likely copied
as-is from Qualcomm's Little Kernel/LK bootloader, which uses the
MSM_BOOT_UART naming scheme). Rename them to be in line with the other
register definitions and move them up to be next to the related register.

No functional change.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-3-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Stephan GerholdandCasey Connolly 080d19b6e6 Revert "serial: serial_msm: Delay initialization to let pins stabilize"
There have been issues with autoboot on DB410c for years, where autoboot
gets interrupted by spurious input on the UART console. Back in 2021, I've
tried to fix this by inserting a delay before UART initialization, but it
has turned out this is not working reliably either.

It looks like the root cause has always been the lack of bias-pull-up,
which was causing the RX line to be floating when UART is disconnected.
The delay does not seem to be needed anymore when applying bias-pull-up,
so drop it again in favor of the proper fix.

This reverts commit ad7e967738.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-2-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Stephan GerholdandCasey Connolly 4e26c1e2fa board: dragonboard410c: Drop now unneeded bootph-all for console
This is applied for all devices upstream in Linux now (when using the
console-specific pinctrl templates).

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250908-db410c-autoboot-fixes-v2-1-316ed98e0143@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Alexey MinnekhanovandCasey Connolly c293827081 qcom_defconfig: Enable pinctrl driver for SDM630/660
Pin controller driver for SDM630/636/660 SoCs was added in
b4420a0c9e ("drivers: pinctrl: Add Qualcomm SDM630/660 TLMM driver"),
but not enabled in qcom_defconfig. Correct that omission.

Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250914145620.1962735-1-alexeymin@minlexx.ru
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly dcc5a60745 gpio: qcom: Support GPIOs on PM7325 PMIC
The GPIOs on PM7325 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button Fairphone 5 smartphone.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250917-spmi-gpio-pm7325-v1-1-6b75c2c62d8b@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly efbdf3dbb0 board/qualcomm: add debug config fragment for SM6350
Add a fragment similar to others to enable earlycon.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly 9049b05a6e qcom_defconfig: Enable SM6350 clock and pinctrl drivers
Enable the drivers so that SM6350 devices can boot with qcom_defconfig.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly 8f12776f1b gpio: qcom: Support GPIOs on PM6350 PMIC
The GPIOs on PM6350 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button Fairphone 4 smartphone.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly a6b78ac5d0 regulator: qcom-rpmh-regulator: add support for pm6150l regulators
Add the pm6150l regulator data found on the Qualcomm SM6350 platform.
The tables are imported from the Linux driver. The SMPS regulators were
not added now.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly a206bd063b phy: qcom: Add SM6350 to QMP UFS PHY driver
The UFS on SM6350 can reuse the SDM845 configuration, just like in
Linux.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly 11003e4780 iommu: qcom-smmu: Add qcom,sm6350-smmu-500 compatible
This SoC doesn't have the generic compatible.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly 5af87d8088 drivers: pinctrl: Add Qualcomm SM6350 TLMM driver
Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on SM6350 SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly 4ca964ac8c clk/stub: add sm6350-rpmh clock
Stub the RPMh clock controller on SM6350.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly 4bae582792 clk/qcom: Add SM6350 clock driver
Add Clock driver for the GCC block found in the SM6350 SoC.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
2025-10-29 12:27:33 +01:00
Paul SajnaandCasey Connolly 1cab8d1e22 qcom_defconfig: enable watchdog command
CONFIG_WDT and CONFIG_WDT_QCOM were previously added in
https://source.denx.de/u-boot/u-boot/-/commit/530764de9fc8539cd2354501e9c42804bc4c4dac

U-Boot and Linux pet the watchdog by default,
but it's helpful to also have the command to control the watchdog,
(CONFIG_CMD_WDT)
so it can be manually disabled by the user, for example, if the kernel
is expected to stall during debugging with kgdb.

Signed-off-by: Paul Sajna <sajattack@postmarketos.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250923-qcom_config_enable_cmd_wdt-v1-1-70cccf9f01e3@postmarketos.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly 202f5975c2 board/qualcomm: add debug config fragment for MSM8953
Add a fragment similar to others to enable earlycon.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-5-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly 759646df3a doc: board/qualcomm: Clean up debug options for QUP UART
CONFIG_BAUDRATE is not relevant for the QUP driver, and neither is
CONFIG_DEBUG_UART_SKIP_INIT so remove them from the doc.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-4-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly beaabce9cc serial: msm-geni: Update kconfig name for DEBUG_UART_MSM_GENI
The previous description "Qualcomm snapdragon" barely tells the user
anything, update the name so that it's clear which configs the user can
choose between, namely the older QUP driver, or the newer GENI driver.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-3-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly 43a2fc67d3 clk/qcom: sm8250: Remove unused defines
Clean up some defines which are not used in the driver.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-2-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
Luca WeissandCasey Connolly e4b35d364e pinctrl: qcom: sc7280: Fix offset of UFS_RESET
There's no WEST, SOUTH or NORTH in sc7280 pinctrl. Fix the offset of the
ufs_reset pin.

Fixes: 51ec7fdb64 ("pinctrl: qcom: add sc7280 pinctrl driver")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-1-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
David WronekandCasey Connolly 731dc5eb95 gpio: qcom_spmi: add pm660l
This is used for the volume keys on some SDM670 devices.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-5-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
David WronekandCasey Connolly 4cebdcae35 qcom_defconfig: enable pinctrl for sdm670
Enable the SDM670 pinctrl driver.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-4-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:33 +01:00
David WronekandCasey Connolly f977cee372 pinctrl: qcom: add sdm670 pinctrl driver
Add a pinctrl driver for the TLMM block found in the SDM670 SoC.

Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-3-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:32 +01:00
David WronekandCasey Connolly 8111e1357e clk/qcom: sdm845: add support for sdm670
The global clock controller on SDM670 is similar to SDM845, so let's add
support here.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-2-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:32 +01:00
David WronekandCasey Connolly 0e59113025 clk/stub: add sdm670 rpmh clock
Necessary for MMC to successfully probe all clocks.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-1-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:32 +01:00
Tom RiniandCasey Connolly 603b45b0f1 phy: qcom: Rework Kconfig logic around MSM8916_USB_PHY
This PHY driver is required by USB_EHCI_MSM and not useful on its own.
Rather than have it be a prompted option, it should (and currently is)
select'd by USB_EHCI_MSM. Remove the prompt for this option and then
correct the dependency chain (it must select PHY).

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20251003203927.1030052-1-trini@konsulko.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:32 +01:00
Jens ReidelandCasey Connolly bf83c6036e gpio: qcom: qcom_spmi_gpio: add compatible for pm6150l
Add support for the GPIOs in the PM6150L to the new driver.

Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20251005154443.71477-1-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:32 +01:00
Abbarapu Venkatesh YadavandCasey Connolly e51d4d23c7 qcom_defconfig: Enable meminfo command with mapping
Enable meminfo command to be able to see where things are mapped.

Signed-off-by: Abbarapu Venkatesh Yadav <venkyada@qti.qualcomm.com>
Link: https://lore.kernel.org/r/20251010051200.2313081-1-venkyada@qti.qualcomm.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-29 12:27:32 +01:00
Raymond MaoandTom Rini 4cad9faf8d MAINTAINERS: update my email address
Update my email address in the maintainers list.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
2025-10-28 14:37:25 -06:00
Tom Rini 9ed8fafbcd Revert "clk: Return value calculated by ERR_PTR"
This reverts commit 644b4650ee.

While the intention of the above commit is correct, it leads to test
failures in CI that need to be addressed at the same time.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 13:27:27 -06:00
Tom Rini 80a3c2fda2 spi: altera_spi: Add missing <time.h> to altera_spi.c
This driver references the get_timer macro while relying on an
indirection inclusion of <time.h>. Add the missing include directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:53:58 -06:00
Tom Rini a5e6bc86ab spi: Tighten some spi driver dependencies
A few spi drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:52:56 -06:00
Tom Rini f30b6d12da clk: Tighten some clock driver dependencies
A few clock drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:25:23 -06:00
Tom Rini b901d8f15c x86: Rename arch/x86/include/asm/pnp_def.h to include/pnp_def.h
There is nothing x86-centric in this include file, and moving it will
allow for some drivers to be compile-tested on sandbox.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:24:03 -06:00
Tom Rini ddc28ad0f2 mtd: nvmxip: Make use of LBAF for printing lbaint_t
When printing the contents of an lbaint_t variable we need to use LBAF
to print it in order to get the correct format type depending on 32 or
64bit-ness.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:22:46 -06:00
Tom Rini ba05f1a8d7 mtd: spi: sf_dataflash.c: Make use of 'z' for printing size_t
When printing the contents of an size_t variable we need to use z prefix
to the format character in order to get the correct format type
depending on 32 or 64bit-ness.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:21:31 -06:00
Tom Rini bd7bf693de mtd: Correct dependency on SYS_FLASH_CHECKSUM
This feature requires that CFG_SYS_FLASH_BASE is defined and this in
turn is only done in the case of FLASH_CFI_DRIVER && !CFI_FLASH or in
other words, when DM_MTD is not enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:20:18 -06:00
Tom Rini 9465ca3d45 mtd: Add function prototype for mtd_read_oob_bf(...)
The function mtd_read_oob_bf is called by cmd/nand.c but does not have a
prototype in any header. Add this to include/linux/mtd/mtd.h as that is
the most logical place currently.

Fixes: 1fac577207 ("nand: Add a watch command")
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:19:04 -06:00
Tom Rini e15dd01422 clk: Add missing <dm/device.h> to include/clk.h
In this header we make direct references to some dm/device.h functions
while not including the header directly. Add the missing include.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:12:20 -06:00
Andrew GoodbodyandTom Rini a5c83da3cc mtd: nand: Prevent dereference of NULL pointer
In nand_wait_ready there is a loop that includes a NULL check for
chip->dev_ready before it is dereferenced. Use a NULL check once the
loop is exited as well to cover the case where it exits due to a timeout
and it is therefore not known if chip->dev_ready is NULL or not.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2025-10-28 12:11:09 -06:00
Andrew GoodbodyandTom Rini ce1bdedd2f cmd: mtd: Prevent use of uninitialised variable
ret maybe used uninitialised in some cases so instead
initialise it first to prevent this.

This issue was found by Smatch.

Fixes: 9671243e8d (cmd: mtd: Use the subcmd infrastructure to declare mtd sub-commands)
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-10-28 12:10:47 -06:00