This is required since
commit aebb523a23 ("mmc: mmc-uclass: Use max-frequency from device tree with default handling")
and the related patches of the same series.
The error observed without this change is:
Autobooting in 3 seconds, press "<Esc><Esc>" to stop
EXT_CSD[179], PARTITION_CONFIG:
BOOT_ACK: 0x0
BOOT_PARTITION_ENABLE: 0x1 (boot0)
PARTITION_ACCESS: 0x0 (user)
Loading from eMMC ...fit
U-Boot SPL 2026.01-4238dcfcbfe (Jan 09 2026 - 08:19:45 +0000)
For this example it's the following commands which does no longer work
for larger images:
ext4load mmc 0:1 0x88000000 boot/fitImage
On latest master branch the problematic commit gets reverted with
commit c4f5b1d4b0 ("Revert "mmc: mmc-uclass: Use max-frequency from device tree with default handling"")
but for v2026.01 this fix is still required. Maybe it's anyway a good
idea to have this property set explicitly.
Signed-off-by: Adrian Freihofer <adrian.freihofer@siemens.com>
Signed-off-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
gpio4.29 belongs to eth0 and not to emmc0 and is
handled by the mainboard dts and not here in the
cpu module dtsi.
Signed-off-by: Lukas Stockmann <lukas.stockmann@siemens.com>
Signed-off-by: Heiko Schocher <hs@nabladev.com>
When using a fixed 1.8V regulator for vqmmc (indicated by vs18_enable),
attempting to change the voltage produces spurious errors since the
regulator cannot be adjusted. The driver currently attempts the voltage
change, receives -ENOSYS from the regulator subsystem, and reports:
Setting to 1.8V error: -38
esdhc_set_voltage error -5
Fix this by checking vs18_enable early in esdhc_set_voltage() and
returning -ENOTSUPP for all voltage switch requests, not just 3.3V.
This prevents unnecessary regulator operations and eliminates the
error messages when the hardware is correctly configured with a fixed
1.8V supply.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Clocks are now configurable via the common clock framework, however,
users have the option use the legacy clocks if desired. The intent is to
keep the changes minimal for this old SoC.
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
In preparation for CCF migration for IPUv3 separate existing clock code
to legacy files. These will be used by i.MX5 that currently does not
support the CCF. No functional change.
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
This caused linker errors in cases where IPUv3 was enabled (which
defines its own clocks).
Fixes: bfc778cb93 ("driver: pwm: pwm-imx: get and enable per/ipg
clock using dm")
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
This is required for the IPUv3 driver to migrate to CCF, changes are
largely based on the Linux kernel equivalent.
Add new gate2_flags function (also present in the Linux code) to set
required flags.
Add usboh clock to get rid of error.
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
Somehow I missed that ipuv3_fb_shutdown() can be called for inactive
devices, resulting in invalid memory access and preventing the kernel
from booting.
Fixes: 32da6773f62 ("video: imx: ipuv3: refactor to use dm-managed state")
Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
Reviewed-by: David Zang <davidzangcs@gmail.com>
add boottype command, which saves the boot_type
primary (0) or fallback (1) in environment
variable "boottype". If argument "print" is
passed, it also prints the boottype on console.
Signed-off-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Walter Schweizer <walter.schweizer@siemens.com>
In case board is booted from USB, enter fastboot by default to enable
the UUU flashing. In case of abort continue with the regular bootstd
scan. User also has possibility to override the default bootcmd from
the environment. Last but not least, this syncs behavior with other
PHYTEC boards from the i.MX family.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Benjamin Hahn <B.Hahn@phytec.de>
When booting from eMMC, there is error log:
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... MMC: no card present
Add board_mmc_get_env_dev() to get the correct device number.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Both the two boards have clk framework enabled, so rely on serial driver
calling clk_enable to enable the uart clk.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable SPL_CLK_IMX8M to make sure clk_enable could work proper in SPL
phase by using clock framework driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Symbol CONFIG_SPL_DM_REGULATOR_FAN53555 is selected by
SPL_DM_PMIC_FAN53555 and used in a Makefile. But the
symbol definition is missing.
Add the missing configuration symbol.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable PMIC and regulators on MT8365 EVK now that there are drivers for
these. Also enable the associated commands.
Signed-off-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for the PMIC wrapper (pwrap) IP block found on MediaTek
MT8365 and similar SoCs.
On these SoCs the PMIC is connected via SPI. The SPI controller is not
directly visible to the CPU, but only through the PMIC wrapper inside
the SoC.
Signed-off-by: Julien Masson <jmasson@baylibre.com>
Co-developed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Co-developed-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add a new regulator driver for MT6359P and similar PMIC chips.
The MT6359P is a eco version for MT6359 regulator. For the MT8391
platform, we use the MT6359P (MT6365) as the main PMIC. The MT6359 and
MT6359P have different register maps. Therefore, on the MT8391 platform,
we only provide support for the MT6359P. If support for the MT6359 PMIC
it can be added later.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The Name: line of 'mmc info' command prints a trailing space before
newline. This is not useful and shows up as trailing space e.g. when
the output is checked into documentation. Remove the trailing space.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As explained in commit 03d2d5fc00 ("board: sifive: unmatched: set
fdtfile with unquoted variable.") using the syntax of
'fdtfile=CONFIG_DEFAULT_FDT_FILE' in the plain text environment files
will lead to extraneous and problematic "s in the output. This is fixed
by using fdtfile=DEFAULT_FDT_FILE which was introduced recently.
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Christian Marangi <ansuelsmth@gmail.com> says:
This small series consolidate header usage of mdio-mt7531-mmio driver
and improve usage in preparation for support of OF PHY autoprobe.
This driver is still not used (as it will be used by AN7581/AN7583)
in the OF mode (it's used by MT7988 for the MDIO functions)
For OF PHY to be correctly autoprobed, the MDIO driver needs to attached
to the MDIO node (the parent of the PHY nodes)
With such change the MDIO driver can be binded with the MDIO node instead
of the switch node as previously required.
Link: https://lore.kernel.org/r/20260209114515.1916-1-ansuelsmth@gmail.com
The MDIO node is ALWAYS a parent of the MT7531 switch node and the MDIO
registers are in the MT7531 register space (in the context of MT7988
it's all memory-mapped)
With these assumption, we can simplify and permit better usage of PHY OF
automatic probing by binding the mt7531-mdio-mmio driver with the MDIO
node instead of the switch node.
For OF PHY to be correctly autoprobed, the MDIO driver needs to attached
to the MDIO node (the parent of the PHY nodes).
The driver will reach the parent node (the switch node) and will parse
the register address from there.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Instead of having duplicate priv struct for mdio-mt7531-mmio driver in
both driver and header, use the one exposed by the header directly.
This make sure we have consistent priv struct if the driver will be
updated in the future.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Enable SPI flash support for AM62DX EVM by adding Cadence QSPI driver,
configuring 25MHz speed, and enabling SFDP support with Spansion
S28HX-T flash compatibility. Enable required SPI and MTD configs for
both A53 and R5 configurations to allow booting from SPI flash.
Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
sqfs_frag_lookup() reads a 16-bit metadata block header whose lower
15 bits encode the data size. Unlike sqfs_read_metablock() in
sqfs_inode.c, this function does not validate that the decoded size is
within SQFS_METADATA_BLOCK_SIZE (8192). A malformed SquashFS image can
set the size field to any value up to 32767, causing memcpy to write
past the 8192-byte 'entries' heap buffer.
Add the same bounds check used by sqfs_read_metablock(): reject any
metadata block header with SQFS_METADATA_SIZE(header) exceeding
SQFS_METADATA_BLOCK_SIZE.
Found by fuzzing with libFuzzer + AddressSanitizer.
Signed-off-by: Eric Kilmer <eric.kilmer@trailofbits.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Currently when CONFIG_SPL_STACK_R and CONFIG_SPL_SYS_MALLOC_SIMPLE is
enabled then spl_relocate_stack_gd() will setup a layout where the stack
lays inside the heap and grows down to heap start. Also the global data
is part of the heap. This can lead to corruption of stack and global
data. The current layout is:
0x0 +-------------+
. .
. .
gd->malloc_base +- - - - - - -+
| |\
| HEAP/STACK | \
| | } SPL_STACK_R_MALLOC_SIMPLE_LEN
gd->start_addr_sp +- - - - - - -+ / (gd->malloc_limit)
| GLOBAL DATA |/
CONFIG_SPL_STACK_R_ADDR +-------------+
The above broken layout was actually introduced with commit adc421e4ce
("arm: move gd handling outside of C code").
This commit changes the layout so that the stack is below the heap and
the global data. It is now similar to the one before relocation:
0x0+-------------+
. .
. .
+- - - - - - -+
| |
| STACK |
| |
gd->start_addr_sp +-------------+
| GLOBAL DATA |
gd->malloc_base +-------------+
| |\
| HEAP | } SPL_STACK_R_MALLOC_SIMPLE_LEN
| |/ (gd->malloc_limit)
CONFIG_SPL_STACK_R_ADDR +-------------+
Fixes: adc421e4ce ("arm: move gd handling outside of C code")
Cc: Tom Rini <trini@konsulko.com>
Cc: Anshul Dalal <anshuld@ti.com>
Cc: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: Dhruva Gole <d-gole@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Ronald Wahl <ronald.wahl@legrand.com>
These three platforms set CONFIG_SPL_LDSCRIPT value to what the default
value for the question is, once evaluated. Remove this unnecessary line.
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Update am62ax and am62dx tifs-rm-cfg with allocation entries for C7x
core to match with their rm-cfg. Following updates are added for C7x:
- Share split BCDMA tx and rx channels between DM R5 and C7x.
- Share rings for split BCDMA tx and rx channels between DM R5 and C7x.
- Add global events and virtual interrupts for C7x.
Fixes: 01e0127753 ("am62a: yaml: Add board configs for AM62ax")
Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
This patch adds support for the ISSI IS25WP02GG QSPI NOR flash device.
Tested on the Versal VMK180
board in dual-parallel QSPI configuration.
Signed-off-by: jeffrey yu <jeyu@issi.com>
We currently provide default board names for each board in their
respective evm.c file. However for custom boards, this behaviour
overwrites the default DT as set in the defconfig
(CONFIG_DEFAULT_FDT_FILE or CONFIG_DEFAULT_DEVICE_TREE).
This patch changes the default name to be NULL which prevents this
overwrite and allows ti_set_fdt_env to instead fallback to the correct
DT as set in Kconfig.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Update dev-data and clk-data to include wake-up I2C device for J722s.
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Tested-by: Richard Genoud <richard.genoud@bootlin.com>
Niko Mauno <niko.mauno@vaisala.com> says:
In this series, we first introduce a clean-up where we switch to use
predefined bit masks instead of hard-coded values for count and magic
halves in the single-word (32-bit) boot count scheme.
Then we fix a case of missing boot count value masking in single-word
scenario in bootcount.c, which allowed clobbering of the magic half
when storing the value. With this change the clobbering preventing
behavior becomes consistent with existing single word bootcount storing
implementations in bootcount_at91.c and bootcount_davinci.c.
Finally, we enable the DM I2C bootcount driver to work also in single
word (4 byte) mode, in addition to the pre-existing half-word (2 byte)
mode. By default the driver still operates in half word mode as so far,
but can now be used alternatively in single word mode by adding
'size = <0x4>;' in the associated device tree node.
Link: https://lore.kernel.org/r/cover.1770197302.git.niko.mauno@vaisala.com
In addition to pre-existing half-word (2 byte) mode, add support for
the driver to work also in single word (4 byte) mode by adding
'size = <0x4>;' in the device tree node.
Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
When storing the single word bootcount value, apply the bootcount count
mask to prevent clobbering the magic half of the value.
Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
Use predefined bit masks in operations where only the magic half or
only the count half of the 32-bit value are processed.
Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add simple test for zip/unzip/gzwrite commands. The test works as
follows. First, create three buffers with a bit of space between
each of them, fill them with random data, then compress data in
buffer 1 into buffer 2, decompress data in buffer 2 either directly
into buffer 3 or into MMC 1 and then read them back into buffer 3,
and finally compare buffer 1 and buffer 3, they have to be identical.
The buffers are filled with random data to detect out of bounds writes.
Test for various sizes, both small and large and unaligned.
The test uses ut_assert_skip_to_line() to skip over gzwrite progress
bar. Since the progress bar updates fill up the console record buffer,
increase the size of it to compensate.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
What is not being built and tested in CI, breaks. Enable the 'zip'
command in sandbox to get it build tested in preparation for an
actual unit test.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
David Lechner <dlechner@baylibre.com> says:
While compile-testing things to make sure I wasn't breaking other
platforms when making mach-wide changes for mediatek, I kept getting a
warning about a a SPI controller node with the wrong name in
mt7622.dtsi. The first patch addresses this. And since we are here, I
added a second patch to generic names in general in that file even if
they aren't causing warnings.
Link: https://lore.kernel.org/r/20260209-mtk-dtb-fix-spi-bus-bridge-warning-v1-0-84e3e2d8352d@baylibre.com
Lukas StockmannandFabio Estevam
Adrian FreihoferandFabio Estevam
Kory MaincentandFabio Estevam
Brian RuleyandFabio Estevam
Heiko SchocherandFabio Estevam
Primoz FiserandFabio Estevam
Peng FanandFabio Estevam
Tom Rini
David LechnerandPeng Fan
Heinrich SchuchardtandPeng Fan
Julien MassonandPeng Fan
Bo-Chen ChenandPeng Fan
Marek VasutandPeng Fan
Christian MarangiandTom Rini
Paresh BhagatandTom Rini
Eric KilmerandTom Rini
Ronald WahlandTom Rini
Sparsh KumarandTom Rini
Jeffrey YuandTom Rini
Christoph ReiterandTom Rini
Anshul DalalandTom Rini
Chintan VankarandTom Rini
Niko MaunoandTom Rini
Wadim EgorovandTom Rini