clk: imx6q: apply clang-format
Reduces the number of checkpatch warnings in the following commits. Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
This commit is contained in:
Brian Ruley
committed by
Fabio Estevam
Fabio Estevam
parent
670a20de08
commit
3632346f4b
+62
-40
@@ -31,12 +31,28 @@ static struct clk_ops imx6q_clk_ops = {
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.disable = ccf_clk_disable,
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};
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static const char *const usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
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static const char *const periph_sels[] = { "periph_pre", "periph_clk2", };
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static const char *const periph_pre_sels[] = { "pll2_bus", "pll2_pfd2_396m",
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"pll2_pfd0_352m", "pll2_198m", };
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static const char *const uart_sels[] = { "pll3_80m", "osc", };
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static const char *const ecspi_sels[] = { "pll3_60m", "osc", };
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static const char *const usdhc_sels[] = {
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"pll2_pfd2_396m",
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"pll2_pfd0_352m",
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};
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static const char *const periph_sels[] = {
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"periph_pre",
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"periph_clk2",
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};
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static const char *const periph_pre_sels[] = {
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"pll2_bus",
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"pll2_pfd2_396m",
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"pll2_pfd0_352m",
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"pll2_198m",
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};
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static const char *const uart_sels[] = {
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"pll3_80m",
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"osc",
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};
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static const char *const ecspi_sels[] = {
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"pll3_60m",
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"osc",
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};
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static int imx6q_clk_probe(struct udevice *dev)
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{
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@@ -52,13 +68,13 @@ static int imx6q_clk_probe(struct udevice *dev)
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imx_clk_pllv3(dev, IMX_PLLV3_USB, "pll3_usb_otg", "osc",
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base + 0x10, 0x3));
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clk_dm(IMX6QDL_CLK_PLL3_60M,
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imx_clk_fixed_factor(dev, "pll3_60m", "pll3_usb_otg", 1, 8));
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imx_clk_fixed_factor(dev, "pll3_60m", "pll3_usb_otg", 1, 8));
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clk_dm(IMX6QDL_CLK_PLL2_PFD0_352M,
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imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0));
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clk_dm(IMX6QDL_CLK_PLL2_PFD2_396M,
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imx_clk_pfd("pll2_pfd2_396m", "pll2_bus", base + 0x100, 2));
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clk_dm(IMX6QDL_CLK_PLL6,
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imx_clk_pllv3(dev, IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3));
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clk_dm(IMX6QDL_CLK_PLL6, imx_clk_pllv3(dev, IMX_PLLV3_ENET, "pll6",
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"osc", base + 0xe0, 0x3));
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clk_dm(IMX6QDL_CLK_PLL6_ENET,
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imx_clk_gate(dev, "pll6_enet", "pll6", base + 0xe0, 13));
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@@ -68,50 +84,54 @@ static int imx6q_clk_probe(struct udevice *dev)
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return -EINVAL;
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clk_dm(IMX6QDL_CLK_USDHC1_SEL,
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imx_clk_mux(dev, "usdhc1_sel", base + 0x1c, 16, 1,
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usdhc_sels, ARRAY_SIZE(usdhc_sels)));
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imx_clk_mux(dev, "usdhc1_sel", base + 0x1c, 16, 1, usdhc_sels,
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ARRAY_SIZE(usdhc_sels)));
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clk_dm(IMX6QDL_CLK_USDHC2_SEL,
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imx_clk_mux(dev, "usdhc2_sel", base + 0x1c, 17, 1,
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usdhc_sels, ARRAY_SIZE(usdhc_sels)));
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imx_clk_mux(dev, "usdhc2_sel", base + 0x1c, 17, 1, usdhc_sels,
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ARRAY_SIZE(usdhc_sels)));
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clk_dm(IMX6QDL_CLK_USDHC3_SEL,
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imx_clk_mux(dev, "usdhc3_sel", base + 0x1c, 18, 1,
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usdhc_sels, ARRAY_SIZE(usdhc_sels)));
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imx_clk_mux(dev, "usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels,
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ARRAY_SIZE(usdhc_sels)));
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clk_dm(IMX6QDL_CLK_USDHC4_SEL,
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imx_clk_mux(dev, "usdhc4_sel", base + 0x1c, 19, 1,
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usdhc_sels, ARRAY_SIZE(usdhc_sels)));
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imx_clk_mux(dev, "usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels,
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ARRAY_SIZE(usdhc_sels)));
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if (of_machine_is_compatible("fsl,imx6qp")) {
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clk_dm(IMX6QDL_CLK_UART_SEL,
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imx_clk_mux(dev, "uart_sel", base + 0x24, 6, 1, uart_sels,
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ARRAY_SIZE(uart_sels)));
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imx_clk_mux(dev, "uart_sel", base + 0x24, 6, 1,
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uart_sels, ARRAY_SIZE(uart_sels)));
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clk_dm(IMX6QDL_CLK_ECSPI_SEL,
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imx_clk_mux(dev, "ecspi_sel", base + 0x38, 18, 1, ecspi_sels,
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ARRAY_SIZE(ecspi_sels)));
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imx_clk_mux(dev, "ecspi_sel", base + 0x38, 18, 1,
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ecspi_sels, ARRAY_SIZE(ecspi_sels)));
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}
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clk_dm(IMX6QDL_CLK_USDHC1_PODF,
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imx_clk_divider(dev, "usdhc1_podf", "usdhc1_sel",
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base + 0x24, 11, 3));
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imx_clk_divider(dev, "usdhc1_podf", "usdhc1_sel", base + 0x24,
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11, 3));
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clk_dm(IMX6QDL_CLK_USDHC2_PODF,
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imx_clk_divider(dev, "usdhc2_podf", "usdhc2_sel",
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base + 0x24, 16, 3));
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imx_clk_divider(dev, "usdhc2_podf", "usdhc2_sel", base + 0x24,
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16, 3));
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clk_dm(IMX6QDL_CLK_USDHC3_PODF,
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imx_clk_divider(dev, "usdhc3_podf", "usdhc3_sel",
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base + 0x24, 19, 3));
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imx_clk_divider(dev, "usdhc3_podf", "usdhc3_sel", base + 0x24,
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19, 3));
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clk_dm(IMX6QDL_CLK_USDHC4_PODF,
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imx_clk_divider(dev, "usdhc4_podf", "usdhc4_sel",
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base + 0x24, 22, 3));
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imx_clk_divider(dev, "usdhc4_podf", "usdhc4_sel", base + 0x24,
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22, 3));
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if (of_machine_is_compatible("fsl,imx6qp")) {
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clk_dm(IMX6QDL_CLK_UART_SERIAL_PODF,
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imx_clk_divider(dev, "uart_serial_podf", "uart_sel", base + 0x24, 0, 6));
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imx_clk_divider(dev, "uart_serial_podf", "uart_sel",
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base + 0x24, 0, 6));
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clk_dm(IMX6QDL_CLK_ECSPI_ROOT,
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imx_clk_divider(dev, "ecspi_root", "ecspi_sel", base + 0x38, 19, 6));
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imx_clk_divider(dev, "ecspi_root", "ecspi_sel",
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base + 0x38, 19, 6));
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} else {
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clk_dm(IMX6QDL_CLK_UART_SERIAL_PODF,
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imx_clk_divider(dev, "uart_serial_podf", "pll3_80m", base + 0x24, 0, 6));
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imx_clk_divider(dev, "uart_serial_podf", "pll3_80m",
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base + 0x24, 0, 6));
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clk_dm(IMX6QDL_CLK_ECSPI_ROOT,
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imx_clk_divider(dev, "ecspi_root", "pll3_60m", base + 0x38, 19, 6));
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imx_clk_divider(dev, "ecspi_root", "pll3_60m",
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base + 0x38, 19, 6));
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}
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clk_dm(IMX6QDL_CLK_ECSPI1,
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@@ -125,7 +145,8 @@ static int imx6q_clk_probe(struct udevice *dev)
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clk_dm(IMX6QDL_CLK_UART_IPG,
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imx_clk_gate2(dev, "uart_ipg", "ipg", base + 0x7c, 24));
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clk_dm(IMX6QDL_CLK_UART_SERIAL,
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imx_clk_gate2(dev, "uart_serial", "uart_serial_podf", base + 0x7c, 26));
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imx_clk_gate2(dev, "uart_serial", "uart_serial_podf",
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base + 0x7c, 26));
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clk_dm(IMX6QDL_CLK_USDHC1,
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imx_clk_gate2(dev, "usdhc1", "usdhc1_podf", base + 0x80, 2));
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clk_dm(IMX6QDL_CLK_USDHC2,
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@@ -136,11 +157,11 @@ static int imx6q_clk_probe(struct udevice *dev)
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imx_clk_gate2(dev, "usdhc4", "usdhc4_podf", base + 0x80, 8));
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clk_dm(IMX6QDL_CLK_PERIPH_PRE,
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imx_clk_mux(dev, "periph_pre", base + 0x18, 18, 2, periph_pre_sels,
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ARRAY_SIZE(periph_pre_sels)));
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imx_clk_mux(dev, "periph_pre", base + 0x18, 18, 2,
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periph_pre_sels, ARRAY_SIZE(periph_pre_sels)));
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clk_dm(IMX6QDL_CLK_PERIPH,
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imx_clk_busy_mux(dev, "periph", base + 0x14, 25, 1, base + 0x48,
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5, periph_sels, ARRAY_SIZE(periph_sels)));
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imx_clk_busy_mux(dev, "periph", base + 0x14, 25, 1, base + 0x48,
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5, periph_sels, ARRAY_SIZE(periph_sels)));
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clk_dm(IMX6QDL_CLK_AHB,
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imx_clk_busy_divider(dev, "ahb", "periph", base + 0x14, 10, 3,
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base + 0x48, 1));
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@@ -163,7 +184,8 @@ static int imx6q_clk_probe(struct udevice *dev)
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clk_dm(IMX6QDL_CLK_PWM4,
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imx_clk_gate2(dev, "pwm4", "ipg_per", base + 0x78, 22));
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clk_dm(IMX6QDL_CLK_ENET, imx_clk_gate2(dev, "enet", "ipg", base + 0x6c, 10));
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clk_dm(IMX6QDL_CLK_ENET,
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imx_clk_gate2(dev, "enet", "ipg", base + 0x6c, 10));
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clk_dm(IMX6QDL_CLK_ENET_REF,
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imx_clk_fixed_factor(dev, "enet_ref", "pll6_enet", 1, 1));
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@@ -172,7 +194,7 @@ static int imx6q_clk_probe(struct udevice *dev)
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static const struct udevice_id imx6q_clk_ids[] = {
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{ .compatible = "fsl,imx6q-ccm" },
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{ },
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{},
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};
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U_BOOT_DRIVER(imx6q_clk) = {
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