Commit Graph
98421 Commits
Author SHA1 Message Date
Tom Rini 4101b56d0b Merge branch 'nand-next' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next
CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/25178

This merge request add support for cadence raw nand driver for agilex
board and add a fix to meson driver.
2025-03-17 10:18:18 -06:00
Arseniy KrasnovandMichael Trimarchi 448d27f6ad mtd: rawnand: meson: always use OOB bytes during write
If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL),
then driver doesn't copy OOB data from 'oob_poi' to special controller
structures, so zeroes will be written as OOB. But, generic raw NAND logic
in 'nand_base.c' already handles case when OOB is not required to write by
filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to
always read 'oob_poi' data for OOB.

Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way,
so need to keep same behaviour here.

Fixes: c2e8c4d09a ("mtd: rawnand: Meson NAND controller support")
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2025-03-16 14:02:05 +01:00
Tom Rini 0e1fc465fe Merge tag 'dm-pull-15mar25' of git://git.denx.de/u-boot-dm into next
Sync up on test renames
2025-03-15 08:19:31 -06:00
Simon Glass 13e8d14442 test: Make net tests depend on CONFIG_CMD_NET
This fails on samus_tpl as there is no 'net' command.

   => net list
   Unknown command 'net' - try 'help' !

Fix it by adding a condition for the test.

Add a blank line to keep pylint happy.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-15 11:47:05 +00:00
Simon Glass 0043428777 test/py: Show info about module-loading
It is sometimes tricky to figure out what modules test.py is loading
when it starts up. The result can be a silent failure with no clue as to
what when wrong.

Add a section which lists the modules loaded as well as those not
found.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-15 11:47:05 +00:00
Simon Glass d08653d369 test/py: Drop assigning ubman to cons
Now that we have a shorter name, we don't need this sort of thing. Just
use ubman instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-15 11:47:04 +00:00
Simon Glass dd693ecb60 test/py: Drop importing utils as util
Now that we have a shorter name, we don't need this sort of thing.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # test_android
2025-03-15 11:02:04 +00:00
Simon Glass d9ed4b75ad test/py: Drop u_boot_ prefix on test files
We know this is U-Boot so the prefix serves no purpose other than to
make things longer and harder to read. Drop it and rename the files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # test_android / test_dfu
2025-03-15 11:02:04 +00:00
Simon Glass 752c376987 test/py: Shorten u_boot_console
This fixture name is quite long and results in lots of verbose code.
We know this is U-Boot so the 'u_boot_' part is not necessary.

But it is also a bit of a misnomer, since it provides access to all the
information available to tests. It is not just the console.

It would be too confusing to use con as it would be confused with
config and it is probably too short.

So shorten it to 'ubman'.

Signed-off-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/CAFLszTgPa4aT_J9h9pqeTtLCVn4x2JvLWRcWRD8NaN3uoSAtyA@mail.gmail.com/
2025-03-15 10:38:38 +00:00
Dinesh ManiyamandMichael Trimarchi e8741c9339 configs: nand2_defconfig: Enable configs for nand boot
Enable configs for nand boot.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi 0375a1f145 drivers: mtd: nand: Kconfig: Add SYS_NAND_PAGE_SIZE dependency
Add SYS_NAND_PAGE_SIZE dependency for cadence NAND.
This config is needed as the SPL driver will use this parameter
to read uboot-proper image in NAND during booting.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi 10b800a69d drivers: mtd: nand: Enabled Kconfig and Makefile for Cadence-SPL
Enable the Kconfig and Makefile for the Cadence-Nand
SPL support in agilex5 family device.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi 8855146b4d drivers: mtd: nand: spl: Add support for nand SPL load image
Add support for spl nand to load binary image from NAND
to RAM. Leverage the existing nand_spl_load_image from nand_spl_loaders.c

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi 597fe4098d drivers: mtd: nand: base: Add support for Hardware ECC for check bad block
Leverage linux code to support hardware ECC interface
to verify nand bad block.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi 7ed5c15a83 drivers: nand: Enabled Kconfig and Makefile for cdns-nand
Enable the Kconfig and Makefile for the
Cadence NAND driver for the agilex5 family device.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi 2b2745b189 drivers: mtd: nand: cadence: Use bounce buffer
Enable nand to use bounce buffer. In bounce buffer,
read/write buf will use cadence->buf which has been allocated
using malloc. This will align the memory and avoid memory to be
allocated in different addresses.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi 880c317230 drivers: mtd: nand: cadence: Poll for desc complete status
Poll for thread complete status to ensure the
descriptor processing is complete. If complete then can ensure
controller already update the descriptor status.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi b820fa9577 drivers: mtd: nand: cadence: Flush & invalidate dma descriptor
Ensure ddr memory is updated with the data from dcache.
This would help to ensure cdma always reading the latest dma descriptor
from ddr memory.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi 36b2a5d676 drivers: mtd: nand: cadence: Support cmd SET_FEATURES & GET_FEATURES
Support NAND_CMD_SET_FEATURES & NAND_CMD_GET_FEATURES.
These commands is one of the basic commands of NAND. The parameters get
from these commands will be used to set timing mode
of NAND data interface.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi dfba71f965 drivers: mtd: nand: cadence: Add support for NAND_CMD_RESET
Support nand reset command for Cadence Nand Driver.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:01 +01:00
Dinesh ManiyamandMichael Trimarchi 5045ab8bd3 drivers: mtd: nand: cadence: Add support for NAND_CMD_PARAM
Add support for reading param page of NAND device.
These paramaters are unique and used for identification purpose.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:00 +01:00
Dinesh ManiyamandMichael Trimarchi 1d23aca355 drivers: mtd: nand: cadence: Add support for readid command
Add support for readid command in Cadence NAND driver.
The id is unique and used for flash identification.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:00 +01:00
Dinesh ManiyamandMichael Trimarchi ac682c4da9 drivers: mtd: nand: cadence: Add support for read status command
Add support for read status command
in Cadence NAND driver. This status bit is important to check
whether the flash is write-protected.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:00 +01:00
Dinesh ManiyamandMichael Trimarchi ebc41cadc6 drivers: mtd: nand: Add driver for Cadence Nand
Enable driver for Cadence NAND for the family
device agilex5. This driver is leveraged from the path
/drivers/mtd/nand/raw/cadence-nand-controller.c from the
stable version 6.11.2.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:00 +01:00
Dinesh ManiyamandMichael Trimarchi efb9cae1f1 arm: dts: agilex5: Enabled cdns-nand dts setting
Enable cdns-nand dts setting for the socfpga_agilex5
family device.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:00 +01:00
Dinesh ManiyamandMichael Trimarchi 1ae1e9c55e dt: nand: add cadence nand dt-bindings
The Cadence NAND is a configurable mtd raw block which
supports multiple options for chipsets, clocking and reset structure, and
feature list.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:00 +01:00
Tom Rini 00dfb7038e Merge patch series "Enable USB MSC Boot for AM62, AM62A and AM62P"
Siddharth Vadapalli <s-vadapalli@ti.com> says:

This series adds config fragment for enabling USB MSC boot and USB
Storage devices which are applicable to AM62, AM62A and AM62P SoCs.

Series has been tested on AM62A7-SK, AM625-SK and AM62P5-SK for USB MSC
boot where the bootloaders were generated in the following manner:
1. AM62A7-SK (AM62A SoC):
- tiboot3.bin
	=> am62ax_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
	=> am62ax_evm_a53_defconfig + am62x_a53_usbmsc.config
2. AM625-SK (AM62 SoC):
- tiboot3.bin
	=> am62x_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
	=> am62x_evm_a53_defconfig + am62x_a53_usbmsc.config
3. AM62P5-SK (AM62P SoC):
- tiboot3.bin
	=> am62px_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
	=> am62px_evm_a53_defconfig + am62x_a53_usbmsc.config

The images were flashed to a USB Flash Drive and were connected to the
Type-C interface on each of the boards which supports USB MSC Boot.

Logs corresponding to this series:
1. AM62A7-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/3518cba3edc57bf52d06a7df932928ca
2. AM625-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/098568be7b482436d27fdc8adae15ce4
3. AM62P5-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/50e29073033668e7d904a785bfbc9c0b

The following device-tree changes were made across all of the boards:
https://gist.github.com/Siddharth-Vadapalli-at-TI/2afb913838c1d4005bc059910c09ab4b

Link: https://lore.kernel.org/r/20250301080049.965438-1-s-vadapalli@ti.com
2025-03-14 14:36:18 -06:00
Siddharth VadapalliandTom Rini 45306e894b configs: am62x_a53: introduce fragment for USB MSC boot
Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2025-03-14 14:36:18 -06:00
Siddharth VadapalliandTom Rini 460581fa78 configs: am62x_r5: introduce fragment for USB MSC boot
Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2025-03-14 14:36:18 -06:00
Dragan SimicandTom Rini f853295a6a common: console: Delete obsolete VIDCONSOLE_AS_{LCD, NAME} options
The configuration options CONFIG_VIDCONSOLE_AS_LCD and CONFIG_VIDCONSOLE_AS_
NAME have been marked as obsolete and scheduled for deletion in late 2020.

That's already long overdue and the last remaining consumers of these options
have already migrated to using "vidconsole" in their "stdout" and "stderr"
environment variables, so let's delete these two configuration options.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Acked-by: Soeren Moch <smoch@web.de> # tbs2910
2025-03-14 14:35:56 -06:00
Jim LiuandTom Rini ef254ccf37 arm: dts: npcm7xx: correct the timer node
Correct the timer node of dts

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2025-03-14 12:26:55 -06:00
Tom Rini 973c366ce6 Merge tag 'mmu-next-14032025' of https://source.denx.de/u-boot/custodians/u-boot-tpm into next
Up to now we configure the entire memory space for U-Boot as RWX.
For modern architectures and security requirements, it's better to
map the memory properly.
This pull request adds basics support for mapping the U-Boot binary with
proper (RO, RW, RW^X) memory permissions on aarch64 right after we
relocate U-Boot in the top of DRAM.
It's worrth noting that the linker script annotations are only added for
the aarch64 architecture. We can, in the future, try to unify the linker --
at least for the architectures that have enough in common and expand this
2025-03-14 09:31:36 -06:00
Ilias Apalodimas fb553201b6 arm64: Enable RW, RX and RO mappings for the relocated binary
Now that we have everything in place switch the page permissions for
.rodata, .text and .data just after we relocate everything in top of the
RAM.

Unfortunately we can't enable this by default, since we have examples of
U-Boot crashing due to invalid access. This usually happens because code
defines const variables that it later writes. So hide it behind a Kconfig
option until we sort it out.

It's worth noting that EFI runtime services are not covered by this
patch on purpose. Since the OS can call SetVirtualAddressMap which can
relocate runtime services, we need to set them to RX initially but remap
them as RWX right before ExitBootServices.

Link: https://lore.kernel.org/u-boot/20250129-rockchip-pinctrl-const-v1-0-450ccdadfa7e@cherry.de/
Link: https://lore.kernel.org/u-boot/20250130133646.2177194-1-andre.przywara@arm.com/
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:37:54 +02:00
Ilias Apalodimas ec1c6cfb1c treewide: Add a function to change page permissions
For armv8 we are adding proper page permissions for the relocated U-Boot
binary. Add a weak function that can be used across architectures to change
the page permissions

Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:37:54 +02:00
Ilias Apalodimas ff0a979fc3 arm64: mmu_change_region_attr() add an option not to break PTEs
The ARM ARM (Rev L.a) on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use a function to tweak block and page permissions,
where BBM is not required split the existing mmu_change_region_attr()
into two functions and create one that doesn't require BBM. Subsequent
patches will use the new function to map the U-Boot binary with proper
page permissions.
While at it add function descriptions in their header files.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:37:54 +02:00
Ilias Apalodimas 1c7d0c411c arm: Prepare linker scripts for memory permissions
Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.

It's worth noting that .efi_runtime memory permissions are left
untouched for now. There's two problems with EFI currently.

The first problem is that we bundle data, rodata and text in a single
.efi_runtime section which also must be close to .text for now.
As a result we also dont change the permissions for anything contained
in CPUDIR/start.o. In order to fix that we have to decoule .text_rest,
.text and .efi_runtime and have the runtime services on their own
section with proper memory permission annotations (efi_rodata etc).

The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when
the latter is calling SetVirtualAddressMap. Which means we have to
configure those pages as RX for U-Boot but convert them to RWX just before
ExitBootServices. It also needs extra code in efi_tuntime relocation
code since R_AARCH64_NONE are emitted as well if we page align the
section.

Due to the above ignore EFI for now and fix it later once we have the
rest in place.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:30:12 +02:00
Ilias Apalodimas 62b2d933cf doc: update meminfo with arch specific information
Since we added support in meminfo to dump live page tables, describe
the only working architecture for now (aarch64) and add links to public
documentation for further reading.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:30:12 +02:00
Ilias Apalodimas e34ecf9d5e meminfo: add memory details for armv8
Upcoming patches are mapping memory with RO, RW^X etc permsissions.
Fix the meminfo command to display them properly

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:30:12 +02:00
Tom Rini bbfabe2901 Merge tag 'u-boot-imx-next-20250313' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25142

- Support Toradex i.MX6 Apalis/Colibri v1.2 SoM.
- Guard tee.bin inclusion on imx9,
- Remove unneeded regulator entry on DH i.MX6 DHCOM DRC02 devicetree.
- Add i.MX mailbox driver
- Convert ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig.
- Cope with existing optee node on imx8m.
2025-03-13 16:45:19 -06:00
Marek VasutandTom Rini 15d6518c94 ARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02
The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.

Signed-off-by: Marek Vasut <marex@denx.de>
2025-03-13 15:22:48 -06:00
Paul BarkerandTom Rini 9805321dfd Kconfig: Introduce CONFIG_WERROR
Add a new config option under "General setup" to enable the -Werror flag
when building U-Boot. This is useful during development to help catch
mistakes.

This is based on a similar config option added to the Linux kernel by
Linus in 2021 - see Linux commit 3fe617ccafd6 ("Enable '-Werror' by
default for all kernel builds"). The modification of KBUILD_CFLAGS is
done in Makefile.extrawarn, matching where it was moved in the kernel by
Linux commit e88ca24319e4 ("kbuild: consolidate warning flags in
scripts/Makefile.extrawarn").

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-13 14:23:11 -06:00
Anton MoryakovandTom Rini babc6eef2f lib: rsa: add NULL check for 'algo' in
- Check return value of fdt_getprop for NULL.
- Return -EFAULT if 'algo' property is missing.
- Prevent NULL pointer dereference in strcmp."

Triggers found by static analyzer Svace.

Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
2025-03-13 14:23:09 -06:00
Vignesh RaghavendraandTom Rini 628908f849 memory: ti-gpmc: Alloc per driver private struct
Driver uses dev_get_priv() but never allocates it in its
declaration leading to various crashes. Fix this by explicitly
allocating the storage.

Fixes: 9b0b5648d6 ("memory: Add TI GPMC driver")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-03-13 14:23:05 -06:00
Vaishnav AchathandTom Rini 91156b6346 board: ti: j784s4: Update Resource Management configs
Update rm-cfg.yaml and tifs-rm-cfg.yaml to account for the
changes added in the K3 Resource Partitioning Tool v1.18

The change enables resource sharing between A72_2 and MAIN_0_R5_0
for the BCDMA CSI RX and TX channels, J784S4 supports upto 12
CSI cameras and 16 channels would not be enough for all such use
cases for RTOS and Linux, thus sharing of resources in needed. Resource
sharing between A72 and R5 for BCDMA CSI channels allow Linux to use 32
channels at a time.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
[n-francis@ti.com: rebased and sent on behalf]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2025-03-13 14:23:02 -06:00
Tom Rini 6fd111bc4e cmd: Drop last reference to CMD_REISERFS
While the code was removed in commit 3766a249a3 ("fs: drop reiserfs")
this reference in the Makefile was missed. Remove it now.

Fixes: 3766a249a3 ("fs: drop reiserfs")
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-03-13 14:23:00 -06:00
Bryan BrattlofandTom Rini 096aa229a9 mach-k3: common_fdt: create a reserved memory node
Some device trees may not have a reserved-memory node. Rather than
exiting early we should create a new reserved-memory node along with
the memory carveout for the firmware we (U-Boot) have placed.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
2025-03-13 14:22:57 -06:00
Tom Rini 5c2ad07997 test: event: Correct usage of IS_ENABLED() macro in test/common/event.c
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-03-13 14:21:42 -06:00
Raymond MaoandTom Rini 7a765a37b3 tools: add HOSTCFLAGS from openssl pkg-config
HOSTCFLAGS of some tools components (image-host, rsa-sign and
ecdsa-libcrypto) depend on the directory where openssl is installed.
Add them via pkg-config.
This fixes a potential build failure in tools when openssl in installed
in varied directories.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2025-03-13 14:21:30 -06:00
Tom Rini a920169b4c Dockerfile: Add missing 'rm -rf /tmp/coreboot-24.08'
We had missed removing the coreboot directory once done, fix this.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-03-13 14:21:09 -06:00
Peng FanandFabio Estevam 21a4ac55c0 mailbox: add i.MX Messaging Unit (MU) driver
This patch provides a driver for i.MX Messaging Unit (MU) using the
commom mailbox framework.

This is ported from Linux (v6.12.8) driver
drivers/mailbox/imx-mailbox.c. Its commit SHA is:
39d7d6177f0c ("mailbox: imx: use device name in interrupt name")

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2025-03-13 15:15:50 -03:00