Commit Graph
92867 Commits
Author SHA1 Message Date
Jonas KarlmanandKever Yang 0143d43074 rockchip: rk3399-eaidk-610: Sync DT from v6.8 and update defconfig
Sync rk3399-eaidk-610 device tree from Linux kernel v6.8.

Add DM_RESET=y to support reset signals.

Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.

Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.

Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.

Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.

Add PHY_ROCKCHIP_INNO_USB2=y and PHY_ROCKCHIP_TYPEC=y to support USB PHY.

Remove REGULATOR_PWM=y, board does not use pwm-regulator compatible.

Remove SPL_TINY_MEMSET=y to use full memset in SPL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:09 +08:00
Jonas KarlmanandKever Yang 0c672bde09 rockchip: rk3399-rock-pi-n10: Sync DT from v6.8 and update defconfig
Sync rk3399-rock-pi-n10 related device tree from Linux kernel v6.8.

Remove SPL_GPIO=y, board does not use gpio in SPL.

Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.

Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.

Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.

Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.

Remove REGULATOR_PWM=y, board does not use pwm-regulator compatible.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:09 +08:00
Jonas KarlmanandKever Yang 04158eb451 rockchip: rk3399-puma: Sync DT from Linux kernel v6.8
Sync rk3399-puma related device tree from Linux kernel v6.8.

The vdd_log node is already part of rk3399-puma.dtsi, only keep the
regulator-init-microvolt prop in u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:09 +08:00
Jonas KarlmanandKever Yang 9daeb7cb6d rockchip: rk3399-gru: Sync DT from Linux kernel v6.8
Sync rk3399-gru related device tree from Linux kernel v6.8.

The spi_flash symbol is no longer part of upstream DT, it is re-defined
to allow existing reference use in related u-boot.dtsi-files.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:09 +08:00
Jonas KarlmanandKever Yang 104779b411 rockchip: rk3399: Sync SoC DT from Linux kernel v6.8
Sync RK3399 SoC common .dtsi-files from Linux kernel v6.8.

The ethernet0 alias is moved to rk3399-u-boot.dtsi in this patch, the
alias will be added in board specific .dts-files and finally removed
from rk3399-u-boot.dtsi in following patches.

The rng node is replaced with crypto0 and crypto1, both can supply
random numbers.

There is no other intended change with this patch.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:09 +08:00
Jonas KarlmanandKever Yang add8cef67b clk: rockchip: rk3399: Add SCLK_USB3OTGx_REF support
The SCLK_USB3OTGx_REF clocks is used as reference clock for USB3 block.

Add simple support to get rate of SCLK_USB3OTGx_REF clocks to fix
reference clock period configuration.

Also replace use of 24000000 with the OSC_HZ constant.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:09 +08:00
Jonas KarlmanandKever Yang e801d05bea clk: rockchip: rk3399: Improve support for SCLK_PCIEPHY_REF clock
rk3399-nanopi-4.dtsi try to set parent of and set rate to 100 MHz of the
SCLK_PCIEPHY_REF clock.

The existing enable/disable ops for SCLK_PCIEPHY_REF currently force
use of 24 MHz parent and rate.

Add improved support for setting parent and rate of the pciephy refclk
to driver to better support assign-clock props for pciephy refclk in DT.

This limited implementation only support setting 24 or 100 MHz rate,
and expect npll and clk_pciephy_ref100m divider to use default values.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:09 +08:00
Jonas KarlmanandKever Yang 24463b1583 clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock
rk3399.dtsi from linux v5.19 and newer try to set VDU clock rate to
400 MHz using an assigned-clock-rates prop of the CRU node.

U-Boot does not use or need this clock so add dummy support for getting
and setting ACLK_VDU clock rate to allow CRU driver to be loaded with an
updated rk3399.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang fc4572ae75 clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC
Sync rk3399-cru.h with one from Linux kernel v6.2+ and fix use of the
SCLK_DDRCLK name that was only used by U-Boot.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 6e44d4fd9b rockchip: rk3399: Configure sdmmc regulator pinctrl in SPL
A few boards have shown to be required to properly configure pinctrl
for the fixed regulator gpio pin used by sdmmc before being able to read
from SD-cards.

Include the related gpio, regulator and pinctrl nodes and enable related
Kconfig options so that pinctrl can be configured in SPL for boards that
may be affected by such issue.

Also change to imply SPL_DM_SEQ_ALIAS for all boards because it must be
enabled for working gpio usage in SPL after a future DT sync.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 100f489f58 rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC
When RK3399 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there can be a fallback
to read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card may fail:

  U-Boot SPL 2024.04-rc4 (Mar 17 2024 - 22:54:45 +0000)
  Trying to boot from MMC2
  mmc_load_image_raw_sector: mmc block read error
  Trying to boot from MMC2
  mmc_load_image_raw_sector: mmc block read error
  Trying to boot from MMC1
  Card did not respond to voltage select! : -110
  mmc_init: -95, time 12
  spl: mmc init failed with error: -95
  SPL: failed to boot from all boot devices (err=-6)
  ### ERROR ### Please RESET the board ###

Fix this by tagging related sdhci, sdmmc and spi flash pinctrl nodes
with bootph props. Also move bootph for common nodes shared by all
boards to the SoC u-boot.dtsi.

eMMC, SD-Card and SPI flash nodes are also changed to only be tagged
with bootph props for SPL and U-Boot pre-reloc phases.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang fa903919d2 rockchip: rk3399: Include uart related pinctrl nodes in TPL/SPL
The initial serial console UART iomux is typically configured in
board_debug_uart_init() at TPL stage on Rockchip platform.

Later stages typically use pinctrl driver to configure iomux UART once
again based on the control FDT.

Include uart related pinctrl nodes in TPL/SPL control FDT to make it
possible for pinctrl driver to configure UART iomux at TPL/SPL stage.

Following debug log message may also be seen at U-Boot pre-reloc stage:

  ns16550_serial serial@ff1a0000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19

This can be resolved by including bootph prop for U-Bood pre-reloc
phase (bootph-some-ram or bootph-all). However, this has intentionally
been excluded due to including it unnecessarily slows down boot around
200-400 ms.

Also add the clock-frequency prop similar to what has been done for
other Rockchip SoCs.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang cc87730e40 rockchip: rk3399-puma: Move uart0 bootph to board u-boot.dtsi
rk3399-puma is the only supported board that use uart0 for serial
console, other RK3399 boards typically use uart2 for serial console
and may use uart0 for bluetooth.

Move setting bootph prop to board u-boot.dtsi to only include the uart0
node in TPL/SPL control FDT for the rk3399-puma target.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 2e1c0024af rockchip: rk3399: Fix bootph prop for vop nodes
The vop nodes should not be included in TPL/SPL control FDT, it should
only be included at U-Boot proper pre-reloc phase.

Change to use bootph-some-ram prop to fix this.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 4e3c7e89d9 rockchip: rk3399: Sort nodes in u-boot.dtsi files
Sort nodes alphabetically by name, symbol or reg addr in RK3399 related
u-boot.dtsi files. Also remove one of the duplicated &pmu nodes.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 2dfa45a785 rockchip: rk3399: Remove inherited bootph-all props
Remove superfluous bootph-all props already inherited from main soc
u-boot.dtsi file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 1520e81871 rockchip: rk3399: Add a default spl-boot-order prop
A lot of RK3399 boards use a u-boot,spl-boot-order of "same-as-spl",
&sdhci and &sdmmc.

Move this to rk3399-u-boot.dtsi and make this default for boards
currently missing a u-boot,spl-boot-order prop.

Before commit a7e69952eb ("rockchip: spl: Cache boot source id for
later use") it was required to include the SPI flash node in the
u-boot,spl-boot-order prop to successfully load FIT from SPI flash.

The SPI flash node reference has been dropped from spl-boot-order from
pinebook-pro, roc-pc and rockpro64 now that "same-as-spl" also gets
resolved to the SPI flash node and loading FIT from SPI flash works
without having the node explicitly referenced in spl-boot-order prop.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 0f65779118 rockchip: rk3399: Remove use of xPL_MISC_DRIVERS options
The TPL and/or SPL control FDT on RK3399 boards does not contain any
node with a compatible that is supported by driver/misc/ drivers.

Remove use of xPL_MISC_DRIVERS options to stop including e.g an unused
efuse driver in TPL and/or SPL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 5f2d74bf4a rockchip: rk3399: Enable DT overlay support on all boards
Imply OF_LIBFDT_OVERLAY Kconfig options to add device tree overlay
support on all RK3399 boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 6cfa112a77 rockchip: rk3399: Imply support for GbE PHY
Imply support for GbE PHY status parsing and configuration when support
for onboard ethernet is enabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 105dd7f022 rockchip: rk3399: Enable random generator on all boards
The RK3399 SoC contain a crypto engine block that can generate random
numbers.

Imply DM_RNG and RNG_ROCKCHIP Kconfig options to take advantage of the
random generator on all RK3399 boards. Also remove the unnecessary use
of a status = "okay" prop.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang c9b7e73149 rockchip: rk3399: Enable ARMv8 crypto and FIT checksum validation
The RK3399 SoC support the ARMv8 Cryptography Extensions, use of ARMv8
crypto can speed up FIT checksum validation in SPL.

Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto
extensions for SHA256 when validating checksum of FIT images.

Imply SPL_FIT_SIGNATURE and LEGACY_IMAGE_FORMAT to enable FIT checksum
validation to almost all RK3399 boards.

The following boards have been excluded:
- chromebook_bob: SPL max size limitation of 120 KiB
- chromebook_kevin: SPL max size limitation of 120 KiB

Also imply OF_LIVE to help speed up init of U-Boot proper and disable
CONFIG_SPL_RAW_IMAGE_SUPPORT on leez-rk3399 to ensure SPL does not try
to jump to code that failed checksum validation.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang d8ff591d92 rockchip: rk3399: Sort imply statements alphabetically
Sort imply statements under ROCKCHIP_RK3399 alphabetically.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang b1dda03dc4 rockchip: rk3399-ficus: Enable TPL and use common bss and stack addr
The rk3399-ficus board is only using SPL and not TPL+SPL like all other
RK3399 boards, chromebook bob/kevin excluded. It does not seem to be any
technical reason why this board was left using only SPL.

Switch to use TPL+SPL and to use the common bss and stack addresses
introduced in commit 008ba0d56d ("rockchip: Add common default bss and
stack addresses"). Also add the missing DEFAULT_FDT_FILE option.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 32f8a88a8c rockchip: rk3399-puma: Use common bss and stack addresses
The rk3399-puma board is currently using SPL stack and bss addr in SRAM,
the same addr typically used by TPL, this differs from most other RK3399
boards.

Switch to use the common bss and stack addresses introduced in commit
008ba0d56d ("rockchip: Add common default bss and stack addresses").

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang 6007b69d54 rockchip: rk3399-puma: Update SPL_PAD_TO Kconfig option
On rk3399-puma the FIT payload is located at sector 0x200 compared
to the more Rockchip common sector 0x4000 offset:

  SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200

Because FIT payload is located at sector 0x200 and IDBlock is located at
sector 64, the combined size of TPL+SPL (idbloader.img) cannot take up
more than 224 KiB:

  (0x200 - 64) x 512 = 0x38000 (224 KiB)

Adjust SPL_PAD_TO to match the used 0x200 sector offset.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Jonas KarlmanandKever Yang a0672075e7 rockchip: rk3399-gru: Fix max SPL size on bob and kevin
Chromebook bob and kevin typically run coreboot as the initial boot
loader, however, U-Boot proper can be used as a secondary boot loader.
It is also possible to run U-Boot SPL and proper bare metal, with SPL
and the U-Boot payload loaded from SPI flash.

Because of this chromebook bob and kevin only use SPL and not TPL+SPL
like other RK3399 boards, this mean that SPL is loaded to and run from
SRAM instead of DRAM.

The U-Boot payload is located at 0x40000 (256 KiB) offset in SPI flash
and because the BROM only read first 2 KiB for each 4 KiB page, the size
of SPL (idbloader.img) is limited to max 128 KiB.

The chosen bss start address further limits the size of SPL to 120 KiB.

  0xff8e0000 (SPL_BSS_START_ADDR) - 0xff8c2000 (SPL_TEXT_BASE) = 0x1e000

Update SPL_MAX_SIZE to reflect the 120 KiB max size limitation.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-05-07 15:56:08 +08:00
Tom Rini 52835266d3 Prepare v2024.07-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06 13:54:17 -06:00
Tom Rini 6114b860f5 Merge tag 'u-boot-imx-master-20240505' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20614

- Add SPL variant of DM_RNG so that the DM_RNG can be disabled in SPL if
  necessary. This may be necessary due to e.g. size constraints of the SPL.
- dd SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can be
  disabled in SPL if necessary. This may be necessary due to e.g.  size
  constraints of the SPL.
- Differentiate between CAAM and DCP in Kconfig entry.
2024-05-05 16:15:02 -06:00
Marek VasutandFabio Estevam cecb5fbb42 crypto/fsl: Differentiate between CAAM and DCP in Kconfig entry
Differentiate between "Enable Random Number Generator support" and
"Enable Random Number Generator support" in Kconfig entry, mark the
first as CAAM and the second as DCP, otherwise users cannot easily
decide which of the options is which and enable the correct one.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-05-05 11:21:39 -03:00
Marek VasutandFabio Estevam ea701eebec crypto/fsl: Introduce SPL_FSL_CAAM_RNG
Add SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can
be disabled in SPL if necessary. This may be necessary due to e.g.
size constraints of the SPL.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-05-05 11:21:39 -03:00
Marek VasutandFabio Estevam 591257b05c rng: Introduce SPL_DM_RNG
Add SPL variant of DM_RNG so that the DM_RNG can be disabled in SPL
if necessary. This may be necessary due to e.g. size constraints of
the SPL.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-05-05 11:21:39 -03:00
Tom Rini 2f1e76bcfe Merge branch '2024-05-02-assorted-updates'
- Typo fixes, gpt command fix, a few npcm fixes, fix a reported Coverity
  issue and increase the malloc pool on am62x_evm_r5 to fix some use
  cases.
2024-05-03 16:18:51 -06:00
William ZhangandTom Rini 3c15780f2d MAINTAINERS: update Broadcom BCMBCA maintainer
Joel is no longer with Broadcom. Remove his email from bcmbca maintainer
list and replace him with myself for stack protection maintainer.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
2024-05-03 13:23:48 -06:00
Judith MendezandTom Rini 8c1019bec8 configs: am62x_evm_r5: Increase size of malloc_simple heap after relocation
On AM62x SK we can see a boot failure with signature "alloc space
exhausted", so fix by increasing size of SPL_STACK_R_MALLOC_SIMPLE_LEN.

Fixes: 128f81290b ("arm: dts: k3: binman: am625: add support for signing TIFSSTUB Images")
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2024-05-03 12:22:59 -06:00
Marek VasutandTom Rini 38d88f1db3 binman: Fix typo in mkimage etype description
Fix a typo, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-05-03 12:22:59 -06:00
Jim LiuandTom Rini b3c0b94f2e board: arbel: Limit the dram effective size to bank0 maximal size
For 4GB dram size, the dram is divided into 2 banks and
the address space of these 2 banks are not concatenated.
Limit the gd->ram_top to not exceed bank0 top to prevent
accessing invalid memory region.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2024-05-03 12:22:59 -06:00
Jim LiuandTom Rini e7c3948ec5 configs: arbel: increase u-boot mapping size
When u-boot enable CONFIG_SYS_BOOT_RAMDISK_HIGH, rootfs image relocated
from FIU address space to memory address before jump to kernel.

Since Arbel reserved memory from 0x00000000 to 0x06200000 for tip image,
and rootfs image may too large that cannot found a suitable location
before 128MB(0x8000000), so increase mapping size from 128MB to 192MB.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2024-05-03 12:22:59 -06:00
Jim LiuandTom Rini ceec9c9d29 Arm: npcm: fix npcm7xx boot to kernel error
Add mem and console env information and modify the wrong earlycon env.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2024-05-03 12:22:59 -06:00
Heinrich SchuchardtandTom Rini e69b187486 net: consider option-length when parsing NIS domain
When parsing option 40 (network information service domain) the
option length is in variable 'oplen' and not in 'size'.

Addresses-Coverity-ID: 492765 Uninitialized variables (UNINIT)
Fixes: 8ab388bfdb ("net: add support to parse the NIS domain for the dhcp options")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-05-03 12:22:58 -06:00
Jim LiuandTom Rini 914b766a2a spi: npcm_pspi: Reset HW in driver probe
Reset HW to clear old status and use default data mode(8-bit).

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2024-05-03 12:22:58 -06:00
Kishan DudhatraandTom Rini 8024d57789 cmd: gpt: initialize partition table
Change in v2:
	- Fix applies to all block devices, not just MMC.

If partition init is not completed within the gpt write,
the gpt partition list will not be updated.

Signed-off-by: Kishan Dudhatra <kishan.dudhatra@siliconsignals.io>
2024-05-03 12:22:58 -06:00
Heinrich SchuchardtandTom Rini d881da3b42 tools: typo arguemnts
%s/arguemnts/arguemnts/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-05-03 12:22:58 -06:00
Heinrich SchuchardtandTom Rini f722ba1604 event: typo arguemnts
%s/arguemnts/arguments/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-05-03 12:22:58 -06:00
Alexander SverdlinandTom Rini c92d48f8b2 mmc: sdhci: Correct ADMA_DESC_LEN to 12
Commit 37cb626da2 ("mmc: sdhci: Add Support for ADMA2") introduced
ADMA_DESC_LEN == 16 (64 bit case), but it was never used before commit
74755c1fed ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops").

"sizeof(struct sdhci_adma_desc)" (== 12 for 64bit case) was used instead.

Confusion probably originates from Linux commit 685e444bbaa0
("mmc: sdhci: Add ADMA2 64-bit addressing support for V4 mode"), but
the latter "V4 mode" was never ported to U-Boot.

Fixes: 74755c1fed ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops")
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
Tested-by: Judith Mendez <jm@ti.com>
2024-05-02 10:34:34 -06:00
Tom Rini 62825d48c4 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/20596

- RISC-V: cmd: Add SBI implementation ID and extension ID
- Board: Rename spl_soc_init to spl_dram_init
- Board: milkv_duo: Add SPI NOR flash, Ethernet, Sysreset support
2024-05-01 19:40:32 -06:00
Tom Rini 3132b7982a Merge tag 'efi-2024-07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2024-07-rc2

Documentation:

* correct description of 'env print -e'

UEFI:

* remove superfluous efi_restore_gd after EFI_CALL
* terminate efidebug test bootmgr early on error
* do not install device-tree if bootmgr fails
* pass GUID by address to efi_dp_from_lo
* remove dead code in efi_var_mem_init()
* enable QueryVariableInfo at runtime for file backed variables
2024-05-01 19:39:45 -06:00
Lukas FunkeandLeo Yu-Chi Liang 19b762cf83 board: starfive: Rename spl_soc_init() to spl_dram_init()
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().

Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2024-05-02 00:01:18 +08:00
Lukas FunkeandLeo Yu-Chi Liang d6c81b87e6 board: sifive: Rename spl_soc_init() to spl_dram_init()
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().

Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-05-02 00:01:18 +08:00
Kongyang LiuandLeo Yu-Chi Liang 849e3fd8f6 configs: milkv_duo: Add spi nor configs
Add configs related to spi nor flash for Sophgo Milk-V Duo board

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-05-02 00:01:18 +08:00