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rockchip: rk3399-eaidk-610: Sync DT from v6.8 and update defconfig

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Sync rk3399-eaidk-610 device tree from Linux kernel v6.8.

Add DM_RESET=y to support reset signals.

Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.

Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage.

Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC.

Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.

Add PHY_ROCKCHIP_INNO_USB2=y and PHY_ROCKCHIP_TYPEC=y to support USB PHY.

Remove REGULATOR_PWM=y, board does not use pwm-regulator compatible.

Remove SPL_TINY_MEMSET=y to use full memset in SPL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman
2024-05-07 15:56:09 +08:00
committed by Kever Yang
parent 0c672bde09
commit 0143d43074
2 changed files with 10 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/dts/rk3399-eaidk-610.dts
+2 -1
View File
@@ -15,6 +15,7 @@
compatible = "openailab,eaidk-610", "rockchip,rk3399";
aliases {
ethernet0 = &gmac;
mmc0 = &sdio0;
mmc1 = &sdmmc;
mmc2 = &sdhci;
@@ -773,7 +774,7 @@
compatible = "brcm,bcm4329-fmac";
reg = <1>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_l>;
configs/eaidk-610-rk3399_defconfig
+8 -3
View File
@@ -5,6 +5,7 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-eaidk-610"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
@@ -13,7 +14,7 @@ CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-eaidk-610.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -30,14 +31,19 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
@@ -50,5 +56,4 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y