Merge tag 'u-boot-imx-main-20260807' of https://git.u-boot-project.org/u-boot/custodians/u-boot-imx
CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-imx/-/pipelines/906 - Fix a boot regression on i.MX7 related to the system counter. - Add Aquila iMX95 0243 PID4. - Update phycore_imx8mm DDR timings. - Add FRDM-IMX95 initial support. - Handle FCFB header during SPI NOR boot and CST backend selection.
This commit is contained in:
Tom Rini
@@ -6,6 +6,21 @@
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#include "imx8mm-u-boot.dtsi"
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/ {
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/*
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* Limit memory usage below the 4 GB (32-bit) boundary.
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* The i.MX8MM DMA and peripherals cannot access >32-bit
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* addresses. This prevents allocation failures in UEFI mode.
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*/
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u_boot_sdma_shield: sdma-shield@100000000 {
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reg = <0x1 0x00000000 0x0 0x40000000>;
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};
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdog1>;
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@@ -29,6 +44,10 @@
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};
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};
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&pinctrl_i2c1 {
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bootph-pre-ram;
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};
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&pinctrl_uart3 {
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bootph-pre-ram;
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};
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@@ -73,6 +92,10 @@
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bootph-pre-ram;
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};
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&i2c1 {
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bootph-pre-ram;
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};
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&usdhc2 {
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bootph-pre-ram;
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};
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@@ -0,0 +1,81 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2026 NXP
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*/
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#include "imx95-u-boot.dtsi"
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/ {
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aliases {
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pci0 = &netc_bus0;
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pci1 = &netc_bus1;
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};
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};
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&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-imem} {
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filename = "lpddr4x_imem_v202409.bin";
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};
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&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-dmem} {
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filename = "lpddr4x_dmem_v202409.bin";
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};
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&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-imem-qb} {
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filename = "lpddr4x_imem_qb_v202409.bin";
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};
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&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-dmem-qb} {
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filename = "lpddr4x_dmem_qb_v202409.bin";
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};
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&lpuart1 {
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bootph-pre-ram;
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};
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®_usdhc2_vmmc {
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bootph-pre-ram;
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};
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&usdhc1 {
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bootph-pre-ram;
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};
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&usdhc2 {
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bootph-pre-ram;
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};
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&pinctrl_uart1 {
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bootph-pre-ram;
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};
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&pinctrl_usdhc1 {
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bootph-pre-ram;
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};
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&pinctrl_usdhc1_100mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc1_200mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2 {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2_100mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2_200mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2_gpio {
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bootph-pre-ram;
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};
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&pinctrl_reg_usdhc2_vmmc {
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bootph-pre-ram;
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};
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@@ -165,6 +165,14 @@ config TARGET_IMX95_15X15_EVK
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imply BOOTSTD_FULL
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imply OF_UPSTREAM
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config TARGET_IMX95_15X15_FRDM
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bool "imx95_frdm"
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select OF_BOARD_FIXUP
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select IMX95
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imply BOOTSTD_FULL
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imply BOOTSTD_BOOTCOMMAND
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imply OF_UPSTREAM
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config TARGET_IMX943_EVK
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bool "imx943_evk"
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select OF_BOARD_FIXUP
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@@ -210,6 +218,7 @@ source "board/phytec/phycore_imx91_93/Kconfig"
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source "board/variscite/imx93_var_som/Kconfig"
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source "board/nxp/imx94_evk/Kconfig"
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source "board/nxp/imx95_evk/Kconfig"
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source "board/nxp/imx95_frdm/Kconfig"
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source "board/toradex/aquila-imx95/Kconfig"
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source "board/toradex/smarc-imx95/Kconfig"
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source "board/toradex/verdin-imx95/Kconfig"
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@@ -773,22 +773,20 @@ int get_reset_reason(bool sys, bool lm)
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}
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if (out.bootflags & MISC_BOOT_FLAG_VLD) {
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printf("SYS Boot reason: %s, origin: %ld, errid: %ld\n",
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rst[out.bootflags & MISC_BOOT_FLAG_REASON],
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out.bootflags & MISC_BOOT_FLAG_ORG_VLD ?
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FIELD_GET(MISC_BOOT_FLAG_ORIGIN, out.bootflags) : -1,
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out.bootflags & MISC_BOOT_FLAG_ERR_VLD ?
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FIELD_GET(MISC_BOOT_FLAG_ERR_ID, out.bootflags) : -1
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);
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printf("SYS Boot reason: %s", rst[out.bootflags & MISC_BOOT_FLAG_REASON]);
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if (out.bootflags & MISC_BOOT_FLAG_ORG_VLD)
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printf(", origin: %ld", FIELD_GET(MISC_BOOT_FLAG_ORIGIN, out.bootflags));
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if (out.bootflags & MISC_BOOT_FLAG_ERR_VLD)
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printf(", errid: %ld", FIELD_GET(MISC_BOOT_FLAG_ERR_ID, out.bootflags));
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puts("\n");
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}
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if (out.shutdownflags & MISC_SHUTDOWN_FLAG_VLD) {
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printf("SYS shutdown reason: %s, origin: %ld, errid: %ld\n",
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rst[out.shutdownflags & MISC_SHUTDOWN_FLAG_REASON],
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out.shutdownflags & MISC_SHUTDOWN_FLAG_ORG_VLD ?
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FIELD_GET(MISC_SHUTDOWN_FLAG_ORIGIN, out.shutdownflags) : -1,
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out.shutdownflags & MISC_SHUTDOWN_FLAG_ERR_VLD ?
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FIELD_GET(MISC_SHUTDOWN_FLAG_ERR_ID, out.shutdownflags) : -1
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);
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printf("SYS shutdown reason: %s", rst[out.shutdownflags & MISC_SHUTDOWN_FLAG_REASON]);
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if (out.shutdownflags & MISC_SHUTDOWN_FLAG_ORG_VLD)
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printf(", origin: %ld", FIELD_GET(MISC_SHUTDOWN_FLAG_ORIGIN, out.shutdownflags));
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if (out.shutdownflags & MISC_SHUTDOWN_FLAG_ERR_VLD)
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printf(", errid: %ld", FIELD_GET(MISC_SHUTDOWN_FLAG_ERR_ID, out.shutdownflags));
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puts("\n");
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}
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}
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@@ -803,23 +801,21 @@ int get_reset_reason(bool sys, bool lm)
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}
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if (out.bootflags & MISC_BOOT_FLAG_VLD) {
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printf("LM Boot reason: %s, origin: %ld, errid: %ld\n",
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rst[out.bootflags & MISC_BOOT_FLAG_REASON],
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out.bootflags & MISC_BOOT_FLAG_ORG_VLD ?
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FIELD_GET(MISC_BOOT_FLAG_ORIGIN, out.bootflags) : -1,
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out.bootflags & MISC_BOOT_FLAG_ERR_VLD ?
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FIELD_GET(MISC_BOOT_FLAG_ERR_ID, out.bootflags) : -1
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);
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printf("LM Boot reason: %s", rst[out.bootflags & MISC_BOOT_FLAG_REASON]);
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if (out.bootflags & MISC_BOOT_FLAG_ORG_VLD)
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printf(", origin: %ld", FIELD_GET(MISC_BOOT_FLAG_ORIGIN, out.bootflags));
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if (out.bootflags & MISC_BOOT_FLAG_ERR_VLD)
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printf(", errid: %ld", FIELD_GET(MISC_BOOT_FLAG_ERR_ID, out.bootflags));
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puts("\n");
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}
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if (out.shutdownflags & MISC_SHUTDOWN_FLAG_VLD) {
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printf("LM shutdown reason: %s, origin: %ld, errid: %ld\n",
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rst[out.shutdownflags & MISC_SHUTDOWN_FLAG_REASON],
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out.shutdownflags & MISC_SHUTDOWN_FLAG_ORG_VLD ?
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FIELD_GET(MISC_SHUTDOWN_FLAG_ORIGIN, out.shutdownflags) : -1,
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out.shutdownflags & MISC_SHUTDOWN_FLAG_ERR_VLD ?
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FIELD_GET(MISC_SHUTDOWN_FLAG_ERR_ID, out.shutdownflags) : -1
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);
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printf("LM shutdown reason: %s", rst[out.shutdownflags & MISC_SHUTDOWN_FLAG_REASON]);
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if (out.shutdownflags & MISC_SHUTDOWN_FLAG_ORG_VLD)
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printf(", origin: %ld", FIELD_GET(MISC_SHUTDOWN_FLAG_ORIGIN, out.shutdownflags));
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if (out.shutdownflags & MISC_SHUTDOWN_FLAG_ERR_VLD)
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printf(", errid: %ld", FIELD_GET(MISC_SHUTDOWN_FLAG_ERR_ID, out.shutdownflags));
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puts("\n");
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}
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}
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@@ -331,6 +331,12 @@ int arch_cpu_init(void)
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init_snvs();
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/*
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* imx_gpcv2_init() needs to do a delay.
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* Timer must be initialized before calling a delay function.
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*/
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timer_init();
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imx_gpcv2_init();
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enable_ca7_smp();
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@@ -65,6 +65,9 @@ int timer_init(void)
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struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
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unsigned long val, freq;
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if (gd->arch.timer_rate_hz)
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return 0;
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freq = CFG_SC_TIMER_CLK;
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asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
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@@ -103,8 +106,7 @@ ulong get_timer(ulong base)
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ulong timer_get_boot_us(void)
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{
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if (!gd->arch.timer_rate_hz)
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timer_init();
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timer_init();
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return tick_to_time(get_ticks());
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}
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@@ -0,0 +1,12 @@
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if TARGET_IMX95_15X15_FRDM
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config SYS_BOARD
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default "imx95_frdm"
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config SYS_VENDOR
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default "nxp"
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config SYS_CONFIG_NAME
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default "imx95_frdm"
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endif
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@@ -0,0 +1,6 @@
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i.MX95 FRDM BOARD
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M: Joseph Guo <qijian.guo@nxp.com>
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S: Maintained
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F: board/nxp/imx95_frdm/
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F: include/configs/imx95_frdm.h
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F: configs/imx95_15x15_frdm_defconfig
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@@ -0,0 +1,11 @@
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#
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# Copyright 2026 NXP
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += imx95_frdm.o
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ifdef CONFIG_SPL_BUILD
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obj-y += spl.o
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endif
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@@ -0,0 +1,24 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2025 NXP
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*/
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#include <asm/gpio.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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int board_late_init(void)
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{
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if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC))
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board_late_mmc_env_init();
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return 0;
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}
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#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
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int board_fix_fdt(void *fdt)
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{
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/* Remove nodes based on fuses. */
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return imx9_uboot_fixup_by_fuse(fdt);
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}
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#endif
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@@ -0,0 +1,93 @@
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sec_boot=no
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initrd_addr=0x93800000
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emmc_dev=0
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sd_dev=1
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scriptaddr=0x93500000
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kernel_addr_r=CONFIG_SYS_LOAD_ADDR
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image=Image
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kernel_comp_addr_r=0xC0000000
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kernel_comp_size=0x2000000
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splashimage=0xA0000000
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console=ttyLP0,115200 earlycon
|
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fdt_addr_r=0x93000000
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fdt_addr=0x93000000
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cntr_addr=0xA8000000
|
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cntr_file=os_cntr_signed.bin
|
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boot_fit=no
|
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fdtfile=DEFAULT_FDT_FILE
|
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bootm_size=0x10000000
|
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mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX
|
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mmcautodetect=yes
|
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mmcargs=setenv bootargs console=${console} root=${mmcroot}
|
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loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};
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bootscript=echo Running bootscript from mmc ...; source
|
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loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
|
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loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}
|
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loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file}
|
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auth_os=auth_cntr ${cntr_addr}
|
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boot_os=booti ${loadaddr} - ${fdt_addr_r};
|
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mmcboot=echo Booting from mmc ...;
|
||||
run mmcargs;
|
||||
if test ${sec_boot} = yes; then
|
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if run auth_os; then
|
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run boot_os;
|
||||
else
|
||||
echo ERR: failed to authenticate;
|
||||
fi;
|
||||
else
|
||||
if test ${boot_fit} = yes || test ${boot_fit} = try; then
|
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bootm ${loadaddr};
|
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else
|
||||
if run loadfdt; then
|
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run boot_os;
|
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else
|
||||
echo WARN: Cannot load the DT;
|
||||
fi;
|
||||
fi;
|
||||
fi;
|
||||
netargs=setenv bootargs console=${console} root=/dev/nfs
|
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ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp
|
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netboot=echo Booting from net ...;
|
||||
run netargs;
|
||||
if test ${ip_dyn} = yes; then
|
||||
setenv get_cmd dhcp;
|
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else
|
||||
setenv get_cmd tftp;
|
||||
fi;
|
||||
if test ${sec_boot} = yes; then
|
||||
${get_cmd} ${cntr_addr} ${cntr_file};
|
||||
if run auth_os; then
|
||||
run boot_os;
|
||||
else
|
||||
echo ERR: failed to authenticate;
|
||||
fi;
|
||||
else
|
||||
${get_cmd} ${loadaddr} ${image};
|
||||
if test ${boot_fit} = yes || test ${boot_fit} = try; then
|
||||
bootm ${loadaddr};
|
||||
else
|
||||
if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then
|
||||
run boot_os;
|
||||
else
|
||||
echo WARN: Cannot load the DT;
|
||||
fi;
|
||||
fi;
|
||||
fi;
|
||||
bsp_bootcmd=echo Running BSP bootcmd ...;
|
||||
mmc dev ${mmcdev}; if mmc rescan; then
|
||||
if run loadbootscript; then
|
||||
run bootscript;
|
||||
else
|
||||
if test ${sec_boot} = yes; then
|
||||
if run loadcntr; then
|
||||
run mmcboot;
|
||||
else run netboot;
|
||||
fi;
|
||||
else
|
||||
if run loadimage; then
|
||||
run mmcboot;
|
||||
else run netboot;
|
||||
fi;
|
||||
fi;
|
||||
fi;
|
||||
fi;
|
||||
@@ -0,0 +1,82 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright 2026 NXP
|
||||
*/
|
||||
|
||||
#include <hang.h>
|
||||
#include <init.h>
|
||||
#include <spl.h>
|
||||
#include <asm/global_data.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/mu.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#include <asm/mach-imx/boot_mode.h>
|
||||
#include <asm/mach-imx/ele_api.h>
|
||||
#include <asm/mach-imx/qb.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int spl_board_boot_device(enum boot_device boot_dev_spl)
|
||||
{
|
||||
switch (boot_dev_spl) {
|
||||
case SD1_BOOT:
|
||||
case MMC1_BOOT:
|
||||
return BOOT_DEVICE_MMC1;
|
||||
case SD2_BOOT:
|
||||
case MMC2_BOOT:
|
||||
return BOOT_DEVICE_MMC2;
|
||||
case USB_BOOT:
|
||||
return BOOT_DEVICE_BOARD;
|
||||
default:
|
||||
return BOOT_DEVICE_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
void spl_board_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
puts("Normal Boot\n");
|
||||
|
||||
ret = ele_start_rng();
|
||||
if (ret)
|
||||
printf("Fail to start RNG: %d\n", ret);
|
||||
|
||||
if (IS_ENABLED(CONFIG_SPL_IMX_QB))
|
||||
spl_imx_qb_save();
|
||||
}
|
||||
|
||||
void board_init_f(ulong dummy)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* Clear the BSS. */
|
||||
memset(__bss_start, 0, __bss_end - __bss_start);
|
||||
|
||||
#ifdef CONFIG_SPL_RECOVER_DATA_SECTION
|
||||
if (IS_ENABLED(CONFIG_SPL_BUILD))
|
||||
spl_save_restore_data();
|
||||
#endif
|
||||
|
||||
timer_init();
|
||||
|
||||
/* Need dm_init() to run before any SCMI calls can be made. */
|
||||
spl_early_init();
|
||||
|
||||
/* Need enable SCMI drivers and ELE driver before enabling console */
|
||||
ret = imx9_probe_mu();
|
||||
if (ret)
|
||||
hang(); /* if MU not probed, nothing can output, just hang here */
|
||||
|
||||
arch_cpu_init();
|
||||
|
||||
preloader_console_init();
|
||||
|
||||
debug("SOC: 0x%x\n", gd->arch.soc_rev);
|
||||
debug("LC: 0x%x\n", gd->arch.lifecycle);
|
||||
|
||||
get_reset_reason(true, false);
|
||||
|
||||
board_init_r(NULL, 0);
|
||||
}
|
||||
@@ -12,5 +12,70 @@ config SYS_CONFIG_NAME
|
||||
config IMX_CONFIG
|
||||
default "board/phytec/phycore_imx8mm/imximage-8mm-sd.cfg"
|
||||
|
||||
config PHYCORE_IMX8MM_RAM_SIZE_FIX
|
||||
bool "Set phyCORE-i.MX8MM RAM size fix instead of detecting"
|
||||
default false
|
||||
help
|
||||
RAM size is automatic being detected with the help of
|
||||
the EEPROM introspection data. Set RAM size to a fix value
|
||||
instead.
|
||||
|
||||
choice
|
||||
prompt "phyCORE-i.MX8MM RAM size"
|
||||
depends on PHYCORE_IMX8MM_RAM_SIZE_FIX
|
||||
default PHYCORE_IMX8MM_RAM_SIZE_2GB
|
||||
help
|
||||
Select a fixed RAM size instead of EEPROM introspection
|
||||
data.
|
||||
|
||||
config PHYCORE_IMX8MM_RAM_SIZE_1GB
|
||||
bool "1GB RAM"
|
||||
help
|
||||
Set RAM size fix to 1GB for phyCORE-i.MX8MM
|
||||
instead of runtime detection from EEPROM.
|
||||
|
||||
config PHYCORE_IMX8MM_RAM_SIZE_2GB
|
||||
bool "2GB RAM"
|
||||
help
|
||||
Set RAM size fix to 2GB for phyCORE-i.MX8MM
|
||||
instead of runtime detection from EEPROM.
|
||||
|
||||
config PHYCORE_IMX8MM_RAM_SIZE_4GB
|
||||
bool "4GB RAM"
|
||||
help
|
||||
Set RAM size fix to 4GB for phyCORE-i.MX8MM
|
||||
instead of runtime detection from EEPROM.
|
||||
|
||||
endchoice
|
||||
|
||||
config PHYCORE_IMX8MM_RAM_STATIC_SOM_REV
|
||||
bool "Set static phyCORE-i.MX8MM SoM revision for RAM timing setup"
|
||||
default false
|
||||
help
|
||||
phyCORE-i.MX8MM SoM revision 7 uses a updated set of optimized
|
||||
RAM timings compared to revision 6 and older. Set the SoM
|
||||
revision during compile time instead of being detected.
|
||||
|
||||
choice
|
||||
prompt "phyCORE-i.MX8MM RAM timing SoM revision static config"
|
||||
depends on PHYCORE_IMX8MM_RAM_STATIC_SOM_REV
|
||||
default PHYCORE_IMX8MM_USE_SOM_REV_7
|
||||
help
|
||||
Use a fixed revision setting instead of runtime
|
||||
auto detection.
|
||||
|
||||
config PHYCORE_IMX8MM_USE_SOM_REV_6
|
||||
bool "RAM Timings for SoM Revisions 6 and older"
|
||||
help
|
||||
Use optimized RAM Timings for phyCORE-i.MX8MM SoM Revisions 6
|
||||
and older instead of autodetecting.
|
||||
|
||||
config PHYCORE_IMX8MM_USE_SOM_REV_7
|
||||
bool "RAM Timings for SoM Revision 7"
|
||||
help
|
||||
Use optimized RAM Timings for phyCORE-i.MX8MM SoM Revision 7
|
||||
instead of autodetecting.
|
||||
endchoice
|
||||
|
||||
source "board/phytec/common/Kconfig"
|
||||
endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,13 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
/*
|
||||
* Copyright (C) 2025 PHYTEC Messtechnik GmbH
|
||||
*/
|
||||
|
||||
#ifndef __LPDDR4_TIMING_H__
|
||||
#define __LPDDR4_TIMING_H__
|
||||
|
||||
void set_dram_timings_1gb(void);
|
||||
void set_dram_timings_4gb(void);
|
||||
void set_dram_timings_rev7(void);
|
||||
|
||||
#endif /* __LPDDR4_TIMING_H__ */
|
||||
@@ -9,6 +9,7 @@
|
||||
#include <asm/mach-imx/boot_mode.h>
|
||||
#include <env.h>
|
||||
#include <miiphy.h>
|
||||
#include <init.h>
|
||||
|
||||
static int setup_fec(void)
|
||||
{
|
||||
@@ -50,3 +51,20 @@ int board_late_init(void)
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_phys_sdram_size(phys_size_t *size)
|
||||
{
|
||||
if (!size)
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* check various RAM sizes (1, 2 and 4 GB) otherwise
|
||||
* return the default of 2GB
|
||||
*/
|
||||
*size = get_ram_size((void *)PHYS_SDRAM,
|
||||
(long)PHYS_SDRAM_SIZE + PHYS_SDRAM_2_SIZE);
|
||||
if (*size == 0)
|
||||
*size = SZ_2G;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -16,11 +16,19 @@
|
||||
#include <log.h>
|
||||
#include <spl.h>
|
||||
|
||||
#include "lpddr4_timing.h"
|
||||
#include "../common/imx8m_som_detection.h"
|
||||
|
||||
#define EEPROM_ADDR 0x51
|
||||
#define EEPROM_ADDR_FALLBACK 0x59
|
||||
|
||||
enum phytec_imx8mm_ddr_eeprom_code {
|
||||
INVALID = PHYTEC_EEPROM_INVAL,
|
||||
PHYTEC_IMX8MM_DDR_1GB = 1,
|
||||
PHYTEC_IMX8MM_DDR_2GB = 3,
|
||||
PHYTEC_IMX8MM_DDR_4GB = 5,
|
||||
};
|
||||
|
||||
int spl_board_boot_device(enum boot_device boot_dev_spl)
|
||||
{
|
||||
switch (boot_dev_spl) {
|
||||
@@ -42,17 +50,63 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
|
||||
static void spl_dram_init(void)
|
||||
{
|
||||
int ret;
|
||||
enum phytec_imx8mm_ddr_eeprom_code size = PHYTEC_EEPROM_INVAL;
|
||||
u8 rev = PHYTEC_EEPROM_INVAL;
|
||||
|
||||
ret = phytec_eeprom_data_setup_fallback(NULL, 0, EEPROM_ADDR,
|
||||
EEPROM_ADDR_FALLBACK);
|
||||
if (ret)
|
||||
if (ret && !IS_ENABLED(CONFIG_PHYCORE_IMX8MM_RAM_SIZE_FIX))
|
||||
goto out;
|
||||
|
||||
ret = phytec_imx8m_detect(NULL);
|
||||
if (!ret)
|
||||
phytec_print_som_info(NULL);
|
||||
|
||||
if (IS_ENABLED(CONFIG_PHYCORE_IMX8MM_RAM_SIZE_FIX)) {
|
||||
if (IS_ENABLED(CONFIG_PHYCORE_IMX8MM_RAM_SIZE_1GB))
|
||||
size = PHYTEC_IMX8MM_DDR_1GB;
|
||||
else if (IS_ENABLED(CONFIG_PHYCORE_IMX8MM_RAM_SIZE_2GB))
|
||||
size = PHYTEC_IMX8MM_DDR_2GB;
|
||||
else if (IS_ENABLED(CONFIG_PHYCORE_IMX8MM_RAM_SIZE_4GB))
|
||||
size = PHYTEC_IMX8MM_DDR_4GB;
|
||||
} else {
|
||||
size = phytec_get_imx8m_ddr_size(NULL);
|
||||
}
|
||||
|
||||
if (IS_ENABLED(CONFIG_PHYCORE_IMX8MM_RAM_STATIC_SOM_REV)) {
|
||||
if (IS_ENABLED(CONFIG_PHYCORE_IMX8MM_USE_SOM_REV_6))
|
||||
rev = 6;
|
||||
else if (IS_ENABLED(CONFIG_PHYCORE_IMX8MM_USE_SOM_REV_7))
|
||||
rev = 7;
|
||||
} else {
|
||||
rev = phytec_get_rev(NULL);
|
||||
}
|
||||
|
||||
if (rev >= 7 || rev == PHYTEC_EEPROM_INVAL) {
|
||||
debug("%s: Using rev7 RAM timings.\n", __func__);
|
||||
set_dram_timings_rev7();
|
||||
} else {
|
||||
debug("%s: Using rev6 RAM timings.\n", __func__);
|
||||
}
|
||||
|
||||
switch (size) {
|
||||
case PHYTEC_IMX8MM_DDR_1GB:
|
||||
set_dram_timings_1gb();
|
||||
break;
|
||||
case PHYTEC_IMX8MM_DDR_2GB:
|
||||
break;
|
||||
case PHYTEC_IMX8MM_DDR_4GB:
|
||||
set_dram_timings_4gb();
|
||||
break;
|
||||
default:
|
||||
goto out;
|
||||
}
|
||||
ddr_init(&dram_timing);
|
||||
|
||||
return;
|
||||
out:
|
||||
puts("Could not detect correct RAM size. Fall back to default.\n");
|
||||
set_dram_timings_rev7();
|
||||
ddr_init(&dram_timing);
|
||||
}
|
||||
|
||||
|
||||
@@ -201,6 +201,7 @@ const struct toradex_som toradex_modules[] = {
|
||||
{ VERDIN_IMX8MMQ_2G_WIFI_BT_IT_64G, "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) },
|
||||
{ SMARC_IMX8MPQ_4GB_WB_IT_64G, "SMARC iMX8M Plus Quad 4GB WB IT", TARGET_IS_ENABLED(TORADEX_SMARC_IMX8MP) },
|
||||
{ VERDIN_AM62D_1G_WIFI_BT_ET, "Verdin AM62 Dual 1GB WB ET", TARGET_IS_ENABLED(VERDIN_AM62_A53) },
|
||||
{ AQUILA_IMX95_HEXA_8GB_IT, "Aquila iMX95 Hexa 8GB IT", TARGET_IS_ENABLED(AQUILA_IMX95) },
|
||||
};
|
||||
|
||||
struct pid4list {
|
||||
|
||||
@@ -164,6 +164,7 @@ enum {
|
||||
VERDIN_IMX8MMQ_2G_WIFI_BT_IT_64G,
|
||||
SMARC_IMX8MPQ_4GB_WB_IT_64G, /* 240 */
|
||||
VERDIN_AM62D_1G_WIFI_BT_ET = 242,
|
||||
AQUILA_IMX95_HEXA_8GB_IT,
|
||||
};
|
||||
|
||||
enum {
|
||||
|
||||
@@ -4,6 +4,7 @@ CONFIG_TEXT_BASE=0x40200000
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SPL_GPIO=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_PHYTEC_SOM_DETECTION=y
|
||||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0x3C0000
|
||||
CONFIG_DM_GPIO=y
|
||||
|
||||
@@ -0,0 +1,143 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_IMX9=y
|
||||
CONFIG_TEXT_BASE=0x90200000
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x10000
|
||||
CONFIG_SPL_GPIO=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_ENV_SOURCE_FILE="imx95_frdm"
|
||||
CONFIG_NR_DRAM_BANKS=3
|
||||
CONFIG_SF_DEFAULT_SPEED=40000000
|
||||
CONFIG_ENV_SIZE=0x4000
|
||||
CONFIG_ENV_OFFSET=0x700000
|
||||
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/scmi/imximage.cfg"
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx95-15x15-frdm"
|
||||
CONFIG_TARGET_IMX95_15X15_FRDM=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
CONFIG_SYS_MONITOR_LEN=524288
|
||||
CONFIG_SPL_MMC=y
|
||||
CONFIG_SPL_SERIAL=y
|
||||
CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL_TEXT_BASE=0x20480000
|
||||
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
||||
CONFIG_SPL_BSS_START_ADDR=0x204d6000
|
||||
CONFIG_SPL_BSS_MAX_SIZE=0x2000
|
||||
CONFIG_SYS_LOAD_ADDR=0x90400000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SPL_RECOVER_DATA_SECTION=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_SYS_MEMTEST_START=0x90000000
|
||||
CONFIG_SYS_MEMTEST_END=0xA0000000
|
||||
CONFIG_REMAKE_ELF=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_SYSTEM_SETUP=y
|
||||
CONFIG_BOOTCOMMAND="bootflow scan -l; run bsp_bootcmd"
|
||||
CONFIG_DEFAULT_FDT_FILE="imx95-15x15-frdm.dtb"
|
||||
CONFIG_SYS_CBSIZE=2048
|
||||
CONFIG_SYS_PBSIZE=2074
|
||||
# CONFIG_BOARD_INIT is not set
|
||||
CONFIG_BOARD_LATE_INIT=y
|
||||
CONFIG_PCI_INIT_R=y
|
||||
CONFIG_SPL_MAX_SIZE=0x20000
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
CONFIG_SPL_LOAD_IMX_CONTAINER=y
|
||||
CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/scmi/container.cfg"
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
CONFIG_SPL_SYS_MALLOC=y
|
||||
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
|
||||
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x93200000
|
||||
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
|
||||
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_DM_MAILBOX=y
|
||||
CONFIG_SPL_POWER=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_SYS_PROMPT="u-boot=> "
|
||||
CONFIG_CMD_ERASEENV=y
|
||||
CONFIG_CMD_NVEDIT_EFI=y
|
||||
CONFIG_CRC32_VERIFY=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_CMD_CLK=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_FUSE=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_PCI=y
|
||||
CONFIG_CMD_POWEROFF=y
|
||||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_EFIDEBUG=y
|
||||
CONFIG_CMD_RTC=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_GETTIME=y
|
||||
CONFIG_CMD_TIMER=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_NOWHERE=y
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_ENV_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_ENV_MMC_DEVICE_INDEX=1
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_USE_ETHPRIME=y
|
||||
CONFIG_ETHPRIME="eth0"
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_SYS_RX_ETH_BUFFER=8
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_SPL_OF_TRANSLATE=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_SPL_CLK_CCF=y
|
||||
CONFIG_CLK_SCMI=y
|
||||
CONFIG_SPL_CLK_SCMI=y
|
||||
CONFIG_CLK_IMX95_BLKCTRL=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_SPL_FIRMWARE=y
|
||||
# CONFIG_SCMI_AGENT_SMCCC is not set
|
||||
CONFIG_IMX_RGPIO2P=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_ADP5585_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_IMX_LPI2C=y
|
||||
CONFIG_IMX_MU_MBOX=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_MMC_IO_VOLTAGE=y
|
||||
CONFIG_MMC_UHS_SUPPORT=y
|
||||
CONFIG_MMC_HS400_ES_SUPPORT=y
|
||||
CONFIG_MMC_HS400_SUPPORT=y
|
||||
CONFIG_FSL_USDHC=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_PHY_MOTORCOMM=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_FSL_ENETC=y
|
||||
CONFIG_PCIE_ECAM_GENERIC=y
|
||||
CONFIG_PCIE_DW_IMX=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_PINCTRL_IMX_SCMI=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_SCMI_POWER_DOMAIN=y
|
||||
CONFIG_SPL_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_SPL_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_DM_RTC=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_FSL_LPUART=y
|
||||
CONFIG_ULP_WATCHDOG=y
|
||||
CONFIG_LZO=y
|
||||
CONFIG_BZIP2=y
|
||||
CONFIG_WDT=y
|
||||
@@ -0,0 +1,131 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
imx95_frdm
|
||||
=======================
|
||||
|
||||
U-Boot for the NXP i.MX95 15x15 FRDM board
|
||||
|
||||
Quick Start
|
||||
-----------
|
||||
|
||||
- Get ahab-container.img
|
||||
- Get DDR PHY Firmware Images
|
||||
- Get and Build OEI Images
|
||||
- Get and Build System Manager Image
|
||||
- Get and Build the ARM Trusted Firmware
|
||||
- Build the Bootloader Image
|
||||
- Boot
|
||||
|
||||
Get ahab-container.img
|
||||
--------------------------------------
|
||||
|
||||
Note: srctree is U-Boot source directory
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-2.0.2-89161a8.bin
|
||||
$ sh firmware-ele-imx-2.0.2-89161a8.bin --auto-accept
|
||||
|
||||
i.MX95 A0 silicon version
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ cp firmware-ele-imx-2.0.2-89161a8/mx95a0-ahab-container.img $(srctree)
|
||||
|
||||
i.MX95 B0 silicon version
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ cp firmware-ele-imx-2.0.2-89161a8/mx95b0-ahab-container.img $(srctree)
|
||||
|
||||
Get DDR PHY Firmware Images
|
||||
--------------------------------------
|
||||
|
||||
Note: srctree is U-Boot source directory
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.28-994fa14.bin
|
||||
$ sh firmware-imx-8.28-994fa14.bin --auto-accept
|
||||
$ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr5*v202409.bin $(srctree)
|
||||
$ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr4x*v202409.bin $(srctree)
|
||||
|
||||
Get and Build OEI Images
|
||||
--------------------------------------
|
||||
|
||||
Note: srctree is U-Boot source directory
|
||||
Get OEI from: https://github.com/nxp-imx/imx-oei
|
||||
branch: master
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ sudo apt -y install make gcc g++-multilib srecord
|
||||
$ wget https://developer.arm.com/-/media/Files/downloads/gnu/13.3.rel1/binrel/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz
|
||||
$ tar xvf arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz
|
||||
$ export TOOLS=$PWD
|
||||
$ git clone -b master https://github.com/nxp-imx/imx-oei.git
|
||||
$ cd imx-oei
|
||||
|
||||
i.MX95 B0 silicon version on 15x15 LPDDR4X FRDM Board
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ make board=mx95lp4x-15 oei=ddr DEBUG=1 r=B0 all
|
||||
$ cp build/mx95lp4x-15/ddr/oei-m33-ddr.bin $(srctree)
|
||||
|
||||
Get and Build System Manager Image
|
||||
--------------------------------------
|
||||
|
||||
Note: srctree is U-Boot source directory
|
||||
Get System Manager from: https://github.com/nxp-imx/imx-sm
|
||||
branch: master
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ sudo apt -y install make gcc g++-multilib srecord
|
||||
$ wget https://developer.arm.com/-/media/Files/downloads/gnu/13.3.rel1/binrel/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz
|
||||
$ tar xvf arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz
|
||||
$ export TOOLS=$PWD
|
||||
$ git clone -b master https://github.com/nxp-imx/imx-sm.git
|
||||
$ cd imx-sm
|
||||
$ make config=mx95evk all
|
||||
$ cp build/mx95evk/m33_image.bin $(srctree)
|
||||
|
||||
Get and Build the ARM Trusted Firmware
|
||||
--------------------------------------
|
||||
|
||||
Note: srctree is U-Boot source directory
|
||||
Get ATF from: https://github.com/nxp-imx/imx-atf/
|
||||
branch: lf_v2.12
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ export CROSS_COMPILE=aarch64-poky-linux-
|
||||
$ unset LDFLAGS
|
||||
$ unset AS
|
||||
$ git clone -b lf_v2.12 https://github.com/nxp-imx/imx-atf.git
|
||||
$ cd imx-atf
|
||||
$ make PLAT=imx95 bl31
|
||||
$ cp build/imx95/release/bl31.bin $(srctree)
|
||||
|
||||
Build the Bootloader Image
|
||||
--------------------------
|
||||
|
||||
i.MX95 B0 silicon version on 15x15 LPDDR4X FRDM Board
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ export CROSS_COMPILE=aarch64-poky-linux-
|
||||
$ make imx95_15x15_frdm_defconfig
|
||||
$ make
|
||||
|
||||
Copy imx-boot-imx95.bin to the MicroSD card:
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ sudo dd if=flash.bin of=/dev/sd[x] bs=1k seek=32 conv=fsync
|
||||
|
||||
Boot
|
||||
----
|
||||
|
||||
Set i.MX95 boot device to MicroSD card
|
||||
@@ -17,6 +17,7 @@ NXP Semiconductors
|
||||
imx93_9x9_qsb
|
||||
imx93_11x11_evk
|
||||
imx93_frdm
|
||||
imx95_frdm
|
||||
imx943_evk
|
||||
imx95_evk
|
||||
imx952_evk
|
||||
|
||||
@@ -167,17 +167,25 @@ The nxp-imx8mcst etype is configurable using either DT properties or environment
|
||||
variables. The following DT properties and environment variables are supported.
|
||||
Note that environment variables override DT properties.
|
||||
|
||||
+--------------------+-----------+------------------------------------------------------------------+
|
||||
| DT property | Variable | Description |
|
||||
+====================+===========+==================================================================+
|
||||
| nxp,loader-address | | SPL base address |
|
||||
+--------------------+-----------+------------------------------------------------------------------+
|
||||
| nxp,srk-table | SRK_TABLE | full path to SRK_1_2_3_4_table.bin |
|
||||
+--------------------+-----------+------------------------------------------------------------------+
|
||||
| nxp,csf-crt | CSF_KEY | full path to the CSF Key CSF1_1_sha256_4096_65537_v3_usr_crt.pem |
|
||||
+--------------------+-----------+------------------------------------------------------------------+
|
||||
| nxp,img-crt | IMG_KEY | full path to the IMG Key IMG1_1_sha256_4096_65537_v3_usr_crt.pem |
|
||||
+--------------------+-----------+------------------------------------------------------------------+
|
||||
+--------------------+-------------+------------------------------------------------------------------+
|
||||
| DT property | Variable | Description |
|
||||
+====================+=============+==================================================================+
|
||||
| nxp,loader-address | | SPL base address |
|
||||
+--------------------+-------------+------------------------------------------------------------------+
|
||||
| nxp,srk-table | SRK_TABLE | full path to SRK_1_2_3_4_table.bin |
|
||||
+--------------------+-------------+------------------------------------------------------------------+
|
||||
| nxp,csf-crt | CSF_KEY | full path to the CSF Key CSF1_1_sha256_4096_65537_v3_usr_crt.pem |
|
||||
+--------------------+-------------+------------------------------------------------------------------+
|
||||
| nxp,img-crt | IMG_KEY | full path to the IMG Key IMG1_1_sha256_4096_65537_v3_usr_crt.pem |
|
||||
+--------------------+-------------+------------------------------------------------------------------+
|
||||
| nxp,fast-auth | | enable fast authentication method |
|
||||
+--------------------+-------------+------------------------------------------------------------------+
|
||||
| nxp,srk-crt | SRK_KEY | full path to the SRK Key SRK1_sha256_4096_65537_v3_ca_crt.pem |
|
||||
+--------------------+-------------+------------------------------------------------------------------+
|
||||
| nxp,unlock | | unlock CAAM in SPL |
|
||||
+--------------------+-------------+------------------------------------------------------------------+
|
||||
| nxp,cst-backend | CST_BACKEND | CST tool backend, default is 'ssl', or selectable 'pkcs11' |
|
||||
+--------------------+-------------+------------------------------------------------------------------+
|
||||
|
||||
Environment variables can be set as follows to point the build process
|
||||
to external key material:
|
||||
|
||||
@@ -0,0 +1,23 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright 2026 NXP
|
||||
*/
|
||||
|
||||
#ifndef __IMX95_EVK_H
|
||||
#define __IMX95_EVK_H
|
||||
|
||||
#include <linux/sizes.h>
|
||||
#include <linux/stringify.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
|
||||
#define CFG_SYS_INIT_RAM_ADDR 0x90000000
|
||||
#define CFG_SYS_INIT_RAM_SIZE 0x200000
|
||||
|
||||
#define CFG_SYS_SDRAM_BASE 0x90000000
|
||||
#define PHYS_SDRAM 0x90000000
|
||||
|
||||
#define PHYS_SDRAM_SIZE 0x70000000 /* 2GB - 256MB DDR */
|
||||
|
||||
#define PHYS_SDRAM_2_SIZE 0x180000000 /* 6GB (Totally 8GB) */
|
||||
|
||||
#endif
|
||||
@@ -28,6 +28,7 @@
|
||||
#define CFG_SYS_SDRAM_BASE 0x40000000
|
||||
|
||||
#define PHYS_SDRAM 0x40000000
|
||||
#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
|
||||
|
||||
#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G) /* 3GB */
|
||||
#define PHYS_SDRAM_2 0x100000000
|
||||
#define PHYS_SDRAM_2_SIZE SZ_1G /* 4GB DDR */
|
||||
#endif /* __PHYCORE_IMX8MM_H */
|
||||
|
||||
@@ -20,8 +20,9 @@ from binman import elf
|
||||
from dtoc import fdt_util
|
||||
from u_boot_pylib import tools
|
||||
|
||||
MAGIC_NXP_IMX_IVT = 0x412000d1
|
||||
MAGIC_FITIMAGE = 0xedfe0dd0
|
||||
MAGIC_NXP_IMX_IVT = 0x412000d1
|
||||
MAGIC_NXP_IMX_FCFB = 0x42464346
|
||||
MAGIC_FITIMAGE = 0xedfe0dd0
|
||||
|
||||
KEY_NAME = 'sha256_4096_65537_v3_usr_crt'
|
||||
|
||||
@@ -65,6 +66,13 @@ class Entry_nxp_imx8mcst(Entry_mkimage):
|
||||
|
||||
Properties / Entry arguments:
|
||||
- nxp,loader-address - loader address (SPL text base)
|
||||
- nxp,srk-table - full path to SRK_1_2_3_4_table.bin
|
||||
- nxp,csf-crt - full path to the CSF Key CSF1_1_sha256_4096_65537_v3_usr_crt.pem
|
||||
- nxp,img-crt - full path to the IMG Key IMG1_1_sha256_4096_65537_v3_usr_crt.pem
|
||||
- nxp,fast-auth - enable fast authentication method
|
||||
- nxp,srk-crt - full path to the SRK Key SRK1_sha256_4096_65537_v3_ca_crt.pem
|
||||
- nxp,unlock - unlock CAAM in SPL
|
||||
- nxp,cst-backend - CST tool backend, default is 'ssl', or selectable 'pkcs11'
|
||||
"""
|
||||
|
||||
def __init__(self, section, etype, node):
|
||||
@@ -90,6 +98,10 @@ class Entry_nxp_imx8mcst(Entry_mkimage):
|
||||
'SRK_KEY', fdt_util.GetString(self._node, 'nxp,srk-crt',
|
||||
f'SRK1_{KEY_NAME}.pem'))
|
||||
|
||||
self.backend = os.getenv(
|
||||
'CST_BACKEND', fdt_util.GetString(self._node, 'nxp,cst-backend',
|
||||
'ssl'))
|
||||
|
||||
self.unlock = fdt_util.GetBool(self._node, 'nxp,unlock')
|
||||
self.ReadEntries()
|
||||
|
||||
@@ -101,6 +113,9 @@ class Entry_nxp_imx8mcst(Entry_mkimage):
|
||||
# - If it is mkimage'd imx8mimage, then extract to be signed data size
|
||||
# from imx8mimage header, and calculate CSF blob offset right past
|
||||
# the SPL from this information.
|
||||
# - If it is mkimage'd imx8mimage wrapped in FCFB, then extract to be
|
||||
# signed data size from imx8mimage header past the FCFB header, and
|
||||
# calculate CSF blob offset right past the SPL from this information.
|
||||
# - If it is fitImage, then pad the image to 4k, add generated IVT and
|
||||
# sign the whole payload, then append CSF blob at the end right past
|
||||
# the IVT.
|
||||
@@ -114,6 +129,17 @@ class Entry_nxp_imx8mcst(Entry_mkimage):
|
||||
signsize = struct.unpack('<I', data[24:28])[0] - signbase
|
||||
# Remove mkimage generated padding from the end of data
|
||||
data = data[:signsize]
|
||||
elif signtype == MAGIC_NXP_IMX_FCFB: # SPL/imx8mimage with FCFB
|
||||
# Sign the payload including FCFB and imx8mimage headers
|
||||
# (extra 0x1000 and 0x40 bytes before the payload)
|
||||
signbase -= 0x1040
|
||||
# Pull the end address from IVT offset 24 Bytes and subtract
|
||||
# the start address to get amount of data to sign. The IVT
|
||||
# itself is at offset 4096 Bytes, so the total end address
|
||||
# offset in the image is 4120 Bytes.
|
||||
signsize = struct.unpack('<I', data[4120:4124])[0] - signbase
|
||||
# Remove mkimage generated padding from the end of data
|
||||
data = data[:signsize]
|
||||
elif signtype == MAGIC_FITIMAGE: # fitImage
|
||||
# Align fitImage to 4k
|
||||
signsize = tools.align(len(data), 0x1000)
|
||||
@@ -161,8 +187,14 @@ class Entry_nxp_imx8mcst(Entry_mkimage):
|
||||
with open(cfg_fname, 'w') as cfgf:
|
||||
config.write(cfgf)
|
||||
|
||||
# SSL is the default backend, PKCS11 backend is optional
|
||||
if self.backend == "pkcs11":
|
||||
cst_backend = "pkcs11"
|
||||
else:
|
||||
cst_backend = "ssl"
|
||||
|
||||
output_fname = tools.get_output_filename(f'nxp.csf-output-blob.{uniq}')
|
||||
args = ['-i', cfg_fname, '-o', output_fname]
|
||||
args = ['-i', cfg_fname, '-o', output_fname, '-b', cst_backend]
|
||||
if self.cst.run_cmd(*args) is not None:
|
||||
outdata = tools.read_file(output_fname)
|
||||
# fixme: 0x2000 should be CONFIG_CSF_SIZE
|
||||
|
||||
@@ -8029,6 +8029,39 @@ fdt fdtmap Extract the devicetree blob from the fdtmap
|
||||
err = stderr.getvalue()
|
||||
self.assertRegex(err, "Image 'image'.*missing bintools.*: cst")
|
||||
|
||||
def testNxpImx8mCSTPKCS11(self):
|
||||
"""Test CST signing with IVT-format input (pkcs11 auth, no unlock)"""
|
||||
# Create fake IVT blob: magic(4) + padding(20) + signsize_addr(4)
|
||||
# + padding(36) = 64 bytes
|
||||
ivt_data = struct.pack('<I', 0x412000d1)
|
||||
ivt_data += b'\x00' * 20
|
||||
ivt_data += struct.pack('<I', 0)
|
||||
ivt_data += b'\x00' * 36
|
||||
self._MakeInputFile('imx8m-ivt.bin', ivt_data)
|
||||
with terminal.capture() as (_, stderr):
|
||||
self._DoTestFile('vendor/nxp_imx8_csf_pkcs11.dts',
|
||||
force_missing_bintools='cst')
|
||||
err = stderr.getvalue()
|
||||
self.assertRegex(err, "Image 'image'.*missing bintools.*: cst")
|
||||
|
||||
def testNxpImx8mCSTFCFB(self):
|
||||
"""Test CST signing with FCFB-format input (normal auth, no unlock)"""
|
||||
# Create fake FCFB blob: magic(4) + padding(4116)
|
||||
ivt_data = struct.pack('<I', 0x42464346)
|
||||
ivt_data += b'\x00' * 4116
|
||||
# Create fake IVT blob: magic(4) + padding(20) + signsize_addr(4)
|
||||
# + padding(36) = 64 bytes
|
||||
ivt_data += struct.pack('<I', 0x412000d1)
|
||||
ivt_data += b'\x00' * 20
|
||||
ivt_data += struct.pack('<I', 0)
|
||||
ivt_data += b'\x00' * 36
|
||||
self._MakeInputFile('imx8m-ivt.bin', ivt_data)
|
||||
with terminal.capture() as (_, stderr):
|
||||
self._DoTestFile('vendor/nxp_imx8_csf.dts',
|
||||
force_missing_bintools='cst')
|
||||
err = stderr.getvalue()
|
||||
self.assertRegex(err, "Image 'image'.*missing bintools.*: cst")
|
||||
|
||||
def testNxpImx8mCSTFastAuth(self):
|
||||
"""Test CST signing with fast-auth mode, unlock, and FIT format"""
|
||||
# FIT magic covers the FIT-signing path; fast-auth/unlock cover the
|
||||
|
||||
@@ -0,0 +1,27 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
binman {
|
||||
nxp-imx8mcst {
|
||||
args;
|
||||
nxp,loader-address = <0x10>;
|
||||
nxp,cst-backend = "pkcs11";
|
||||
|
||||
blob {
|
||||
filename = "imx8m-ivt.bin";
|
||||
};
|
||||
|
||||
imagename {
|
||||
type = "section";
|
||||
|
||||
u-boot {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user