arm64: xilinx: Add PMC PGGS3 and PGGS4 registers
Add PMC Global PGGS3 and PGGS4 register defines to Versal and Versal Gen 2 hardware headers. These registers hold boot index and boot metadata required for FWU multi-bank update support. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20260514102601.1759779-2-padmarao.begari@amd.com
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Michal Simek
parent
472ea8b621
commit
7188742e7e
@@ -100,3 +100,6 @@ struct crp_regs {
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#define MIO_PIN_12 0xF1060030
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#define BANK0_OUTPUT 0xF1020040
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#define BANK0_TRI 0xF1060200
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#define PMC_GLOBAL_PGGS3_REG 0xF111005C
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#define PMC_GLOBAL_PGGS4_REG 0xF1110060
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@@ -105,3 +105,6 @@ enum versal2_platform {
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#define PMXC_UFS_CAL_1_OFFSET 0xBE8
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#define PMXC_SRAM_CSR 0x4C
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#define PMXC_TX_RX_CFG_RDY 0x54
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#define PMC_GLOBAL_PGGS3_REG 0xF111005C
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#define PMC_GLOBAL_PGGS4_REG 0xF1110060
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