arm64: xilinx: Add PMC PGGS3 and PGGS4 registers

Add PMC Global PGGS3 and PGGS4 register defines to Versal and
Versal Gen 2 hardware headers. These registers hold boot index
and boot metadata required for FWU multi-bank update support.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260514102601.1759779-2-padmarao.begari@amd.com
This commit is contained in:
Padmarao Begari
2026-06-08 10:50:05 +02:00
committed by Michal Simek
parent 472ea8b621
commit 7188742e7e
2 changed files with 6 additions and 0 deletions
@@ -100,3 +100,6 @@ struct crp_regs {
#define MIO_PIN_12 0xF1060030
#define BANK0_OUTPUT 0xF1020040
#define BANK0_TRI 0xF1060200
#define PMC_GLOBAL_PGGS3_REG 0xF111005C
#define PMC_GLOBAL_PGGS4_REG 0xF1110060
@@ -105,3 +105,6 @@ enum versal2_platform {
#define PMXC_UFS_CAL_1_OFFSET 0xBE8
#define PMXC_SRAM_CSR 0x4C
#define PMXC_TX_RX_CFG_RDY 0x54
#define PMC_GLOBAL_PGGS3_REG 0xF111005C
#define PMC_GLOBAL_PGGS4_REG 0xF1110060