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xilinx: mbv: Allow compiler to optimize inlining in SPL

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Enable CONFIG_SPL_OPTIMIZE_INLINING to let the compiler decide which
functions marked 'inline' to actually inline, rather than forcing all of
them. This reduces SPL code size by allowing the compiler to eliminate
unnecessary code duplication.

   spl/u-boot-spl: all -872 text -872

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/09f2a62099abf561b91b0d3692714f0f29057d31.1777550623.git.michal.simek@amd.com
This commit is contained in:
Michal Simek
2026-06-08 08:02:39 +02:00
parent 62a49635b0
commit 472ea8b621
1 changed files with 1 additions and 0 deletions
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configs/xilinx_mbv32_defconfig
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@@ -19,6 +19,7 @@ CONFIG_TARGET_XILINX_MBV=y
# CONFIG_RISCV_ISA_F is not set
# CONFIG_SPL_SMP is not set
# CONFIG_AVAILABLE_HARTS is not set
CONFIG_SPL_OPTIMIZE_INLINING=y
CONFIG_REMAKE_ELF=y
# CONFIG_EFI_LOADER is not set
CONFIG_FIT=y