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base: vhaudiquet:13f7f21b49ad0a326bee4f6f811e3aa0db54f001
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compare: vhaudiquet:c421595a95fb8341680075346084c6365d1660e2
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vhaudiquet:master

2 Commits
13f7f21b49 ... c421595a95

Author SHA1 Message Date
vhaudiquet
c421595a95 Added MRET/SRET mock support 2023-10-11 18:37:52 +02:00
vhaudiquet
9e895e9032 Change WFI behavior : halt simulation 2023-10-11 17:35:32 +02:00
1 changed files with 14 additions and 1 deletions
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15
src/cpu/rv32cpu.c
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@ -518,6 +518,12 @@ static void cpu_execute(rv32_cpu_t* cpu, instruction_t* instruction)
cpu->sim_ticks_left = 1;
cpu->pc -= 4;
break;
case IMM_SRET:
fprintf(stderr, "SRET: We don't support that.\n");
break;
case IMM_MRET:
fprintf(stderr, "MRET: We don't support that.\n");
break;
default:
switch(instruction->func7)
{
@ -525,7 +531,8 @@ static void cpu_execute(rv32_cpu_t* cpu, instruction_t* instruction)
fprintf(stderr, "SFENCE.VMA: Guest kernel must think we have an MMU. We have none.\n");
break;
case FUNC7_WFI:
fprintf(stderr, "WFI: Guest kernel must think we have interrupts. We have none.\n");
fprintf(stderr, "WFI: Guest kernel must think we have interrupts. We have none. Halting simulation.\n");
cpu->sim_ticks_left = 1;
break;
default:
fprintf(stderr, "FATAL: Unknown IMM for ECALL/EBREAK instruction while executing (IMM=0x%x)\n", instruction->immediate);
@ -1069,6 +1076,12 @@ static void cpu_print_instruction(instruction_t* instruction)
case IMM_EBREAK:
printf("ebreak\n");
break;
case IMM_SRET:
printf("sret\n");
break;
case IMM_MRET:
printf("mret\n");
break;
default:
switch(instruction->func7)
{