Added memory access type for mmu

src/memory/mmu.c

@@ -44,7 +44,24 @@ extern uint8_t* memory;
 #define VADDR_VPN_0 (0x003FF000)
 #define VADDR_PAGE_OFFSET (0x00000FFF)
 
-uint32_t mmu_resolve(rv32_cpu_t* cpu, uint32_t vaddr)
+uint32_t mmu_scause_from_access(memory_access_type_t access_type)
+{
+	switch(access_type)
+	{
+		case READ:
+			return SCAUSE_LOAD_PAGE_FAULT;
+		case WRITE:
+			return SCAUSE_STORE_AMO_PAGE_FAULT;
+		case INSTRUCTION_FETCH:
+			return SCAUSE_INSTRUCTION_PAGE_FAULT;
+		default:
+			fprintf(stderr, "mmu_scause_from_access: invalid parameter\n");
+			exit(EXIT_FAILURE);
+			break;
+	}
+}
+
+uint32_t mmu_resolve(rv32_cpu_t* cpu, memory_access_type_t access_type, uint32_t vaddr)
 {
 	// TODO: Make sure we are in S-mode or U-mode
 
@@ -64,8 +81,7 @@ uint32_t mmu_resolve(rv32_cpu_t* cpu, uint32_t vaddr)
 	if(!(pte & PTE_V))
 	{
 		// Invalid PTE
-		// TODO : Add a MEMORY_ACCESS_TYPE
-		exception_trigger(cpu, SCAUSE_INSTRUCTION_PAGE_FAULT);
+		exception_trigger(cpu, mmu_scause_from_access(access_type));
 	}
 
 	if((pte & PTE_R) || (pte & PTE_W) || (pte & PTE_X))
@@ -93,7 +109,7 @@ uint32_t mmu_resolve(rv32_cpu_t* cpu, uint32_t vaddr)
 	if(!(pte & PTE_V))
 	{
 		// Invalid PTE
-		exception_trigger(cpu, SCAUSE_INSTRUCTION_PAGE_FAULT);
+		exception_trigger(cpu, mmu_scause_from_access(access_type));
 	}
 
 	// This must be a leaf PTE, as Sv32 only supports 2-level mappings