Added basic SBI support

src/cpu/instruction.h

@@ -97,6 +97,8 @@
 #define IMM_ECALL 0x0
 #define IMM_EBREAK 0x1
 /* RISC-V Privileged Instructions */
+#define IMM_SRET 0x102
+#define IMM_MRET 0x302
 #define FUNC7_SFENCEVMA 0x9
 #define FUNC7_WFI 0x8
 #define FUNC7_SINVALVMA 0x11

src/cpu/rv32cpu.c

@@ -1,6 +1,7 @@
 #include "rv32cpu.h"
 #include "instruction.h"
 #include "csr.h"
+#include "devices/sbi/sbi.h"
 
 #include "memory/memory.h"
 #include "memory/mmu/mmu.h"
@@ -510,7 +511,7 @@ static void cpu_execute(rv32_cpu_t* cpu, instruction_t* instruction)
 					switch(instruction->immediate)
 					{
 						case IMM_ECALL:
-							fprintf(stderr, "ECALL: a7(sbi ext id) = %d, a6(sbi funct id) = %d\n", cpu->regs.a7, cpu->regs.a6);
+							sbi_call(cpu, cpu->regs.a7, cpu->regs.a6);
 							break;
 						case IMM_EBREAK:
 							// EBREAK : on debug, give back hand to debugger ; without debug, end simulation