ATAG_VIDEOLFB is not used anywhere.
The belowing warning is occurred due to this ATAG.
[ 0.000000] Ignoring unrecognised tag 0x54410008
This patch fixed it.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Martin Krause <Martin.Krause@tqs.de>
UBI: initialise update marker
The in kernel copy of a volume's update marker is not initialised from the
volume table. This means that volumes where an update was unfinnished will
not be treated as "forbidden to use". This is basically that the update
functionality was broken.
Signed-off-by: Peter Horton <zero@colonel-panic.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stefan Roese <sr@denx.de>
Since I haven't been actively maintaining these boards for a long while,
keeping myself as their maintainer makes no sense.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Ensure that date is called only with LC_ALL=C locale set to make dates
locale neutral thus preventing lurking of non-ASCII characters into
U-Boot binary.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Changed LANG= into LC_ALL= as suggested by Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The ARM ABI requires that the stack be aligned to 8 bytes as it is noted
in Procedure Call Standard for the ARM Architecture:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html
Unaligned SP also causes the problem with variable-length arrays
allocation when VLA address becomes less than stack pointer during
aligning of this address, so the next 'push' in the stack overwrites
first 4 bytes of VLA.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Tested on tx25(mx25), imx27lite(mx27), qong(mx31) and trab(s3c2400)
Tested-by: Wolfgang Denk <wd@denx.de>
The ARM ABI requires that the stack be aligned to 8 bytes as it is noted
in Procedure Call Standard for the ARM Architecture:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html
Unaligned SP also causes the problem with variable-length arrays
allocation when VLA address becomes less than stack pointer during
aligning of this address, so the next 'push' in the stack overwrites
first 4 bytes of VLA.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Move it inside the #ifdef CONFIG_NET_MULTI to avoid
eth.c:64: warning: 'eth_mac_skip' defined but not used
messages from a number of old, non-CONFIG_NET_MULTI boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
TFTP'ing a file of size 1747851 bytes with CONFIG_IP_DEFRAG and
CONFIG_TFTP_BLOCKSIZE set to 4096 fails with a timeout, because
the last fragment is not taken into account. This patch fixes
IP fragments having less than 8 bytes of payload.
Signed-off-by: Stephane Fillod <stephane.fillod@grassvalley.com>
Acked-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Move it inside the #ifdef CONFIG_NET_MULTI to avoid
eth.c:64: warning: 'eth_mac_skip' defined but not used
messages from anumber of old, non-CONFIG_NET_MULTI boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
Commit 37566090 "compiler.h: unify system ifdef cruft here" added both
a "#include <errno.h>" and a "extern int errno;" to include/compiler.h
which is causing build warnings for some systems, for example for the
"netstar" board:
In file included from /home/wd/git/u-boot/work/lib/crc32.c:15:
include/compiler.h:28: warning: function declaration isn't a prototype
The declaration of "errno" should be redundant, as <errno.h> is
supposed to provide a correct declaration, so drop it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
The push / pop instructions used in this file are available only with
more recent tool chains:
cache.S: Assembler messages:
cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}'
cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}'
Change push/pop into stmfd/ldmfd instructions to support older
versions of binutils as well.
I verified that the modified source code generates exactly the same
binary code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rix <tom@bumblecow.com>
Conflicts:
CONFLICT (rename/add): Rename
board/davinci/da830evm/Makefile->board/ti/tnetv107xevm/Makefile
in 89b765c7f6.
board/ti/tnetv107xevm/Makefile added in HEAD
But files were identical, so no problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds support for the LaCie ED Mini V2 product
which is based on the Marvell Orion5x SoC.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
This patch adds support for the Marvell Orion5x SoC.
It has no use alone, and must be followed by a patch
to add Orion5x support for serial, then support for
the ED Mini V2, an Orion5x-based product from LaCie.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
When set to PULL_NONE, gpio_set_pull function is returned without write the register.
This patch fixed it.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Part of this patch is by: Mikhail Kshevetskiy.
Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD
instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour
is undefined.
The issue was observed when working with the NAND code, which was rendered
disfunctional. Also, the vsprintf() function had serious problems with printing
64bit wide long longs. After aligning the stack, this wrong behaviour is no
longer present.
Tested on:
Marvell Littleton PXA310 board
Toradex Colibri PXA320 board
Aeronix Zipit Z2 PXA270 handheld
Voipac PXA270 board
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Provides initial support for TI OMAP-L138/DA850 SoC devices on
a Logic PD EVM board.
Provides:
Initial boot and configuration.
Support for i2c.
UART support (console).
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TI's DA850/OMAP-L138 platform is similar to DA830/OMAP-L137
in many aspects. So instead of repeating the same code in
multiple files, move the common code to a different file
and call those functions from the respective da830/da850
files.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Nick Thompson <nick.thompson@ge.com>
Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Pandora has a capacitor connected as backup battery, which allows
retaining RTC for some time while main battery is removed. Enable backup
battery charge function to charge that capacitor.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
I have updated this patch based on the comments [1] by Wolfgang Denk and
removed unused variables.
[1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html]
Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and
take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM,
SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file.
Remove unused variables in the spi_xfer() function.
Signed-off-by: Delio Brignoli <dbrignoli@audioscience.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for the EMIF4 interface
available in the AM35x processors.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Consolidated SDRC related functions into one file - sdrc.c
And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
initialized for CS1
From: Vaibhav Hiremath <hvaibhav@ti.com>
The patch makes sure that size for SDRC CS1 gets calculated
only when the CS1 SDRC is initialized.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The EVMS have been shipping with NAND (instead of OneNAND) as default.
So, this patch sets NAND as default.
To choose OneNAND, define CMD_ONENAND instead of CMD_NAND in the
config file omap3_evm.h.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This patch adds support for the
TNETV107X EVM board.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This is an initial commit with
basic functionality, more commits with drivers, etc. to follow.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The current ARM1176 CPU specific code is too specific to the SMDK6400
architecture. The following changes were necessary prerequisites for the
addition of other SoCs based on ARM1176.
Existing board's (SMDK6400) configuration has been modified to keep behavior
unchanged despite these changes.
1. Peripheral port remap configurability
The earlier code had hardcoded remap values specific to s3c64xx in start.S.
This change makes the peripheral port remap addresses and sizes configurable.
2. U-Boot code relocation support
Most architectures allow u-boot code to run initially at a different
address (possibly in NOR) and then get relocated to its final resting place
in RAM. Added support for this capability in ARM1176 architecture.
3. Disable TCM if necessary
If a ROM based bootloader happened to have initialized TCM, we disable it here
to keep things sane.
4. Remove unnecessary SoC specific includes
ARM1176 code does not really need this SoC specific include. The presence
of this include prevents builds on other ARM1176 archs.
5. Modified virt-to-phys conversion during MMU disable
The original MMU disable code masks out too many bits from the load address
when it tries to figure out the physical address of the jump target label.
Consequently, it ends up branching to the wrong address after disabling the
MMU.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
I have updated this patch based on the comments [1] by Wolfgang Denk and
removed unused variables.
[1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html]
Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and
take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM,
SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file.
Remove unused variables in the spi_xfer() function.
Signed-off-by: Delio Brignoli <dbrignoli@audioscience.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for the EMIF4 interface
available in the AM35x processors.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Consolidated SDRC related functions into one file - sdrc.c
And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
initialized for CS1
From: Vaibhav Hiremath <hvaibhav@ti.com>
The patch makes sure that size for SDRC CS1 gets calculated
only when the CS1 SDRC is initialized.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The EVMS have been shipping with NAND (instead of OneNAND) as default.
So, this patch sets NAND as default.
To choose OneNAND, define CMD_ONENAND instead of CMD_NAND in the
config file omap3_evm.h.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This patch adds support for the
TNETV107X EVM board.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This is an initial commit with
basic functionality, more commits with drivers, etc. to follow.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The current ARM1176 CPU specific code is too specific to the SMDK6400
architecture. The following changes were necessary prerequisites for the
addition of other SoCs based on ARM1176.
Existing board's (SMDK6400) configuration has been modified to keep behavior
unchanged despite these changes.
1. Peripheral port remap configurability
The earlier code had hardcoded remap values specific to s3c64xx in start.S.
This change makes the peripheral port remap addresses and sizes configurable.
2. U-Boot code relocation support
Most architectures allow u-boot code to run initially at a different
address (possibly in NOR) and then get relocated to its final resting place
in RAM. Added support for this capability in ARM1176 architecture.
3. Disable TCM if necessary
If a ROM based bootloader happened to have initialized TCM, we disable it here
to keep things sane.
4. Remove unnecessary SoC specific includes
ARM1176 code does not really need this SoC specific include. The presence
of this include prevents builds on other ARM1176 archs.
5. Modified virt-to-phys conversion during MMU disable
The original MMU disable code masks out too many bits from the load address
when it tries to figure out the physical address of the jump target label.
Consequently, it ends up branching to the wrong address after disabling the
MMU.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
