Commit Graph
89859 Commits
Author SHA1 Message Date
Igor PrusovandTom Rini e515a2bb1a treewide: Include linux/io.h instead of asm-generic/io.h
Directly including asm-generic/io.h may break build because it will
cause redefenition of generic io macros if linux/io.h gets included
later, hence replace it with direct include of linux/io.h

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini d26db04db1 spi: meson_spifc_a1: Switch to io{read,write}32_rep()
Use io{read,write}32_rep() functions to sync code with Linux version.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini fa34fbf9a1 asm-generic: Import functions from Linux
Currently {read,write}s{b,w,lq}() functions are available only on some
architectures, and there are no io{read,write}{8,16,32,64}_rep()
functions in u-boot. This patch adds generic versions that may be used
without arch-specific implementation.

Since some of added functions were already added locally in some files,
remove them to avoid redeclaration errors.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini 02585ad9e5 xtensa: io.h: Add defines for ins/outs functions
Add defines for {in,out}s{b,w,l}() functions to make asm-generic/io.h
aware of them.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini 0c39bbd8c9 powerpc: io.h: Add defines for __raw_{read, write} functions
Add defines for __raw_{read,write}{b,w,l}() functions to make
make asm-generic/io.h aware of them.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini 4c6d92df07 nios2: io.h: Add defines for ins/outs functions
Add defines for {in,out}s{b,w,l}  functions to make asm-generic/io.h
aware of them.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini 55baed4dbb riscv: io.h: Fix signatures of reads/writes functions
Change type of address parameter from int* to volatile void* for
{read,write}s{b,w,l}() functions and add const qualifier for reads. This
is done to keep function signatures in sync with asm-generic/io.h and
other platforms.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini 7c107ef205 riscv: io.h: Add defines for reads/writes functions
Add defines for {read,write}s{b,w,l} functions to make asm-generic/io.h
aware of them.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini 65778d1f3d mips: io.h: Add defines for read/write/in/out functions
Add defines for {read,write}{b,w,l,q}(), {read,write}s{b,w,l,q}() and
{in,out}s{b,w,l,q}() functions to make asm-generic/io.h aware of them.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini 9539702219 mips: io.h: Add const to reads functions params
Currently reads{b,w,l}() functions don't have const qualifier for their
address parameter. Since asm-generic/io.h in Linux has const for all
read functions, add it here as well to keep signatures in sync.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini 93e1552cb1 x86: Add defines for ins/outs functions
Add defines for {in,out}s{b,w,l}() functions to make sure that
they will be used by asm-generic/io.h

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor PrusovandTom Rini 4f7a3463c4 sandbox: move asm-generic include to the end of file
Generic version of io.h should be included at the end of
architecture-specific ones to make sure that arch implementations are
used and to avoid redefinitions.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-28 16:19:06 -05:00
Nishanth MenonandTom Rini a94a4071d4 tree-wide: Replace http:// link with https:// link for ti.com
Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-11-10 11:01:50 -05:00
Alexander GendinandTom Rini a40f35f069 test: cmd: mbr: Remove unreachable code
Fix an issue reported by Coverity scan, and fix code indentation.

Addresses-Coverity-ID: 467404 ("Control flow issues (DEADCODE)")
Signed-off-by: Alexander Gendin <agendin@matrox.com>
2023-11-10 11:01:10 -05:00
AKASHI TakahiroandTom Rini 4808d16333 firmware: scmi: correct a validity check against power domain id
A power domain id on sandbox should be in the range from zero to
ARRAY_SIZE(scmi_pwdom) - 1. Correct the validity check logic.

Addresses-Coverity-ID: 467401 ("Out-of-bounds write")
Addresses-Coverity-ID: 467405 ("Out-of-bounds read")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2023-11-10 10:59:28 -05:00
Tom Rini d2174dbff1 scsi: Have scsi_init_dev_desc_priv() use memset
When we do not have CONFIG_BOUNCE_BUFFER enabled, inside of
scsi_init_dev_desc_priv we never set the 'bb' field to false, we only
initialize it to true when CONFIG_BOUNCE_BUFFER is set. Given that we
have a number of other fields here we had been explicitly setting to
zero, change to first calling memset to clear the struct and then
initialize only the fields that need non-zero default values.

Addresses-Coverity-ID: 467407 ("Uninitialized variables (UNINIT)")
Fixes: 81bd22e935 ("rockchip: block: blk-uclass: add bounce buffer flag to blk_desc")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-10 10:59:24 -05:00
Sam ProtsenkoandTom Rini 5069436419 MAINTAINERS: Fix Sam Protsenko mail
Sam works for Linaro again. Use his work e-mail address for ANDROID AB
subsystem.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2023-11-10 08:44:02 -05:00
Tom Rini e17d174773 Merge tag 'xilinx-for-v2024.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2024.01-rc3

xilinx:
- Disable lock in mini spi configurations

zynq:
- DTS syncups
- Kconfig updates

zynqmp:
- DTS syncups
- Kconfig fixups

versal:
- Make 30MHz as default freq for spi

versal net:
- Enable ADMA for mmc

serial:
- Read baudrate from DT

spi:
- Put spi lock under one Kconfig
- Support 64bit addresses in cadance_ospi
- zynqmp_gqspi - change logging support

firmware:
- Handle errors in zynqmp_pm_feature()

include:
- Sync vsc8531 dt binding with kernel
2023-11-07 10:36:23 -05:00
Mattijs KorpershoekandTom Rini 37229edccc MAINTAINERS: fastboot: add Mattijs
Fastboot has been marked as orphaned since 2021.
Since I'm interested in maintaining this, assign myself.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
2023-11-07 08:19:18 -05:00
Mattijs KorpershoekandTom Rini 56fe8f1288 MAINTAINERS: usb gadget: add Mattijs
It seems that Lukasz and Marek could get some help in maintaining the
usb gadget drivers.

Assign myself as maintainer.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
2023-11-07 08:19:17 -05:00
Michal Simek 37f500d711 dt-bindings: Remove VSC8531 specific RGMII delay definitions
Based on Linux upstream discussion value enumeration shouldn't be used.
Instead of it delay in pS should be used that's why remove it from the
header.

Link: https://lore.kernel.org/all/YNsm%2F0dmpBgO8mqr@lunn.ch/
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bbd343474856a67252f3b31d22b3b5a80ad04043.1698851109.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek 6504242df3 arm64: zynqmp: Add description for nvmem efuse layout
Based on discussion with DT folks at link below there is not going to be
any name restrictions for child names. That's why add description for
current nvmem layout.

Link: https://lore.kernel.org/lkml/20231013101450.573-3-praveen.teja.kundanala@amd.com/
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/af81299cafc2bd13ed30dcd69bdf6efb5fbb7f68.1698840373.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek 1332a781e1 ARM: zynq: Add partition description
Xilinx is using standard mtd partition layout for quite a long time. It is
used for testing purpose on evaluation boards.
Also #address/size-cells shouldn't be present without nodes which should
use them that's why move them from zynq-7000.dtsi to nand/nor nodes
directly.

The patch was tested on zc706 and zedboard(with also increasing max
frequency and rx bus width).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4c3348981bba32d3892194420d78fe8621c47534.1698837725.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek 7a64be2ba2 xilinx: Enable SPI_FLASH_MTD by default
Provide access to qspi flash layout via mtd command.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b3c4a3eddb71aab9535b034380d0dbae770828d4.1698837725.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek 6e3dbaa0b5 arm64: zynqmp: Comment all smmu entries
SMMU is disabled by default and not all masters can be enabled at the same
time because of limited number of entries. That's why comment all iommu
properties but keep them for reference in DT. In XEN case they should be
added back and Xen should have SMMU enabled by default.
Also add IDs for DP and DPDMA.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e868c27c52ded5d8ef25f75ba394b1ab3b31b80a.1698825657.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek 7faa6b9069 arm64: versal-net: Add DTSes for mini qspi/ospi configuration
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a99a8d72201a782fc811715942dea97fb5ab583b.1698329087.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek 0274447bae arm64: versal: Add DTSes for mini qspi/ospi configuration
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9518ab1c4299a45e800b8611172edd78c9243132.1698329087.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek a787618057 ARM: zynq: Add DTSes for mini qspi configurations
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e7d31a9d9c4a76e171eefc619f31fabd0831a614.1698329087.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek da10dd10e0 ARM: zynq: Add DTSes for mini qspi configurations
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/28b3cdd7e91b2b4c3c36d0bf65aa5bac042f248c.1698329087.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek 1cd59c571c xilinx: versal: Setup 30MHz as default spi frequency
Align default SPI configuration with ZynqMP/Versal NET.
There is no reason to run on lower frequencies.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c1d6ebd659f3002649b1200c926f8b9ed3132085.1698749448.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Venkatesh Yadav AbbarapuandMichal Simek 83cab0b30f arm64: versal-net: enable CONFIG_MMC_SDHCI_ADMA
The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit
widths of DMA. This significantly improves read and write throughput.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231027030446.4009-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Michal Simek a156b6ce0f arm64: zynqmp: Fix Kconfig entry indentation
Use tabs instead of space for entry indentation which is standard coding
style.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ff28e719de82258c066f1fedae87f88597f367b5.1698302068.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek 0d3399dfd8 arm: xilinx: Add missing dual parallel flash description
Describe flash memories based on the latest DT binding.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/cddf2909d0445eba08b998d42ffc31c1fa3132b9.1698045694.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Tejas BhumkarandMichal Simek 820bad0271 arm64: zynqmp: Disable Tri-state for MIO38 Pin
gpio38 is used in SOM's kv260 to reset the Ethernet PHY.
At present, HW reset is not working properly as Tri-state 
is enabled for MIO38, causing inappropriate PHY register reads.

Disabled Tri-state for MIO38 to make HW reset work.

Tri-state disable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7a3 00000540

Tri-state enable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7e3 00000540

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Link: https://lore.kernel.org/r/20231020050622.972750-1-tejas.arvind.bhumkar@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Ibai ErkiagaandMichal Simek 3e89144892 zynqmp: migrate gqspi debug to logging
The following patch migrates the usage of debug and printf functions
to the relevant logging function as per U-Boot DM guidelines.

Additionally some of the debugging statements have been rearanged for
a more meaningfull debug experience.

aarch64-linux-gnu-size reports 229 bytes less when debug is enabled at
file level, while is just 5bytes more when disabled.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
Link: https://lore.kernel.org/r/20231013123739.2757979-1-ibai.erkiaga-elorza@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Amit Kumar MahapatraandMichal Simek fdff4b3c48 arm64: dts: zynqmp: make hw-ecc as the default ecc mode
Except for Linux no other component (i.e., u-boot, fsbl or BootRom) of the
software stack supports software ecc engine. So, make hw-ecc as the default
ecc mode.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f47b95616eb40d3a9908ca60df94ec6e873b071c.1697119098.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Venkatesh Yadav AbbarapuandMichal Simek 03cc435539 ARM: zynq: Disable the config CONFIG_SPI_FLASH_USE_4K_SECTORS
Lock size for the flashes will be in terms of sector size, so
disable the CONFIG_SPI_FLASH_USE_4K_SECTORS and read it from the
flash itself.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8e5c2bf3b7e5f366c4e261e8055ea254bda53aa9.1697117993.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Venkatesh Yadav AbbarapuandMichal Simek ed1b1dd3bf arm64: zynqmp: Disable the lock option for mini qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/374d6b3a46d19b7ee171dfe8071676098db93e25.1697117869.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Piyush MehtaandMichal Simek 1bccde607e arm64: zynqmp: remove snps, xhci-stream-quirk property for usb
To sync up with the upstream bulk-stream feature, removed
'snps,xhci-stream-quirk' DT property for usb.

Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1f4ecfe3ea6a4d0d8d8de324f5dffd3efc86656a.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek fa6106f989 arm64: zynqmp: Remove address/size-cells from ams node
Remove unused address/size-cells which is also done upstream that's why
this is pretty much sync patch with upstream.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0ca8d8fe245ad7cb665f5333202d83f70acfc11f.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek e6b5c01a6c Revert "arm64: zynqmp: Add power domain description for PL"
This reverts commit d59fac2f3f.

This power domain shouldn't be enabled by default. Power domain behavior
should be handled on case by case basis. Adding this property to
zynqmp.dtsi is breaking some suspend/resume cases that's why remove it
from this file.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7ed2a46383c6918fbbaca2d618459b1ee58f865c.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek ff31d0330d arm64: zynqmp: Remove xlnx,zynqmp-aes node
AES can be discovered via firmware interface that's why remove node for it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/eaf575a6ca92f8c10cefb447c08c1292025deb74.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek f87696afa0 arm64: zynqmp: Use mdio node by vp-x-a2785-00-revA and vpk120-revA
All boards have been converted to use mdio node that's why move ethernet
phys under mdio node too.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6c60f5d29b9d9992bd0130fd263c8ed13cb8166c.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek 971a772624 arm64: zynqmp: Remove fclk driver
fclk will never go upstream that's why removing this node from DT.
All PL (programmable logic) based IPs should handle clocks self without
using this workaround.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fbb8665b8a58dbe96349abfe5492a509939e165b.1697098930.git.michal.simek@amd.com
2023-11-07 13:47:08 +01:00
Venkatesh Yadav AbbarapuandMichal Simek 20d1836eea spi: cadence_ospi_versal: Add support for 64-bit address
When 64-bit address is passed only lower 32-bit address
is getting updated. Program the upper 32-bit address in the
DMA destination memory address MSBs register.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011031515.4151-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav AbbarapuandMichal Simek ba9bdfd959 drivers: firmware: Handle error case in the zynqmp_pm_feature
Unhandled error coming from xilinx_pm_request() but return
value is not read back that's why getting sparse warning
as below:
warning: variable 'ret' set but not used [-Wunused-but-set-variable].
In case of error return the "ret" value.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011025647.17200-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav AbbarapuandMichal Simek dea1c089cf arm64: versal_net: Disable the lock option for mini ospi and qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-4-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav AbbarapuandMichal Simek 534892c22c arm64: versal: Disable the lock option for mini ospi and qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav AbbarapuandMichal Simek 188c803d08 mtd: spi-nor: Add spi flash lock config option
Provide an explicit configuration option to disable default "lock"
of any flash chip which supports locking. By disabling the lock
config will save some amount of memory and also don't expose the
lock functionality to the users i.e., via sf protect command.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Algapally Santosh SagarandMichal Simek bd9ff681bd serial: zynqmp: Fetch baudrate from dtb and update
The baudrate configured in .config is taken by default by serial. If
change of baudrate is required then the .config needs to changed and
u-boot recompilation is required or the u-boot environment needs to be
updated.

To avoid this, support is added to fetch the baudrate directly from the
device tree file and update.
The serial, prints the log with the configured baudrate in the dtb.
The commit c4df0f6f31 ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable") is taken as reference for changing the default
environment variable.

The default environment stores the default baudrate value, When default
baudrate and dtb baudrate are not same glitches are seen on the serial.
So, the environment also needs to be updated with the dtb baudrate to
avoid the glitches on the serial.

Also add test to cover this new function.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230921112043.3144726-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00