Commit Graph
99686 Commits
Author SHA1 Message Date
Patrice Chotard d2ed0c17d7 configs: stm32f746-disco_spl: Fix console cmdline
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-05-05 15:51:47 +02:00
Patrice Chotard 20e24fb8e5 configs: stm32f769-disco_spl: Fix console cmdline
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-05-05 15:51:47 +02:00
Christophe RoullierandPatrice Chotard 20afca89ed net: dwc_eth_qos: add support of stm32mp2 platform
Add compatible "st,stm32mp25-dwmac" to manage STM32MP2 boards

Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-05-05 15:51:47 +02:00
Vincent StehléandPatrice Chotard 1fa9718047 board: st: common: fix dfu alt buffer clearing
The set_dfu_alt_info() function calls the ALLOC_CACHE_ALIGN_BUFFER()
macro to declare a `buf' variable pointer into an array allocated on the
stack. It then calls the memset() function to clear the useable portion
of the array using the idiomatic expression `sizeof(buf)'.

While this would indeed work fine for an array, in the present case we
end up clearing only the size of a pointer.
Fix this by specifying the explicit size `DFU_ALT_BUF_LEN' instead.

Fixes: ec2933e543 ("board: stm32mp1: move set_dfu_alt_info in st common directory")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-05-05 15:51:47 +02:00
Dario BinacchiandPatrice Chotard 8eb84278c6 configs: stm32f769-disco: support FRD400B25025-A-CTK display
Support FRIDA FRD400B25025-A-CTK display on stm32f769-disco board.

As reported in the section 8.3 (i. e. Board revision history) of document
UM2033 (i. e. Discovery kit with STM32F769NI MCU) these are the changes
related to the board revision addressed by the patch:
- Board MB1166 revision A-09:
- LCD FRIDA FRD397B25009-D-CTK replaced by FRIDA FRD400B25025-A-CTK

This means that the MB1166-A09 is using an NT35510 panel controller,
unlike the previous versions which use an OTM8009A controller.
Therefore, let's add support for NT35510 panel handling to the
stm32f769-disco board configurations.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-05-05 15:51:46 +02:00
Dario BinacchiandPatrice Chotard a755a1e0eb video: support FRIDA FRD400B25025-A-CTK
[backport from Linux commits 9b26d5c044d6a29ebfb1845408e0f2a7c5f89818
 and 219a1f49094f50bf9c382830d06149e677f76bed]

The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the
Novatek NT35510-based panel family.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-05-05 15:51:46 +02:00
Dario BinacchiandPatrice Chotard 653c9537e7 ARM: dts: add stm32f769-disco-mb1166-reva09
[backport from Linux commit db4fc2c79c533986795a7750e9a12caf9d620b48]

As reported in the section 8.3 (i. e. Board revision history) of document
UM2033 (i. e. Discovery kit with STM32F769NI MCU) these are the changes
related to the board revision addressed by the patch:
- Board MB1166 revision A-09:
  - LCD FRIDA FRD397B25009-D-CTK replaced by FRIDA FRD400B25025-A-CTK

The patch adds the DTS support for the new display which belongs to the
the Novatek NT35510-based panel family.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-05-05 15:51:46 +02:00
Dario BinacchiandPatrice Chotard ff99c90942 ARM: dts: stm32: add bootph-all for dsi node in stm32f769-disco-u-boot
Add bootph-all for dsi node in stm32f769-disco-u-boot.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-05-05 15:51:46 +02:00
Pascal ZimmermannandPatrice Chotard d0d0b6a25c ARM: stm32: env: Enable scan and start for AB schema on STM32MP15 DHSOM
For the STM32MP15 DHSOM, change the default environment so an AB schema
on a device can be detected.

For this the define "SCAN_DEV_FOR_BOOT_PARTS" is overwritten and
appended.

The detection works by looking for the partitions with specific lables.
The name of those partitions are in the variables and its defaults:
* dh_ab_partname_primary=rootfs-a
* dh_ab_partname_secondary=rootfs-b

To prevent being hanging at bootcmd, enable "CONFIG_BOOT_RETRY" and
"CONFIG_RESET_TO_RETRY", but the timer will only be activated, if the AB
partitions are detected.

Signed-off-by: Pascal Zimmermann <pzimmermann@dh-electronics.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-05-05 15:51:46 +02:00
Pascal ZimmermannandPatrice Chotard fd3202153a config_distro_bootcmd: make possible to substitute 'part list' in distro_bootcmd
Make it possible to substitute the 'part list' command inside
'scan_dev_for_boot_part' with a custom board specific implementation.

For this the new define 'SCAN_DEV_FOR_BOOT_PARTS' is introduced.

Signed-off-by: Pascal Zimmermann <pzimmermann@dh-electronics.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-05-05 15:51:46 +02:00
Tom Rini 9dbe8d8895 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
- Improvements to the Renesas Ethernet AVB MAC driver
2025-05-04 13:44:01 -06:00
Paul BarkerandMarek Vasut ee58ed41e6 renesas_rzg2l_smarc_defconfig: Enable networking support
For Ethernet to work on the RZ/G2L board, we need to enable support for
the ksz9131 PHY and enable random MAC address generation (as no MAC
address is programmed into the board).

We also enable the `dhcp`, `mii` and `ping` commands so that Ethernet
functionality can be tested and used to boot Linux.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-05-04 20:25:03 +02:00
Paul BarkerandMarek Vasut 2fc48febcd net: ravb: Add RZ/G2L Support
The Renesas R9A07G044L (RZ/G2L) SoC includes two Gigabit Ethernet
interfaces which can be supported using the ravb driver. Some RZ/G2L
specific steps need to be taken during initialization due to differences
between this SoC and previously supported SoCs. We also need to ensure
that the module reset is de-asserted after the module clock is enabled
but before any Ethernet register reads/writes take place.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-05-04 20:25:03 +02:00
Paul BarkerandMarek Vasut 46706c3427 net: ravb: Add optional reset deassertion
In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we introduce optional de-assertion and re-assertion of
a reset signal in ravb_probe() and ravb_remove().

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-05-04 20:25:03 +02:00
Paul BarkerandMarek Vasut ba2d1d7666 net: ravb: Refactor out R-Car specific code
In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we move all R-Car specific code into new functions and
introduce a device_ops function pointer table.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-05-04 20:25:03 +02:00
Marek Vasut 6fae565f54 net: ravb: Fix RX error handling
Correctly handle RX errors in ravb_recv() by returning 0 instead
of -EAGAIN on RX error.

In case the RAVB driver detects an RX error in ravb_recv(), it must
not return the -EAGAIN, but instead must return 0. Both error codes
are handled in eth-uclass.c eth_rx() and -EAGAIN is rewritten to 0
at the end of eth_rx(), but negative return code from the .recv()
callback does not trigger .free_pkt() callback, which would clean
up and re-enqueue the descriptor which holds the currently received
corrupted packet. The .free_pkt() must be called for this descriptor,
otherwise the follow up received data become corrupted too, even if
those packets are correctly received. Returning 0 from the .recv()
callback assures the corrupted packet is not processed by the network
stack, but is skipped instead.

For TFTP loading, an RX error produces the timeout "T" output and
resumes the TFTP loading operation shortly afterward, without any
data corruption.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-05-04 20:23:31 +02:00
Tom Rini dcea465e5e Merge tag 'u-boot-imx-master-20250503' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/26064

- Add i.MX95 support.
- Enable BOOTAUX on the i.MX8M Beacon boards.
2025-05-04 08:51:43 -06:00
Adam FordandFabio Estevam fbe176c39c arm64: imx: imx8mp-beacon: Enable BOOTAUX
In order to run binaries targeting the Cortex-M7, BOOTAUX is
required.

Signed-off-by: Adam Ford <aford173@gmail.com>
2025-05-03 22:22:58 -03:00
Adam FordandFabio Estevam cfbc44f535 arm64: imx: imx8mn-beacon: Enable BOOTAUX
In order to run binaries targeting the Cortex-M7,
BOOTAUX is required.

Signed-off-by: Adam Ford <aford173@gmail.com>
2025-05-03 22:22:58 -03:00
Adam FordandFabio Estevam cacfa0bea4 arm64: imx: imx8mm-beacon: Enable BOOTAUX
In order to run binaries targeting the Cortex-M4,
BOOTAUX is required.

Signed-off-by: Adam Ford <aford173@gmail.com>
2025-05-03 22:22:58 -03:00
Alice GuoandFabio Estevam 8ebbf29926 Makefile: add some files to CLEAN_FILES
When building the flash.bin of i.MX95 with binman,
mkimage.imx-boot.spl, mkimage.imx-boot.u-boot,
mkimage-out.imx-boot.spl and mkimage-out.imx-boot.u-boot are created.
Add these files to CLEAN_FILES so that they can be removed when running
"make clean".

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Ye LiandFabio Estevam 0cbd26bee4 imx95_evk: add i.MX95 19x19 EVK board basic support
This patch adds i.MX95 19x19 EVK board basic support.

Messaging unit for EdgeLock Secure Enclave, messaging unit for System
Manager, uSDHC for SD Card, gpio, lpuart are supported now.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam fe8ab3b0c0 doc: imx: add document for i.MX95 Image Container Format
This patch add a document for i.MX95 Image Container Format.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Ye LiandFabio Estevam 86932bf014 imx: container: add V2X container support for i.MX95
This patch adds V2X container support for i.MX95. Since V2X container
may not be included in ahab-container.img of i.MX95, check if V2X
container exists in order to get the correct image end.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam 5f28a6599f tools: imx8image: add i.MX95 support
i.MX95 uses binman to invoke mkimage to create image container. 2 image
containers are needed currently. The first one is composed of
ahab-container.img, LPDDR firmware images, OEI images, System Manager
image and u-boot-spl.bin. The second one is consisted of ARM Trusted
firmware and u-boot.bin.

Because DDR OEI image and LPDDR firmware images have to be packaged
together and named as m33-oei-ddrfw.bin by binman, so imx9_image.sh does
not check if m33-oei-ddrfw.bin exists.

When using "make imx95_19x19_evk_defconfig; make", imx9_image.sh will
delete the line for u-boot.bin in container.cfg. In fact, binman is
always called after the u-boot.bin is built, so imx9_image.sh does not
check if u-boot.bin exists.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam 0318c26c2f binman: add a new entry type for packing DDR PHY firmware images
i.MX95 needs to combine DDR PHY firmware images and their byte counts
together, so add a new entry type nxp-header-ddrfw for this requirement.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam d292f30d52 imx: Kconfig: IMX8_ROMAPI is not configured for i.MX95
i.MX95 only supports low power boot, which means A55 is kicked by M33.
There is no ROM runs on A55 in such case so that deselect IMX8_ROMAPI
for i.MX95.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Ye LiandFabio Estevam def09add19 imx9: add i.MX95 Kconfig and Makefile
This patch adds i.MX95 Kconfig and Makefile. i.MX95 uses SCMI.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-03 16:55:32 -03:00
Ye LiandFabio Estevam 2f8b24d5cc spl: imx: use trampoline buffer to load images to secure region
When SPL loading image to secure region, for example, ATF and tee to
DDR secure region. Because the USDHC controller is non-secure master,
it can't access this region and will cause loading issue.

So use a trampoline buffer in non-secure region, then use CPU to copy the
image from trampoline buffer to destination secure region.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam 92f724736c cpu: imx95: add i.MX95 support
This patch is used to add the imx type string of i.MX95 ao that the
i.MX95 CPU info can be printed.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Peng FanandFabio Estevam 0bd99a1dd2 imx9: scmi: add i.MX95 SoC and clock related code
This patch adds i.MX95 SoC and clock related code. Because they are
based on SCMI, put them in the scmi subfolder.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jindong Yue <jindong.yue@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2025-05-03 16:55:32 -03:00
Ye LiandFabio Estevam a881951c63 scmi_protocols: update struct scmi_base_discover_list_protocols_out
@protocols is an array of protocol identifiers that are implemented,
excluding the Base protocol. Four protocol identifiers are packed into
each array element. The number of elements of @protocols is specified by
callee-side.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam ced74d88b2 sandbox: add SCMI clock control permissions to sandbox
This patch is used to add SCMI clock control permissions to sandbox for
testing.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam 15fdfef664 clk: scmi: check the clock state/parent/rate control permissions
Clock driver based on SCMI clock management protocol in Linux checks
clock state, parent and rate control permissions. To be consistent with
the kernel driver, add this check here. CLOCK_GET_PERMISSIONS is from
ARM System Control and Management Interface Platform Design Document 3.2.

When using common clock framework (CCF), use the clock signal ID to get
the clock registered by clk_register() in scmi_clk_probe(), and then
obatin the struct clk_scmi variable with container_of().

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-03 16:55:32 -03:00
Peng FanandFabio Estevam af2a671f78 clk: scmi: add the command CLOCK_PARENT_SET
This patch adds the command CLOCK_PARENT_SET that can be used to set the
parent of a clock. ARM SCMI Version 3.2 supports to change the parent of
a clock device.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2025-05-03 16:55:32 -03:00
Peng FanandFabio Estevam ba0f560432 scmi_protocols: add SCMI Performance domain management protocol message IDs
SCMI Performance domain management protocol is intended for performance
management of groups of devices or APs that run in the same performance
domain. The functionality provided by the callee-side can be used by
passing the corresponding message_id.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2025-05-03 16:55:32 -03:00
Peng FanandFabio Estevam 0556c2f020 scmi_protocols: add SCMI misc protocol protocol_id and message_id for getting the ROM passover data
SCMI misc protocol is intended for miscellaneous functions which are
device specific and are usually defined to access bit fields. It is i.MX
specific. This patch adds SCMI misc protocol protocol_id and message_id
for getting the ROM passover data.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam bf2ea4fde7 firmware: scmi_agent: add SCMI pin control protocol support
This patch adds SCMI pin control protocol support to make the pin
controller driver based on SCMI, such as
drivers/pinctrl/nxp/pinctrl-imx-scmi.c, can be bound to the SCMI agent
device whose protocol id is 0x19.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam 8706d383ad pinctrl: nxp: add a pin controller driver based on SCMI pin control protocol
This patch provides a pinctrl driver based on SCMI pin control protocol.
Currently, only the PINCTRL_CONFIG_SET command is implemented.

Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam adff089cd4 firmware: scmi: use scmi_proto_driver_get() function to get SCMI protocol driver
If there is a SoC specific SCMI protocol driver, using
scmi_proto_driver_get() function can avoid to add SoC specific code to
scmi_agent-uclass.c.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Alice GuoandFabio Estevam b4f3fab643 firmware: scmi: support to manage SCMI protocol drivers with a linker-genetated array
U_BOOT_SCMI_PROTO_DRIVER macro is used to add a SCMI protocol driver to
scmi_proto_driver list. scmi_proto_driver_get() function can be used to
match a SCMI protocol id and its driver.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-05-03 16:55:32 -03:00
Tom Rini 0c8a89d252 Merge patch series "k3-j784s4*: Enable ESMs and related PMIC"
Udit Kumar <u-kumar1@ti.com> says:

This series enables the ESMs and the associated PMIC. Programming these bits is
a requirement to make the watchdog actually reset the board.

Series supports WDT reset on all TI platforms based upon J784S4 SOC
including cut down (J742S2).

Bootlogs for reset

AM69: https://gist.github.com/uditkumarti/dca2171aafd6d50c82159346f9a0102f#file-am69-L2466

J784S4: https://gist.github.com/uditkumarti/dca2171aafd6d50c82159346f9a0102f#file-j784s4-L2704

J742S2: https://gist.github.com/uditkumarti/dca2171aafd6d50c82159346f9a0102f#file-j742s2-L2614

Link: https://lore.kernel.org/r/20250427070323.590449-1-u-kumar1@ti.com
2025-05-02 15:32:45 -06:00
Tom Rini 0b78c27562 Merge patch series "board: beagle: beagley-ai: Cleanups and stdboot"
Nishanth Menon <nm@ti.com> says:

Just happened to get a BeagleY-AI at desk and happened to test master
branch (7dd49a9264 drivers: scsi: Add 'erase' support), noticed a few
issues which were rather easy to solve.. so, here we go:

Link: https://lore.kernel.org/r/20250425173120.141503-1-nm@ti.com
2025-05-02 15:32:45 -06:00
Andrew DavisandTom Rini c492a55fe4 arm: dts: k3: binman: Fix DM firmware selection
Just like TF-A and OP-TEE, the documentation states a custom path for DM
can be provided at build time by setting TI_DM. This should then set
ti-dm-path which updates ti-dm node filenames in binman.

Two issues prevent this from functioning for most K3 boards. One is when
then DM firmware name is inside a blob-ext node instead of a ti-dm node.

The second is when the filename in the ti-dm node is a pointer to a
blob-ext node. In this case even though the filename is updated, the
filename in the blob-ext is not, so build can fail if the default
file in the blob-ext cannot be found, even if the updated ti-dm file
does exist.

Fix both of these for all K3 by removing any indirect ti-dm nodes and
making sure all DM nodes are labeled with "ti-dm".

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2025-05-02 15:32:45 -06:00
Bryan BrattlofandTom Rini 78c0f7e3eb arm: mach-k3: use CFG_MAX_MEM_SIZE
Rather than hard coding the maximum memory size, lets just define the
CFG_MAX_MEM_SIZE so get_effective_memsize() will return the correct
value without modification.

Signed-off-by: Bryan Brattlof <bb@ti.com>
2025-05-02 15:32:44 -06:00
Kory MaincentandTom Rini 510f250247 board: ti: am33xx: Add support for BeagleBoard Green Eco
SeeedStudio BeagleBone Green Eco (BBGE) is a clone of the BeagleBone Green
(BBG). It has minor differences from the BBG, such as a different PMIC,
a different Ethernet PHY, and a larger eMMC.

The PMIC is not yet supported in mainline, but the work is ongoing.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
2025-05-02 15:32:44 -06:00
Judith MendezandTom Rini 4b033d47c4 configs: am64x_evm_a53: Enable MMC UHS modes
Enable UHS modes for SD by enabling configs for voltage regulator
drivers, IO voltage switching, and configs to support UHS modes.

The am64x SoC has an internal LDO which does voltage switching,
but the MMC_IO_VOLTAGE config is still required to be able to
switch voltage for SD.

While we are here, am64x HS400 mode has been descoped as per
datasheet [0] even though we still initialize to HS200, clean
this up by switching to MMC_HS200_SUPPORT config options.

[0] https://www.ti.com/lit/gpn/am6442

Signed-off-by: Judith Mendez <jm@ti.com>
2025-05-02 15:32:44 -06:00
Andrew HalaneyandTom Rini 8de75de3e4 configs: j784s4_evm_r5: Enable ESM related configs
Like other TI platforms, let's enable the ESM. This allows the ESM to be
programmed during boot, and the PMIC associated with the ESM output,
enabling blocks like the RTI watchdogs to actually cause the system to
reset.

Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
2025-05-02 14:24:13 -06:00
KeerthyandTom Rini 61c6d13486 board: ti: j784s4: Initialize the ESM & PMIC ESM
Initialize the ESM & PMIC ESM. This allows things like
the watchdog to reset the board when tripped.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
2025-05-02 14:24:13 -06:00
Andrew HalaneyandTom Rini 29e1d5f938 arm: dts: k3-am69-r5-evm: Add the PMIC ESM node
Add the PMIC ESM node which is responsible for triggering the PMIC
reset.

Suggested-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
2025-05-02 14:24:12 -06:00