Commit Graph
105037 Commits
Author SHA1 Message Date
David Lechner c09e994585 config: mediatek: add UFS defconfigs for Genio 520/720 EVKs
Add variants of the Genio 520/720 EVK defconfigs for UFS boot. These
have a different devicetree when the boot DIP switches/jumpers on the
EVK are set for UFS instead of eMMC. These also enable UFS and related
drivers that aren't enabled in the eMMC defconfigs since UFS is
disconnected in that case.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-6-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner 58a60707ae arm: dts: mediatek: add UFS variant of Genio 520/720 EVK
Add a devicetree overlay and UFS variants of the Genio 520 and Genio 720
EVK devicetree targets. There are dip switches and jumpers on the EVK
that disconnect the eMMC and connect the UFS instead. The overlay
adjusts the devicetree for this.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-5-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner 21530890bf arm: dts: mt8189: add UFS nodes
Add UFS nodes to mt8189.dtsi.

This is copied from the proposed upstream patch [1].

Link: https://lore.kernel.org/linux-mediatek/20251111070031.305281-10-jh.hsu@mediatek.com/ [1]
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-4-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner 0ede487026 clk: mediatek: mt8189: add UFS clocks
Add some clocks required for UFS on MT8189 targets.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-3-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner 7a3b13460b ufs: mediatek: clean up zero terminator
Remove spurious blank line and trailing comma of the zero terminator at
the end of the devicetree compatible list.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-2-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
David Lechner 6dbb7af1f4 ufs: ufs-mediatek: add mt8183-ufshci compatible
Add a new compatible match for mediatek,mt8183-ufshci.

This compatible is already defined in upstream devicetree bindings.

Link: https://patch.msgid.link/20260330-mtk-genio-720-ufs-v1-1-3bad8362ed70@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien StephanandDavid Lechner a69b77da48 configs: add new defconfig for mt8395_genio_1200_evk_ufs
This new defconfig is based on mt8395_genio_1200_evk_defconfig, with
additional configs for UFS.  In order to avoid duplicating defconfig, we
introduce configs/mt8195.config.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-9-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com> [moved PMIC enable to mt8195.config]
2026-04-17 17:05:54 -05:00
Julien StephanandDavid Lechner c4792df264 drivers: ufs: ufs-mediatek: add MT8195 compatible
Add MT8195 compatible string.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-8-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien StephanandDavid Lechner a694f49c49 drivers: ufs: ufs-mediatek: implement clocking
Implement clocking.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-7-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien StephanandDavid Lechner ac6e41ee6e drivers: ufs: ufs-mediatek: fix phy handling
Currently mphy is declared as a pointer inside ufs_mtk_host struct, but
it is never initialized.

Fix this by using a struct phy directly in ufs_mtk_host struct instead
of a struct phy*. Update all call to mphy accordingly.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-6-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien StephanandDavid Lechner e13229b66a drivers: phy: phy-mtk-ufs: do not alloc priv with priv_auto
When priv_auto is specified, we should not manually alloc memory for
priv data.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-5-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien StephanandDavid Lechner ebb222e8c5 drivers: phy: phy-mtk-ufs: disable clk in power_off
Disable clocks in power_off(). Also define ufs_mtk_phy_set_inactive()
helper function to keep consistency with power_on() and
ufs_mtk_phy_set_active().

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-4-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien StephanandDavid Lechner ad2422cc05 drivers: phy: phy-mtk-ufs: use clk_bulk functions
simply the driver by using clk_bulk functions

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-3-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien StephanandDavid Lechner 51cf6ad965 drivers: phy: phy-mtk-ufs: use tab to indent defines
Use tabs instead of spaces to indent defines

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-2-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Julien StephanandDavid Lechner b7835b4879 drivers: phy: phy-mtk-ufs: cleanup headers
Remove unneeded headers and sort them alphabetically

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260318-mt8195-add-ufs-support-v2-1-f18eeeeb0e72@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Sam ShihandDavid Lechner 21cb317a1b clk: mediatek: remove redundant forward declarations
The clk_ops structures (mtk_clk_apmixedsys_ops, mtk_clk_topckgen_ops,
mtk_clk_infrasys_ops) are already declared with extern in clk-mtk.h,
which is included by this file. The forward declarations in clk-mtk.c
are therefore redundant and can be removed.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Link: https://patch.msgid.link/e9c95470374cb78254dacfe1d657a26f2f908981.1776326933.git.weijie.gao@mediatek.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Sam ShihandDavid Lechner 374cb8a288 clk: mediatek: add grandparent variable in mtk_find_parent_rate()
Add grandparent device variable in mtk_find_parent_rate() to allow
the grandparent device being reused instead of calling
dev_get_parent(priv->parent) multiple times.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Link: https://patch.msgid.link/726ccc71593f6c224c13142a0bd4a9f6f0f81445.1776326933.git.weijie.gao@mediatek.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:05:54 -05:00
Sam ShihandDavid Lechner ad3ea453d8 clk: mediatek: fix parent rate lookup for fixed PLL clocks
The refactoring in commit 00d0ff7f81 ("clk: mediatek: refactor parent
rate lookup functions") introduced a regression where fixed PLL clocks
using mtk_clk_fixed_pll_ops are not properly recognized as valid parents
in the CLK_PARENT_APMIXED case.

Fixed PLL clocks are implemented using mtk_clk_fixed_pll_ops instead of
mtk_clk_apmixedsys_ops, but they can also serve as parent clocks in the
APMIXED domain. The parent lookup function needs to check for both
driver ops to properly resolve the parent clock device.

Add mtk_clk_fixed_pll_ops checks alongside mtk_clk_apmixedsys_ops checks
in mtk_find_parent_rate() to restore support for fixed PLL parent clocks.

Fixes: 00d0ff7f81 ("clk: mediatek: refactor parent rate lookup functions")
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Link: https://patch.msgid.link/923e50db696d910803828cd26b0ca0fbbfe11570.1776326933.git.weijie.gao@mediatek.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 17:04:56 -05:00
Weijie GaoandDavid Lechner 5576522219 pinctrl: mediatek: mt7981: fix some register offsets and fields
This patch fixes mt7981 pin register offsets and field definitions.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Link: https://patch.msgid.link/20260410082332.102522-1-weijie.gao@mediatek.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-17 15:11:58 -05:00
Philippe ReynesandTom Rini 30429c8bd2 sandbox: enable FIT_SIGNATURE
Since commit d09256283f ("FIT: Image pre-load signature
support must select not depends on FIT_SIGNATURE")
FIT_SIGNATURE is disabled on sandbox. But this config
is used on many fit signature tests. So FIT_SIGNATURE should
be enabled on sandbox.

Fixes: d09256283f ("FIT: Image pre-load signature support must select not depends on FIT_SIGNATURE")
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-17 12:29:16 -06:00
Tom Rini 56905deb20 Merge branch 'master' of git://source.denx.de/u-boot-usb
- dwc3 memory leak fixes
2026-04-17 10:12:44 -06:00
Tom Rini 7decfc6619 Merge tag 'efi-2026-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2026-07-rc1

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/29844

Documentation:

* correct title of CONTRIBUTE.rst
* Fix fdt resize argument in fdt_overlays.rst
* api: bootcount: correct bootcount description
* binman: Add Sphinx extension to auto-generate entry and bintool docs
* binman: Remove pre-generated entries.rst and bintools.rst
*  j784s4_evm: Automate BAR address lookup for PCIe Boot

UEFI:

* efi_var_sf: Do not fail on blank SPI Flash
* Allow disabling ANSI console queries via Kconfig
* bootstd: efi: Handle prior-stage FDT in network path
* event: Check return value from event_notify_null()
* event: Introduce EVT_POST_PREBOOT event
* fwu: Move boottime checks to EVT_POST_PREBOOT
2026-04-17 10:12:18 -06:00
Gurumoorthy SanthakumarandMarek Vasut 884b10e86a usb: dwc3: core: fix memory leaks in event buffer cleanup
In dwc3_free_one_event_buffer(), only the DMA buffer (evt->buf) was
being freed via dma_free_coherent(), but the evt structure itself was
never explicitly freed, causing a memory leak.

In dwc3_free_event_buffers(), the ev_buffs pointer array allocated
with memalign() was never freed after iterating and releasing all
individual event buffers, causing another memory leak.

Fix both leaks by freeing the evt struct in
dwc3_free_one_event_buffer() and freeing dwc->ev_buffs in
dwc3_free_event_buffers() after all entries have been released.

Signed-off-by: Gurumoorthy Santhakumar <gurumoorthy.santhakumar@oss.qualcomm.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-04-17 15:57:19 +02:00
Siddharth VadapalliandHeinrich Schuchardt 98d1d3227e doc: board: ti: j784s4_evm: Automate BAR address lookup for PCIe Boot
When the J784S4-EVM is configured for PCIe Boot, the Bootloaders are to
be written to the address specified by particular BARs. The existing
documentation hard-codes the address corresponding to the BAR under the
assumption that the Root-Complex transferring the Bootloaders is also
a J784S4-EVM. The Root-Complex assigns addresses to the BARs depending
on the currently available set of free system addresses. Since the free
system addresses vary with the Root-Complex being used, instead of
hard-coding the BARs, automate the process of identifying the appropriate
BAR in the form of a command to be run by the user on the Root-Complex.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2026-04-17 08:16:03 +02:00
Heinrich Schuchardt 1659cd1f45 doc: correct title of CONTRIBUTE.rst
The title should be 'Contributing' as this is not the 'Overview' of the
U-Boot project.

The top title should be H1, the other titles H2.

Fixes: 0290cec364 ("Add an initial CONTRIBUTE.rst")
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 08:14:15 +02:00
Michael OpdenackerandHeinrich Schuchardt 47ae8e77f9 doc: api: bootcount: correct bootcount description
The bootcount variable is only incremented
when the upgrade_variable is non-zero,
as implemented in drivers/bootcount/bootcount_env.c

Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 08:13:04 +02:00
Simon GlassandHeinrich Schuchardt ee4bcfc659 bootstd: efi: Handle prior-stage FDT in network path
When CONFIG_OF_HAS_PRIOR_STAGE is enabled and fdtfile is not set,
efi_get_distro_fdt_name() returns -EALREADY to indicate the prior-stage
FDT should be used. The block-device EFI path handles this by setting
BOOTFLOWF_USE_PRIOR_FDT, but the network path treats it as an error,
causing the bootflow to stay in 'base' state with a -EALREADY error.

This also means fdt_addr_r is required even when no FDT download is
needed, giving a spurious  -EINVAL error.

Fix this by calling efi_get_distro_fdt_name() before checking
fdt_addr_r, and handling -EALREADY by setting BOOTFLOWF_USE_PRIOR_FDT
to skip the FDT download, matching the block-device behaviour.

THere is no test for this at present, since sandbox does not enable
CONFIG_OF_HAS_PRIOR_STAGE and lacks infra for network-based EFI boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-17 08:09:41 +02:00
Matwey V. KornilovandHeinrich Schuchardt 586e4f340a doc: Fix fdt resize argument in fdt_overlays.rst
The argument is parsed as hexadecimal number.

Link: https://lists.denx.de/pipermail/u-boot/2026-April/613799.html

Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-17 08:06:23 +02:00
Michal SimekandHeinrich Schuchardt 0c3eb097d9 efi_loader: Allow disabling ANSI console queries via Kconfig
Commit 4cb7243640 ("efi_loader: Disable ANSI output for tests")
introduced efi_console_set_ansi() to suppress ANSI escape sequences
during unit tests. Extend this mechanism to be configurable via a new
Kconfig option CONFIG_EFI_CONSOLE_DISABLE_ANSI.

When CONFIG_EFI_CONSOLE_DISABLE_ANSI is enabled,
efi_console_set_ansi(false) is called at the start of
efi_setup_console_size(). This prevents query_console_serial() from
sending ANSI escape sequences to the terminal, using default 25x80
dimensions instead. This is useful for platforms where the serial
console cannot handle ANSI queries.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 08:04:43 +02:00
Michal SimekandHeinrich Schuchardt 353166279c fwu: Move boottime checks to EVT_POST_PREBOOT
Switch fwu_boottime_checks() from EVT_MAIN_LOOP to EVT_POST_PREBOOT
because there is no reason to call FWU so early. FWU triggers EFI
stack initialization before all devices are visible which prevents
the EFI stack from scanning these devices and adding them to EFI
variables.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-17 08:02:42 +02:00
Michal SimekandHeinrich Schuchardt fc36b91243 event: Introduce EVT_POST_PREBOOT event
Add a new EVT_POST_PREBOOT event type which is fired in main_loop()
after the preboot command has been executed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-04-17 08:02:42 +02:00
Michal SimekandHeinrich Schuchardt 583efb5040 event: Check return value from event_notify_null()
event_notify_null() returns int but its return value is not
checked in run_main_loop() and in fwu_mdata tests.
Add proper error checking to all unchecked call sites.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-04-17 08:02:42 +02:00
Michal SimekandHeinrich Schuchardt 57eae396ec efi_loader: efi_var_sf: Do not fail on blank SPI Flash
When SPI Flash is blank (first boot or erased), efi_var_from_storage()
returns EFI_DEVICE_ERROR because efi_var_restore() fails on invalid
magic/CRC. This prevents the EFI subsystem from initializing.

Check the magic value before attempting to restore variables. If
the magic does not match EFI_VAR_FILE_MAGIC, treat it as an empty
store and return EFI_SUCCESS, matching the behavior of the file-based
efi_var_file.c which deliberately returns EFI_SUCCESS on missing or
corrupted variable files to avoid blocking the boot process.

Similarly, if the magic matches but efi_var_restore() fails (e.g.
corrupted CRC), log the error but still return EFI_SUCCESS.

Suggested-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 07:40:17 +02:00
Simon GlassandHeinrich Schuchardt 090a7eb9cf binman: Remove pre-generated entries.rst and bintools.rst
These files are now auto-generated by the binman_docs Sphinx extension
during the doc build, so the committed copies and their symlinks in
doc/develop/package/ are no longer needed.

Update binman.rst to reference the Sphinx extension instead of the
manual generation commands.

Signed-off-by: Simon Glass <sjg@chromium.org>

Rebased to apply file deletions cleanly.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2026-04-17 07:26:31 +02:00
Simon GlassandHeinrich Schuchardt 1ab7f4e2ed binman: Add Sphinx extension to auto-generate entry and bintool docs
Currently entries.rst and bintools.rst are generated manually by running
'binman entry-docs' and 'binman bintool-docs', then committed to the
repo. This means the docs can drift out of date when docstrings are
updated but the RST files are not regenerated.

Add a Sphinx extension (binman_docs) that provides two custom
directives:

    .. binman-entry-docs::
    .. binman-bintool-docs::

These parse the etype and btool source files using the ast module to
extract class docstrings, then insert the documentation directly into
the document tree. This avoids the need to import binman modules (which
have dependencies like libfdt that are not available in the ReadTheDocs
build environment) and avoids writing any intermediate files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2026-04-17 07:12:07 +02:00
David LechnerandTom Rini bc6c4ee8d4 mtd: spi-nor-ids: add flags for mx25u12835f
Add some capability flags for mx25u12835f.

In particular, we are interested in using the lock feature. According to
the datasheet, dual/quad read is also supported.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-15 14:45:18 -06:00
Tom Rini 301d2d3273 spi: Correct dependencies for SPI_FLASH_SST
The SPI_FLASH_SST functionality is a subset of SPI_FLASH_LOCK today, so
express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-15 14:45:18 -06:00
Flaviu NistorandTom Rini 3ee5a4c599 mtd: spi-nor: Add is25wx128 and is25lx128 chips
Add is25wx128 and is25lx128 ISSI chips to
spi-nor id table.
Both chips have a size of 16MB but is25wx128
is the 1.8V version and is25lx128 is the 3v
version.

Signed-off-by: Flaviu Nistor <flaviu.nistor@gmail.com>
2026-04-15 14:45:18 -06:00
Chen Huei LokandTom Rini 3e33474a0c mtd: spi-nor-ids: Add support for IS25WP01GG SPI NOR flash
Add a new entry for the IS25WP01GG SPI NOR flash (ID 0x9d7021,
64KB sectors, 2KB page size) with 4K sectors, dual and quad read
support. This flash is used and tested on N5X boards.

Datasheet :
https://www.issi.com/WW/pdf/25LP-WP01GG.pdf

Signed-off-by: Chen Huei Lok <chen.huei.lok@altera.com>
2026-04-15 14:45:18 -06:00
Flaviu NistorandTom Rini 3009978976 mtd: spi-nor: Add gd25lx128j chip
Add gd25lx128j GIGADEVICE chip to spi-nor id table.

Signed-off-by: Flaviu Nistor <flaviu.nistor@gmail.com>
2026-04-15 14:45:18 -06:00
Jeffrey YuandTom Rini 3d623b9d39 mtd: spi-nor: ids: add ISSI IS25LP*J/*MJ/*E and IS25WP*J/*MJ device IDs
Add JEDEC ID table entries for additional ISSI SPI-NOR devices.

These parts previously not yet supported.
With these entries, U-Boot can match the device by JEDEC ID
and use the existing ISSI SPI-NOR device handling.

Newly added devices include:
  - IS25LP512MJ  (JEDEC 0x9d6020)
    https://www.issi.com/WW/pdf/25LP-WP512MJ.pdf
  - IS25WP512MJ  (JEDEC 0x9d7020)
    https://www.issi.com/WW/pdf/25LP-WP512MJ.pdf
  - IS25LP010E   (JEDEC 0x9d4011)
    https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
  - IS25LP020E   (JEDEC 0x9d4012)
    https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
  - IS25LP040E   (JEDEC 0x9d4013)
    https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
  - IS25LP01GJ   (JEDEC 0x9d6021)
    https://www.issi.com/WW/pdf/25LP-WP01GJ.pdf
  - IS25LP02GG   (JEDEC 0x9d6022)
    https://www.issi.com/WW/pdf/25LP-WP02GG.pdf
  - IS25LP02GJ   (JEDEC 0x9d6022)
    https://www.issi.com/WW/pdf/25LP-WP02GJ.pdf
  - IS25WP01GG   (JEDEC 0x9d7021)
    https://www.issi.com/WW/pdf/25LP-WP01GG.pdf
  - IS25WP01GJ   (JEDEC 0x9d7021)
    https://www.issi.com/WW/pdf/25LP-WP01GJ.pdf
  - IS25WJ128F   (JEDEC 0x9d7118)
    https://www.issi.com/WW/pdf/25WJ128F.pdf
  - IS25WP02GG   (JEDEC 0x9d7022)
    https://www.issi.com/WW/pdf/25LP-WP02GG.pdf
  - IS25WP02GJ   (JEDEC 0x9d7022)
    https://www.issi.com/WW/pdf/25LP-WP02GJ.pdf

Signed-off-by: jeffrey yu <jeyu@issi.com>
[trini: Fix spacing issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-15 14:45:18 -06:00
Chen Huei LokandTom Rini 39d1a96d71 spi: cadence_xspi: enable automatic platform data allocation
Enable automatic allocation of platform data for the Cadence XSPI
controller by setting .plat_auto.

Without this, dev_get_plat() may return invalid or uninitialized
platform data when multiple XSPI controllers are present, leading
to incorrect IOBASE/SDMABASE/AUXBASE values and causing SPI flash
probe failures.

Setting .plat_auto ensures each controller instance receives a
properly sized cdns_xspi_plat structure, allowing SF probe to work
correctly.

Tested on an Altera Simics platform with multiple XSPI controllers.

Signed-off-by: Chen Huei Lok <chen.huei.lok@altera.com>
2026-04-15 13:36:44 -06:00
SsunkandTom Rini c56db9b4a4 mtd: spi-nor: Add Dosilicon DS25M/Q series support
Add support for dosilicon ds25m4cb, ds25m4dn, ds25q4cb, ds25q4dn

Datasheets:
ds25m4cb:
https://www.dosilicon.com/resources/SPI%20NOR/DS25M4CB-XXXXX_Rev04.pdf
ds25m4dn:
https://www.dosilicon.com/resources/SPI%20NOR/DS25M4DN-XXXXX_Rev03.pdf
ds25q4cb:
https://www.dosilicon.com/resources/SPI%20NOR/DS25Q4CB-XXXXX_Rev03.pdf
ds25q4dn:
https://www.dosilicon.com/resources/SPI%20NOR/DS25Q4DN-XXXXX_Rev01.pdf

Signed-off-by: Ssunk <ssunkkan@gmail.com>
[trini: Adjust spacing]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-15 13:36:43 -06:00
SsunkandTom Rini fba2419269 mtd: spi: spi-nor-ids: Add support for XMC XM25QH01D
Add support for XMC XM25QH01D SPI NOR flash.

Datasheet: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf
Link: https://lore.kernel.org/u-boot/20250827105854.10746-1-ssunkkan@gmail.com/
2026-04-15 10:36:15 -06:00
SsunkandTom Rini b6dbbfa71e mtd: spi-nor: ids: Add support for Puyasemi flash chips
Add JEDEC IDs for Puyasemi PY25F512HB, PY25F01GHB, PY25F512LC,
and PY25F01GLC flash parts.

Datasheets:
PY25F512HB:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F512HB_Datasheet_V1.2.pdf
PY25F01GHB:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F01GHB_Datasheet_V1.1.pdf
PY25F512LC:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F512LC_Datasheet_V1.3.pdf
PY25F01GLC:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F01GLC_Datasheet_V1.0.pdf

Reviewed-by: Anshul Dalal <anshuld@ti.com>
Signed-off-by: Ssunk <ssunkkan@gmail.com>
2026-04-15 10:35:58 -06:00
Heinrich SchuchardtandTom Rini 70fd0c3bb7 x86: there is no CONFIG_UBOOT_ROMSIZE_KB_12288
Remove the reference to the non-existent symbol. As ROMs typically
come as powers of two there seems no need for this value.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: 64542f4616 ("x86: Make ROM_SIZE configurable in Kconfig")
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-14 14:21:55 -06:00
Heinrich SchuchardtandTom Rini dc8f56e008 x86/apollolake: don't select non-existent INTEL_PMC
Symbol CONFIG_INTEL_PMC does not exist.
Don't select it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: 1fc5419314 ("x86: apl: Add Kconfig and Makefile")
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-04-14 14:21:48 -06:00
Tom Rini 8f6a5932aa Merge patch series "serial: goldfish: Add debug uart support"
This series from Daniel Palmer <daniel@0x0f.com> improves debug UART
support on QEMU on M68K by adding debug uart support to the serial
driver.

Link: https://lore.kernel.org/r/20260309105110.672832-1-daniel@0x0f.com
2026-04-14 13:25:32 -06:00
Daniel PalmerandTom Rini c15a08b730 doc: board: virt: m68k: Detail how to use debug uart
Add a paragraph to explain how to get the address of the goldfish
tty and use it as the debug uart. I think the address is actually
fixed right now but it might change in the future.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
2026-04-14 13:25:13 -06:00
Daniel PalmerandTom Rini 2df4926ca4 m68k: m680x0: Initialise the debug uart
Once the stack is ready we can init the debug uart to help
with debugging so do that.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
2026-04-14 13:25:13 -06:00