Commit Graph
99740 Commits
Author SHA1 Message Date
Tom Rini ac204f07b2 Merge tag 'u-boot-rockchip-20250508' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/26117

- New Board support: rk3566 LCKFB TaishanPi, rk3588 Xunlong Orange Pi 5
  Max;
- Add rk3288 rmii support;
- pinctrl driver fix;
- binman description update;
2025-05-08 08:29:17 -06:00
Christoph FritzandKever Yang 115a0cb9a2 net: gmac_rockchip: Add RMII support for rk3288
Add RMII-specific handling to rk3288_gmac_fix_mac_speed() so that it
properly sets the RMII clock (2.5 MHz vs. 25 MHz) and speed bits
(10 Mbps vs. 100 Mbps). Also define a new rk3288_gmac_set_to_rmii()
function to set the PHY interface field and RMII_MODE bit.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-08 11:48:13 +08:00
Christoph FritzandKever Yang b8ce3eb8bf rockchip: rk3288: grf: Unify speed/flowctrl fields for clarity
Update GMAC speed and flow control fields in GRF_SOC_CON1 to use
RK3288_GMAC_* prefix, ensuring a consistent naming convention. It also
shifts each mask/bit definition to match the actual hardware bits, which
makes future usage easier.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-08 11:48:13 +08:00
Jiehui HeandKever Yang 656b70b5ff board: rockchip: Add LCKFB TaishanPi RK3566 Board
The LCKFB TaishanPi is a single-board computer based on the RK3566 SoC.

Specification:
- 1/2 Gib RAM
- Optinal EMMC
- SD-Card
- HDMI / MIPI CSI / MIPI DSI
- USB 2.0 Host (Type-A)
- USB 2.0 Host / OTG (Type-C)
- No Ethernet

This patch adds U-Boot support for the LCKFB TaishanPi RK3566 board, including:
- U-Boot device tree
- Default defconfig
- Board documentation
- MAINTAINERS entry

Changes in v2:
- Removed unused configs from `lckfb-tspi-rk3566_defconfig`
- Reordered TaishanPi entry in `doc/board/rockchip/rockchip.rst` alphabetically

Link to v1:
https://lore.kernel.org/u-boot/tencent_95ED0C0545D87B6A8C4B62EC045D53AD2406@qq.com/

Signed-off-by: Jiehui He <jiehui.he@foxmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-08 11:47:20 +08:00
Ilya KatsnelsonandKever Yang 15d76136fb board: rockchip: add Xunlong Orange Pi 5 Max
The 5 Max is another board in the Orange Pi 5 family.

It's overall similar to the 5 Plus, but in a smaller form factor,
which leads to some I/O being reshuffled, but nothing relevant
to u-boot.

So, just reuse the config for the 5 Plus and adjust the DT names.

Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Ilya Katsnelson <me@0upti.me>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-08 11:47:06 +08:00
Tom Rini 48db49b097 Merge patch series "include: env: phytec: k3_net: Remove net_apply_extensions"
This series from Daniel Schultz <d.schultz@phytec.de> cleans up the
environment further on the phytec am62ax platforms.

Link: https://lore.kernel.org/r/20250428144904.1058574-1-d.schultz@phytec.de
2025-05-07 07:59:09 -06:00
Daniel SchultzandTom Rini fd446b0c84 board: phytec: phycore_am62ax: Update Environment
Add fit_addr_r to the environment to allow us to boot from a FIT image.

Increase the maximum Image size from 23 MB to 26 MB by moving the
initramfs start address up. This gives us a bigger ranger to
provide kernel images which are not stripped down too much.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-05-07 07:59:03 -06:00
Daniel SchultzandTom Rini ad2ae4d2b2 include: env: phytec: k3_net: Use get_cmd
'net_fetch_cmd' is not defined by the K3 board files. They
use the more common 'get_cmd' from NXP products.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2025-05-07 07:59:03 -06:00
Daniel SchultzandTom Rini e75070a8f4 include: env: phytec: k3_net: Remove net_apply_extensions
Extensions are now handled by the board-code. Remove this non-existing
function to proper boot from network.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2025-05-07 07:59:03 -06:00
Tom Rini 3b6760ddeb bootstd: Rework BLK dependency
The bootstd code itself does not have any dependency on BLK in order to
build. However, in order to minimize size growth of non-migrated
platforms, change this from being "default y" to "default y if BLK".
This will make it easier to begin migration of platforms which do not
have any BLK-class device but do want to use bootstd.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-06 15:47:36 -06:00
Bryan BrattlofandTom Rini 13d1bd5bbb mips: octeon: remove unused middle expression
!A || (A && B) is equivalent to !A || B

Drop the unused middle expression to simplify the statement.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2025-05-06 15:43:19 -06:00
Venkatesh Yadav AbbarapuandTom Rini 46b3580c59 mtd: spi-nor: Send write disable cmd after every write enable
Write enable(06h) command will be sent to a flash device to
set the write enable latch bit before every program, erase,
write command. After that write disable command (04h) needs
to be sent to clear the write enable latch.

This write_disable() is missing at the majority of the places
in the driver, add it to clear write enable latch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://gist.github.com/PrasanthBabuMantena/c12f39744de188a9d08cd5ca51dc2a7b
Tested-by: Prasanth Babu Mantena <p-mantena@ti.com>
2025-05-06 13:13:36 -06:00
Vaishnav AchathandTom Rini ea2c6df478 mtd: spi-nor-core: Fixup SNOR_F_IO_MODE_EN_VOLATILE for MT35X
MT35XU512ABA has only BFPT and 4-Byte Address Instruction Table
in  SFDP. commit bebdc23750 ("mtd: spi-nor: Parse SFDP SCCR Map")
added checks in spi_nor_octal_dtr_enable() to bail out if the 22nd DWORD
in SCCR does not indicate DTR Octal Mode Enable, since MT35XU512ABA device
supports octal DTR mode, add this property in SFDP fixup.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2025-05-06 13:12:43 -06:00
Heiko StuebnerandKever Yang 2d6346d901 configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS for px30 to rk3308/etc
Loading a FIT image for kernel, initrd and rootfs on px30 can result in an
memory overlap, resulting in the not 100% helpful message of
"This will not be a case any time" from lmb_fix_over_lap_regions().

Adding a bit of debug info to lmb_fix_over_lap_regions() brings:
lmb_fix_over_lap_regions: base1 0x280000-0x6005ac > base2 0x600000-0x6000d1

So this is because the FIT image gets loaded to the kernel_addr_r at
0x280000 while the pxe-file is already living at 0x600000, only 3.5MB
behind.

In commit 4acc8bb044 ("configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS
for rk3308, rk3328, and rk3399") FUKAUMI Naoki already brought the memory
layouts for the mentioned socs in sync.

Adjusting the env-layout on px30 to this scheme, magically solves the
overlap issue and also brings px30 more in line with the other mentioned
SoCs.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 17:59:12 +08:00
Chen-Yu TsaiandKever Yang 64f670f75f rockchip: io-domain: Enable by default for all supported SoCs
The IO domain driver controls the I/O voltage for various pins,
MMC included.

Enable it by default for all supported Rockchip SoCs.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
2025-05-06 16:12:06 +08:00
Quentin SchulzandKever Yang 735fb2d7ee pinctrl: rockchip: constify rockchip_pin_ctrl for RV1108
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang 60a2c563b7 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3399
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang b8c273247c pinctrl: rockchip: constify rockchip_pin_ctrl for RK3368
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang 0468683344 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3328
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang 4d4e4d502b pinctrl: rockchip: constify rockchip_pin_ctrl for RK3308
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang 8475f52604 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3288
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang 1b85862d7e pinctrl: rockchip: constify rockchip_pin_ctrl for RK3228
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang 8ac01d7965 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3188
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang 8881eb7317 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3128
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang cb27ad9a10 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3066
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang 91b39dd208 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3036
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang f6c4dcb1f2 pinctrl: rockchip: constify rockchip_pin_ctrl for PX30
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Quentin SchulzandKever Yang 96f9e11255 pinctrl: rockchip: fix bank's pin_base computing
The logic in the core reads the nr_pins of the controller and uses it as
the index of the first pin in the bank (pin_base) it currently parses.
It then increments the number of pins in the controller before going to
the next bank.

This works "fine" for controllers where nr_pins isn't defined in their
rockchip_pin_ctrl struct as it defaults to 0. However, when it is
already set, it'll make the index pin of each bank offset by the number
in nr_pins declared in the struct at initialization, and it'll keep
growing while adding banks, which means the total number of pins in the
controller will be misrepresented.

Additionally, U-Boot proper may probe this driver twice (pre-reloc and
true proper) and not reset nr_pins of the controller in-between meaning
the second probe will have an offset of the actual correct nr_pins.

Instead, let's just store locally the number of pins in the controller
and make sure it's reset between probes.

Finally, this stops modifying a const struct which will soon be
triggering a CPU abort at runtime.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:59:43 +08:00
Jonas KarlmanandKever Yang 24c56a160a rockchip: binman: Support use of crc32 hash for FIT images
Use of SHA256 checksum validation on ARMv7 SoCs can be very time
consuming compared to when used on a ARMv8 SoC with Crypto Extensions.

Add support for use of the much faster CRC32 hash algo when SHA256 is
not supported in SPL. Also use FIT_HASH_ALGO to simplify the ifdefs when
no known hash algo has been compiled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-05-06 15:58:25 +08:00
Simon GlassandKever Yang cbd89fdd03 rockchip: binman: Include a compatible string in each configuration
Provide a compatible string in the config nodes that U-Boot can use to
help decide which configuration to use with SPL_LOAD_FIT_FULL=y and
FIT_BEST_MATCH=y.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-05-06 15:58:25 +08:00
Jonas KarlmanandKever Yang ce0dccf459 rockchip: Add SPL_PAD_TO Kconfig default value
Almost all Rockchip boards use the same Kconfig value for SPL_PAD_TO,
0x7f8000.

u-boot-rockchip.bin is typically written to offset 64S (32KiB) of MMC
media. u-boot.itb (or u-boot.img) is typically expected at offset 16384S
(8MiB) of MMC media (SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000).

SPL_PAD_TO is used as the offset for u-boot.itb (or u-boot.img) in the
generated simple-bin binman image, and can be calculated as:

  SPL_PAD_TO = (16384S - 64S) * 512 = 0x7f8000

Add this value as a default value for ARCH_ROCKCHIP.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-05-06 15:58:25 +08:00
Simon GlassandKever Yang 59c253a11f rockchip: binman: Un-indent the FIT template
Fix the indentation on the template. This is done in a separate patch
so that it is easier to review.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-05-06 15:58:25 +08:00
Simon GlassandKever Yang 2febe31d66 rockchip: binman: Create a template for the FIT
Move the FIT description into a template so that it can be used in both
the simple-bin and the simple-bin-spi images.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-05-06 15:58:25 +08:00
Simon GlassandKever Yang 3810ce1b47 rockchip: binman: Factor out arch and compression
Declare arch and compression at the top of the file to avoid needing
ifdefs in every usage.

Add a few comments to help with the remaining #ifdefs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-06 15:58:25 +08:00
Simon GlassandKever Yang 876df0a57d rockchip: binman: Correct the OS prop for U-Boot
The U-Boot image is currently being identified as an invalid OS in
spl_fit_image_get_os() due to case sensitive compare.

Use the correct lower-case value to fix this.

Fixes: e0c0efff2a ("rockchip: Support building the all output files in binman")
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-05-06 15:58:25 +08:00
Quentin SchulzandKever Yang f9b4d051a7 rockchip: rk3288: do not generate u-boot.rom anymore
This was only used on RK3288 Chromebooks and the EVB.

If it follows the same pattern as for RK3399 Chromebooks where their
maintainer (Simon) agreed[1] to removal of u-boot.rom on the basis that
the generic u-boot-rockchip-spi.bin is now enough, let's do the same for
RK3288 and remove the last Rockchip users of u-boot.rom (and HAS_ROM
symbol).

At the same time, remove HAS_ROM symbol from the RK3288 Chromebooks and
EVB configs since they were used only for that.

SYS_SPI_U_BOOT_OFFS offset in rockchip-u-boot.dtsi for the u-boot-img
node of simple-bin-spi binman image matches the one used in u-boot.rom
except for the EVB.
The EVB doesn't have ROCKCHIP_SPI_IMAGE symbol enabled, so HAS_ROM had
no effect anyway. Even if it had, this would not have been enough
considering that SPL_SPI_LOAD symbol is not set, so U-Boot proper could
not be loaded from SPI even if SPL/TPL does.

Make sure u-boot-rockchip-spi.bin has the same size of u-boot.rom for
Chromebooks as that seems to be important.

[1] https://lore.kernel.org/u-boot/CAFLszTh-SewFod8dEOF3+e-wCE1qFF0CyxxR8CbQwy3BRW3k6w@mail.gmail.com/

Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org>  # chromebook-kevin
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-05-06 15:57:38 +08:00
Quentin SchulzandKever Yang 1f140fefa6 rockchip: rk3399: do not generate u-boot.rom anymore
This was only used on RK3399 Gru Chromebooks and their maintainer
(Simon) agreed[1] to its removal on the basis that the generic
u-boot-rockchip-spi.bin is now enough, so let's do that.

At the same time, remove HAS_ROM symbol from the Gru Chromebooks config
since they were used only for that.

Make sure u-boot-rockchip-spi.bin has the same size of u-boot.rom for
Chromebooks as that seems to be important.

[1] https://lore.kernel.org/u-boot/CAFLszTh-SewFod8dEOF3+e-wCE1qFF0CyxxR8CbQwy3BRW3k6w@mail.gmail.com/

Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org>  # chromebook-kevin
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-05-06 15:57:38 +08:00
Marek VasutandTom Rini 4d3b5c679b fs: exfat: Inhibit unused exfat_humanize_bytes() and exfat_print_info()
Make sure unused exfat_humanize_bytes() and exfat_print_info()
functions are not compiled into U-Boot code base. This also removes
CID 550300:  Integer handling issues  (INTEGER_OVERFLOW)
in exfat_humanize_bytes() , which is now surely unreachable.

Signed-off-by: Marek Vasut <marex@denx.de>
2025-05-05 14:19:20 -06:00
Marek VasutandTom Rini 4ba2fe14f2 fs: exfat: Use strncpy() and bail on too long filenames
In case the filename is too long, longer than PATH_MAX - 1, it
would overflow dirs->dirname array. Add missing check and also
use strncpy() to prevent the overflow in any case.

Fixes CID 550305:  Security best practices violations  (STRING_OVERFLOW)

Signed-off-by: Marek Vasut <marex@denx.de>
2025-05-05 14:19:20 -06:00
Udit KumarandTom Rini 1c26f91a22 firmware: ti_sci: Add Initialization of dev_info head node
On K3 devices two drivers ti_sci and ti_sci_dm are supporting firmware
functions. At run time one of driver is used.

Driver ti_sci already initializing head for dev_list in its probe
function, but it was missed in ti_sci_dm driver.

So add head list init support for ti_sci_dm driver.
While at this, move init of list before usages in both functions.

Fixes: 5d5a699855a7("firmware: ti_sci: Add support for Resoure Management at R5 SPL stage")
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2025-05-05 14:18:59 -06:00
Daniel SchultzandTom Rini 1750ba44d5 configs: phycore_am62x_a53_defconfig: Remove CONFIG_SYS_BOOTM_LEN
This config was defined with the default value of 8 MiB. However,
the default value is different when CONFIG_ARM64 is enabled and
should be 64 MiB.

Remove this config from the A53 defconfig and use the correct
default config.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-05-05 14:18:56 -06:00
Jerome ForissierandTom Rini 0352eab7d3 cmd: spawn: reject 0 as an invalid job ID
Job IDs are positive integers greater than 1. 0 is not a valid job ID,
therefore fix the comparison in do_wait().

Fixes Coverity defects:

*** CID 550296:  Control flow issues  (NO_EFFECT)
/cmd/spawn.c: 172 in do_wait()
166                     for (i = 0; i < CONFIG_CMD_SPAWN_NUM_JOBS; i++)
167                             if (job[i])
168                                     ret = wait_job(i);
169             } else {
170                     for (i = 1; i < argc; i++) {
171                             id = dectoul(argv[i], NULL);
>>>     CID 550296:  Control flow issues  (NO_EFFECT)
>>>     This less-than-zero comparison of an unsigned value is never true.
"id < 0UL".
172                             if (id < 0 || id >
CONFIG_CMD_SPAWN_NUM_JOBS)
173                                     return CMD_RET_USAGE;
174                             idx = (int)id - 1;
175                             ret = wait_job(idx);
176                     }
177             }

*** CID 550297:  Integer handling issues  (INTEGER_OVERFLOW)
/cmd/spawn.c: 174 in do_wait()
168                                     ret = wait_job(i);
169             } else {
170                     for (i = 1; i < argc; i++) {
171                             id = dectoul(argv[i], NULL);
172                             if (id < 0 || id >
CONFIG_CMD_SPAWN_NUM_JOBS)
173                                     return CMD_RET_USAGE;
>>>     CID 550297:  Integer handling issues  (INTEGER_OVERFLOW)
>>>     Expression "idx", where "(int)id - 1" is known to be equal to -1,
overflows the type of "idx", which is type "unsigned int".
174                             idx = (int)id - 1;
175                             ret = wait_job(idx);
176                     }
177             }

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
CC: Tom Rini <trini@konsulko.com>
2025-05-05 14:18:53 -06:00
Yao ZiandTom Rini 252cd20530 Makefile: Strip leading spaces when preprocessing generated_defconfig
Clang's preprocessor may emit extra spaces for lines starting with '#'.
Lines with these extra characters cannot be handled by Kconfig and will
be ignored with warnings like,

        unexpected data:  # CONFIG_OF_BOARD_FIXUP is not set

Those options that is expected to be assigned explicitly with N will be
set to the default value, messing up board configurations.

Let's sed these spaces away to ensure board configurations could be
correctly generated with Clang.

Link: https://github.com/llvm/llvm-project/issues/78778
Fixes: 2027e99e61 ("Makefile: Run defconfig files through the C preprocessor")
Reported-by: Nathaniel Hourt <I@nathaniel.land>
Signed-off-by: Yao Zi <ziyao@disroot.org>
2025-05-05 14:17:23 -06:00
Christian MarangiandTom Rini 03fb08d4ae env: Introduce support for MTD
Introduce support for env in generic MTD. Currently we only support SPI
flash based on the lagacy sf cmd that assume SPI flash are always NOR.
This is not the case as to SPI controller also NAND can be attached.

To support also these flash scenario, add support for storing and
reading ENV from generic MTD device by adding an env driver that
base entirely on the MTD api.

Introduce a new kconfig CONFIG_ENV_IS_IN_MTD and
CONFIG_ENV_MTD_DEV to define the name of the MTD device as exposed
by mtd list.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-05-05 14:16:59 -06:00
Aristo ChenandTom Rini f717d798be bootm: improve error message when gzip decompression buffer is too small
Currently, when decompressing a gzip-compressed image during bootm, a
generic error such as "inflate() returned -5" is shown when the buffer is
too small. However, it is not immediately clear that this is caused by
CONFIG_SYS_BOOTM_LEN being too small.

This patch improves error handling by:
- Detecting Z_BUF_ERROR (-5) returned from the inflate() call
- Suggesting the user to increase CONFIG_SYS_BOOTM_LEN when applicable
- Preserving the original return code from zunzip() instead of overwriting
  it with -1

By providing clearer hints when decompression fails due to insufficient
buffer size, this change helps users diagnose and fix boot failures more
easily.

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-05-05 14:16:57 -06:00
Ben WolsiefferandTom Rini 03f5101ff5 Add HOST_ARCH detection for armv5tel and armv6l
Since 7506c15, HOST_ARCH is now used by the EFI loader even when
CONFIG_SANDBOX is disabled. When cross-compiling, the Makefile defines
HOST_ARCH based on the cross-compiler prefix, but this definition fails
to cover some common compiler prefixes. When cross-compiling U-Boot in
nixpkgs, we use CROSS_COMPILE=armv6l-unknown-linux-gnueabihf-, which
results in HOST_ARCH being undefined and causes a build failure.

Fix this by adding armv6l to the match for ARM. Also add armv5tel,
as this is another possible ARM compiler prefix.

Signed-off-by: ZHANG Yuntian <yt@radxa.com>
Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com>
2025-05-05 14:16:54 -06:00
ZhiJie.zhangandTom Rini 81191427a4 eth: Support E1000E I225-V
1. Add pcie device id 0x15f3
2. Add IIC phy id 0x67C9DC00

Signed-off-by: ZhiJie.Zhang <zhangzhijie@bosc.ac.cn>
2025-05-05 14:16:50 -06:00
Tom Rini 9cf090e887 Merge tag 'u-boot-stm32-20250505' of https://source.denx.de/u-boot/custodians/u-boot-stm
- CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26081
- STM32 MCUs:
   - Fix console cmdline
   - Add support NT35510 panel controller on stm32f769i-disco board
- Fix dfu alt buffer clearing
- Enable scan and start for AB schema on STM32MP15 DHSOM
- Add stm32mp2 support for dwc_eth_qos
2025-05-05 10:14:37 -06:00
Tom Rini 3f519d93c1 Merge tag 'ubifixes-for-2025.07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-ubi
ubi fixes for v2025.07-rc2

- fix bug: Put MTD device after it is not used
  drop MTD device reference after it is not longer used!
  port from upstream Linux commit: b95f83ab762dd6211351b9140f99f43644076ca8
  from Alexander Vickberg
2025-05-05 07:54:30 -06:00
Patrice Chotard 9b74f86b68 configs: stm32746-eval: Fix console cmdline
The Linux cmdline encoded in the defconfig is wrong, the
STM32 USART driver registers as ttySTM0 not ttyS0.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-05-05 15:51:47 +02:00