Commit Graph
100471 Commits
Author SHA1 Message Date
Aswin MuruganandTom Rini abe2faf426 dts: qcs615-ride-u-boot.dtsi: Add memory entry to bootup
Added the memory entry to bootup.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:49 -06:00
Balaji SelvanathanandTom Rini 5afb01b2ab configs: add qcom_qcs8300_defconfig
Introduce a defconfig for QCS8300 based boards.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-7-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:49 -06:00
Balaji SelvanathanandTom Rini 1c6f9b4558 qcom_defconfig: Enable QCS8300 clock driver
Enable the QCS8300 clock driver in Qualcomm defconfig.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-6-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:49 -06:00
Balaji SelvanathanandTom Rini b661d7c96b phy: qcom: Enable QMP UFS PHY driver for QCS8300
Enable QMP phy for QCS8300, referenced from Linux.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-5-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:23 -06:00
Balaji SelvanathanandTom Rini 57f232607b clk/qcom: qcs8300: Add GCC clock driver for QCS8300
* Port Linux's gcc-qcs8300.c driver to U-Boot for basic bring-up.

* Enable QCS8300 clocks in qcom_defconfig.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-4-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:03 -06:00
Balaji SelvanathanandTom Rini 8e29f5adcc dts: qcs8300-ride-u-boot.dtsi: Add memory entry to bootup
Added the memory entry to bootup.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-3-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:03 -06:00
Balaji SelvanathanandTom Rini e71cfbbae6 doc: board: qualcomm: document Dragonwing board building/flashing
Introducing documentation support for Qualcomm Dragonwing series
boards. Documents the build and flashing steps.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-2-quic_bselvana@quicinc.com
[Casey: add dragonwing to board/qualcomm/index.rst]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:03 -06:00
Sumit GargandTom Rini 787ef52288 mach-snapdragon: of_fixup: Drop USB dr_mode override for RB1/2
The default DIP switch configuration on RB1/2 is to enable flashing
support via USB type-c port either using QDL or fastboot. It's just
cumbersome to get the host mode working in U-Boot via DIP switch toggle
when you need the flashing capability using the type-c port.

So instead lets enable fastboot in U-Boot for RB1/2 boards which is
more useful in the default board DIP switch configuration. This let's
us to drop dr_mode DT fixup.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250516130854.606067-1-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:03 -06:00
Aswin MuruganandTom Rini ddc527ac43 gpio: msm_gpio: return correct value for gpio read
In the current implementation, the GPIO read operation considers
both the input and outbut bits (bits 0 and 1). It should only consider
the state of input bit, i.e bit 0. To address this, mask input bit
alone and read it.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250508113646.1462518-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:53:33 -06:00
Balaji SelvanathanandCasey Connolly 35811a7b0d drivers: watchdog: qcom: Add timeout configuration support in watchdog
This patch enhances the Qualcomm watchdog driver by introducing
support for dynamic timeout configuration. Specifically:

- Calculates and sets the bark and bite timeout values based on
  the clock rate and the requested timeout in milliseconds.
- Adds retrieval of the watchdog clock rate during probe using
  the common clock framework.
- Adds a default timeout value for ARCH_SNAPDRAGON
  in WATCHDOG_TIMEOUT_MSECS.

These changes improve the configurability and accuracy of the
watchdog timer on Qualcomm platforms.

This work builds upon the previous submission:
https://lore.kernel.org/all/20250422-b4-qcom-wdt-v3-1-730d4d5a858d@paulsajna.com/

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250527124926.128413-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:39 +02:00
Casey ConnollyandPaul Sajna 530764de9f watchdog: qcom: introduce qcom-wdt driver
Some Qualcomm device vendors decide to turn the watchdog on in the
bootloader, resulting in the device being reset if it isn't petted every
~30 seconds. Introduce a driver to keep the watchdog happy and prevent this
annoying behaviour.

Signed-off-by: Paul Sajna <hello@paulsajna.com>
Co-authored-by: Paul Sajna <hello@paulsajna.com>
Tested-by: Paul Sajna <hello@paulsajna.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250422-b4-qcom-wdt-v3-1-730d4d5a858d@paulsajna.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:38 +02:00
Varadarajan NarayananandCasey Connolly cb99e1257b configs: add qcom_ipq5424_mmc_defconfig
Introduce a defconfig for the Qualcomm IPQ5424 SoC based RDPs.
Presently supports eMMC.

Per the flash memory layout, U-Boot size cannot exceed 756KB. With this
defconfig, u-boot.mbn size is ~480KB.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-7-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Varadarajan NarayananandCasey Connolly c4aa86c04f pinctrl: qcom: Add ipq5424 pinctrl driver
Add pinctrl driver for the TLMM block found in the ipq5424 SoC.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-6-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Varadarajan NarayananandCasey Connolly d7fb15c17d clk/qcom: add initial clock driver for ipq5424
Add initial set of clocks and resets for enabling U-Boot on ipq5424
based RDP platforms.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-5-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Varadarajan NarayananandCasey Connolly c1363633c6 doc: board/qualcomm: Update RDP signing instructions
IPQ5424 expects U-Boot to have MBN version 7 header. The qtestsign tool
presently documented doesn't support v7. Hence update the instructions
to use a different tool that can support both v6 and v7.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-4-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Varadarajan NarayananandCasey Connolly 9997cc261a dts: ipq5424-rdp466-u-boot: add override dtsi
Add initial support for the IPQ5424 MMC based RDP platforms.
Define memory layout statically.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-3-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Tom Rini dbf7fd557a Merge patch series "Consistent Kconfig environment options CONFIG_ENV_ prefix"
Marek Vasut <marek.vasut+renesas@mailbox.org> says:

Rename the environment related variables and add ENV_ prefix, so that
all configuration options which are related to environment would have
an CONFIG_ENV_ prefix. No functional change.

Link: https://lore.kernel.org/r/20250609192701.20260-1-marek.vasut+renesas@mailbox.org
2025-06-20 12:57:47 -06:00
Marek VasutandTom Rini 224224c9fa env: Drop DELAY_ENVIRONMENT
There are no users of DELAY_ENVIRONMENT and the same effect can
be achieved either using DT /config/load-environment property,
or by using ENV_IS_NOWHERE . Remove this configuration option
and matching functionality.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Marek VasutandTom Rini fb5235239a env: Rename DEFAULT_ENV_FILE to ENV_DEFAULT_ENV_TEXT_FILE
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Also rename USE_DEFAULT_ENV_FILE to USE_ENV_DEFAULT_ENV_TEXT_FILE .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Marek VasutandTom Rini ffc4914703 env: Rename ENV_MMC_PARTITION to ENV_MMC_SW_PARTITION
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Use ENV_MMC_SW_PARTITION to clarify this is the SD/MMC software
partition table entry selector. Update the help text accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Marek VasutandTom Rini 31617b880a env: Rename SYS_MMC_ENV_PART to ENV_MMC_EMMC_HW_PARTITION
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Use ENV_MMC_EMMC_HW_PARTITION to clarify this is the eMMC hardware
partition selector, not a software partition table entry selector.
Retain the ENV_MMC_ prefix to make it easier to search for all the
SD/MMC related ENV options. Update the help text accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Marek VasutandTom Rini 0f44d5549e env: Rename SYS_MMC_ENV_DEV to ENV_MMC_DEVICE_INDEX
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Use ENV_MMC_DEVICE_INDEX to clarify this is the SD/MMC device
index, a number, as enumerated by U-Boot. Update the help text
accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Marek VasutandTom Rini 123682c765 env: Rename SYS_RELOC_GD_ENV_ADDR to ENV_RELOC_GD_ENV_ADDR
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Marek VasutandTom Rini 5fb88fa725 env: Rename SYS_REDUNDAND_ENVIRONMENT to ENV_REDUNDANT
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Marek VasutandTom Rini 0fd9a3480a env: Rename OVERWRITE_ETHADDR_ONCE to ENV_OVERWRITE_ETHADDR_ONCE
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Tom Rini 73fd245623 Merge patch series "bootstd: Fix efi_mgr usage in bootmeths env var"
Sam Protsenko <semen.protsenko@linaro.org> says:

Defining the 'bootmeths' environment variable with efi_mgr causes NULL
pointer dereference when running 'bootflow scan' on the E850-96 board.
This patch series fixes that, and cleans up the surrounding code a
little while at it.

Link: https://lore.kernel.org/r/20250112034213.13153-1-semen.protsenko@linaro.org
2025-06-20 08:01:16 -06:00
Sam ProtsenkoandTom Rini 8c61fc082e bootstd: Fix incorrect struct name in bootmeth_setup_iter_order()
There is no such thing as struct bootmeth, it's probably a typo. This
issue doesn't affect the execution as it's a pointer, and pointer sizes
are the same for all data types. But it can be confusing, so make it
struct udevice, as it should be.

Fixes: a950d31abe ("bootstd: Add the bootmeth uclass and helpers")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2025-06-20 08:01:09 -06:00
Sam ProtsenkoandTom Rini 8da358c0a1 bootstd: Probe bootmeth devices for bootmeths env var
Specifying efi_mgr in 'bootmeths' environment variable leads to NULL
pointer dereference when 'bootflow scan' is executed, with call trace
like this:

    priv->fake_dev // NULL pointer dereference
    .read_bootflow = efi_mgr_read_bootflow()
    bootmeth_get_bootflow()
    bootflow_check()
    bootflow_scan_first()
    do_bootflow_scan()
    'bootflow scan -l'

That happens because in case when 'bootmeths' env var is defined the
bootmeth_efi_mgr driver is not probed, and the memory for its private
data isn't allocated by .priv_auto. In case when 'bootmeths' env var is
not defined, the std->bootmeth_count is 0, and the execution flow in
bootmeth_setup_iter_order() takes "no ordering" path, which in turn runs
uclass_get_device_by_seq() -> ... -> device_probe(), so issue isn't
present there. But when 'bootmeths' is defined and contains efi_mgr, the
std->bootmeth_count > 0, so bootmeth_setup_iter_order() follows the "we
have an ordering" path, where devices are not probed. In other words:

    'bootmeths' defined           'bootmeths' not defined
    --------------------------------------------------------
    priv == NULL                    priv != NULL
         ^                                ^
         |                        device_alloc_priv()
     no probe                     device_of_to_plat()
         ^                        device_probe()
         |                        uclass_get_device_tail()
    dev = order[i]                uclass_get_device_by_seq()
         ^                                ^
         | have an ordering               | no ordering
         +----------------+---------------+
                          |
             bootmeth_setup_iter_order()
             bootflow_scan_first()
             do_bootflow_scan()

Add an explicit device_probe() call in "we have an ordering" case to fix
the issue.

Fixes: c627cfc14c ("bootstd: Allow scanning for global bootmeths separately")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-06-20 08:01:09 -06:00
Sam ProtsenkoandTom Rini 11319e0e2b bootstd: Fix memleak on errors in bootmeth_setup_iter_order()
Free memory allocated for 'order' (array of bootmeths) on error paths in
bootmeth_setup_iter_order() function.

Fixes: c627cfc14c ("bootstd: Allow scanning for global bootmeths separately")
Fixes: 10d16faa43 ("bootstd: Detect empty bootmeth")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-06-20 08:01:09 -06:00
Tom Rini 4bbfd1c042 Merge tag 'u-boot-at91-2025.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2025.10 cycle:

This feature set includes the addition of new sam9x7 SoC and a new board
named sam9x7-curiosity. There is also new support for sam9x60 compatible
at91 watchdog.
2025-06-20 07:59:34 -06:00
Eric SchikschneitandTom Rini 5ba5cbf5a2 dtc: Add Kconfig option to pad device tree blob
This will allow arch(s) that use device tree blobs to pad the end of the
device tree so they can be modified by board files at run time. This will
help prevent errors such as FDT_ERR_NOSPACE from occurring.

Signed-off-by: Eric Schikschneit <eric.schikschneit@novatechautomation.com>
[trini: Change default order so that X86 && EFI_APP works correctly]
2025-06-19 19:00:09 -06:00
Tom Rini 0c6c8065a2 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
- Assorted cleanups and R-Car Gen4 watchdog driver
2025-06-19 08:11:25 -06:00
Manikandan MuralidharanandEugen Hristev 9b9a2c9994 configs: sam9x75_curiosity: Add initial mmc default config
Add default configuration for sd-card to boot the linux kernel.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
2025-06-19 13:56:43 +03:00
Manikandan MuralidharanandEugen Hristev ee6d7a5bf8 board: sam9x75_curiosity: Add support for sam9x75 curiosity
Add board specific functions for sam9x75 curiosity

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
2025-06-19 13:56:43 +03:00
Manikandan MuralidharanandEugen Hristev c65f413ea0 ARM: dts: at91: sam9x75_curiosity: add tweaks for sam9x75 curiosity board
Since the SoC and board DT are already available in dts/upstream,
add the difference from upstream DTS to at91-sam9x75_curiosity-u-boot.dtsi

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
2025-06-19 13:56:43 +03:00
Varshini RajendranandEugen Hristev f66e0825c6 ARM: at91: Add sam9x7 soc
Add new Microchip sam9x7 SoC based on an ARM926.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
2025-06-19 13:56:43 +03:00
Varshini RajendranandEugen Hristev c9d609be60 clk: at91: sam9x7: add pmc driver for sam9x7 SoC family
Add PMC driver support for sam9x7 SoC family

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
[balamanikandan.gunasundar@microchip.com: Add peripheral clock id for pmecc]
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
2025-06-19 13:56:43 +03:00
Manikandan MuralidharanandEugen Hristev ed5ffbee48 clk: at91: clk-main: drop parent_name check when registering main_rc oscillator
The clk_register function logs an error if parent_name is missing from the
Device Tree.On the SAM9X7, the main_rc node is omitted to stay aligned with
the Linux Device Tree.Remove the parent_name check in at91_clk_main_rc()
to allow it to pass NULL when the parent is not specified.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
2025-06-19 13:56:43 +03:00
Varshini RajendranandEugen Hristev 107cf34bd7 clk: at91: sam9x60-pll: add support for HW PLL freq dividers
Add support for hardware dividers for PLL IDs.In sam9x7 SoC,
PLL_ID_PLLA and PLL_ID_PLLA_DIV2 has /2 hardware dividers
each.

fcorepllack -----> HW Div = 2 -+--> fpllack
                               |
                               +--> HW Div = 2 ---> fplladiv2ck

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
2025-06-19 13:56:43 +03:00
Varshini RajendranandEugen Hristev 02217d07a3 clk: at91: sam9x60-pll: add support for core clock frequency inputs
Add support for different core clock frequency input ranges
for different PLL IDs in the PLL driver and align sam9x60, sama7g5 SOC
platforms.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
2025-06-19 13:56:43 +03:00
Manikandan MuralidharanandEugen Hristev ef0ae31dcc dt-bindings: drop at91.h from clock includes
Remove clock/at91.h file as it is subset of
dts/upstream/include/dt-bindings/clock/at91.h.
The constants defined in this header are being used only in dts

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
2025-06-19 13:56:43 +03:00
Fabio EstevamandEugen Hristev f414dbcc13 board: sama5d27_wlsom1_ek: Get RAM size and base from devicetree
Instead of using defines for the RAM size and base address, retrieve these
information from the devicetree.

This aligns with the sama5d27_som1_ek board in commit 73c1589f02
("board: sama5d27_som1_ek: Get dram size and base from device tree").

While at it, remove a spurious '/* SPL */' comment.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2025-06-19 13:56:43 +03:00
Zixun LIandEugen Hristev 57fb27c027 ARM: dts: at91: sam9x60-curiosity: Enable watchdog node
Enable watchdog node on SAM9X60-Curiosity board.

A default timeout of 16s is added which is the maximum supported value,
also matching Linux driver's behavior.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2025-06-19 13:56:43 +03:00
Zixun LIandEugen Hristev d18f1f4730 ARM: dts: sam9x60: Add watchdog DT node
Add the watchdog timer node for the sam9x60 SoC's.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2025-06-19 13:56:42 +03:00
Zixun LIandEugen Hristev ac46b48d30 watchdog: at91sam9_wdt: Add SAM9X60 support
SAM9X60 has a slightly different watchdog implementation:
- Timer value moved into a new register WLR
- Some MR register fields have their position changed

This patch add SAM9X60 support, also adds a compatible
for SAMA5D4 which is the same as existing SAM9260.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2025-06-19 13:56:41 +03:00
Zixun LIandEugen Hristev c8bf2d686d watchdog: at91sam9_wdt: Rename priv to wdt
"wdt" is a better name for watchdog rather than generic "priv".

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2025-06-19 13:56:13 +03:00
Zixun LIandEugen Hristev 98a83fc23b arm: at91: wdt: Rename regval in priv data to mr
Use the name "mr" since we are referring to timer mode register.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2025-06-19 13:56:13 +03:00
Zixun LIandEugen Hristev c7e4262580 arm: at91: wdt: Remove at91_wdt struct
at91_wdt struct is only used by spl, remove this reference and the struct
itself.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2025-06-19 13:56:13 +03:00
Tom Rini ff43c2272a Merge patch series "Print version of the DM firmware"
Moteen Shah <m-shah@ti.com> says:

This patch series adds the functionality to print the DM firmware
version being used. Before requesting TISCI for the DM version we
first check if the DM split mode capability exists, if yes, we proceed
onto making the call to TISCI for retrieving the version information.

DM split mode capability indicates that the DM is a separate binary
altogether and has its own versioning information similar to TIFS.

Boot Logs: https://gist.github.com/Jamm02/37864f605445944a0c0caf426e0aba50

Link: https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/general/core.html#tisci-msg-query-fw-caps
Link: https://lore.kernel.org/r/20250609081434.1000377-1-m-shah@ti.com
2025-06-18 15:54:48 -06:00
Tom Rini 6226bfa41a Merge patch series "Add IPC support on MCU R5F cluster in Split Mode"
Beleswar Padhi <b-padhi@ti.com> says:

This series adds remoteproc support on MCU R5F in Split mode.

During boot, ROM can bring up the boot R5F cores in either lockstep or
split mode based on X509 certificate flags. If booted in lockstep mode,
the MCU R5F cores will run first the R5 SPL, and then once A72 comes up,
will run the Device Manager (DM) firmware. But if booted in split mode, core
0 will run DM firmware and second core sits in WFI. Shut it down so that
other firmwares can later be loaded on them.

The shutdown of MCU R5 Core 1 is invoked at A72 SPL init, as by that
time Device Manager (DM) is up and running on R5 Core 0. The shutdown
of MCU R5 Core 1 is handled by Device Manager itself.

Test logs:
https://gist.github.com/3V3RYONE/ee8e3cb9aa5f4c5c00b059b9c14bfa98

Link: https://lore.kernel.org/r/20250609081429.1724643-1-b-padhi@ti.com
2025-06-18 15:54:48 -06:00