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Author SHA1 Message Date
Marek VasutandNobuhiro Iwamatsu 8474681c3e ARM: rmobile: salvator-x: Adjust UART clock 
The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 .
Use the internal clock and ignore the early version of the chip.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:27 +09:00
Marek VasutandNobuhiro Iwamatsu 60c48e42a0 ARM: rmobile: salvator-x: Zap redefined DECLARE_GLOBAL_DATA_PTR 
The macro is used twice in the salvator-x board file, drop one.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:26 +09:00
Marek VasutandNobuhiro Iwamatsu f7fda5d1c0 ARM: rmobile: salvator-x: Set default device tree 
Set default device tree file in the salvator-x_defconfig
and use it in the environment.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:26 +09:00
Marek VasutandNobuhiro Iwamatsu c94cb71d95 ARM: rmobile: salvator-x: Move OF_LIBFDT and CMD_FDT to board config 
Move these two Kconfig symbols to the salvator-x_defconfig.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:26 +09:00
Marek VasutandNobuhiro Iwamatsu ae7a74a620 ARM: rmobile: salvator-x: Use BIT() macro in board file 
Cosmetic change, replace (1 << (n)) with BIT(n) .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:26 +09:00
Marek VasutandNobuhiro Iwamatsu 2aef8f32b6 ARM: rmobile: Allow R8A7796 Salvator-X configuration 
The Salvator-X can have both H3 and M3 CPU on it, drop the
select R8A7795 to allow both configurations.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:26 +09:00
Marek VasutandNobuhiro Iwamatsu 2dea3b3e7b ARM: rmobile: Add R8A7796 support 
Add Kconfig entry for the R8A7796 RCar M3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:26 +09:00
Marek VasutandNobuhiro Iwamatsu e965c89008 ARM: rmobile: Handle R8A7796 r1.1 in the PRR code 
The R8A7796 r1.1 reports itself as r2.0 , add quirk into the
PRR code to fix this report.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:26 +09:00
Marek VasutandNobuhiro Iwamatsu bc271a0051 ARM: rmobile: Add R8A7796 into the CPU table 
Add entry for the R8A7796 RCar M3 SoC into the CPU info table.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:25 +09:00
Marek VasutandNobuhiro Iwamatsu 3a38c7d0d8 ARM: rmobile: Add R8A7795 into the CPU table 
Add entry for the R8A7795 RCar H3 SoC into the CPU info table.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:25 +09:00
Marek VasutandNobuhiro Iwamatsu a0f6404649 ARM: rmobile: Make the Gen3 SoC configurable 
Allow selecting the Gen3 SoC in preparation for RCar M3 .
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:25 +09:00
Marek VasutandNobuhiro Iwamatsu 43c8352e3e ARM: rmobile: Update link address to match latest BL2 
Update the CONFIG_SYS_TEXT_BASE to match BL2 Rev.1.0.9 and newer,
which loads the U-Boot to 0x50000000 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:25 +09:00
Marek VasutandNobuhiro Iwamatsu 1b044aa8c5 ARM: rmobile: Zap RCAR_GEN3_EXTRAM_BOOT 
This Kconfig option is not used on any board, so drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:25 +09:00
Marek VasutandNobuhiro Iwamatsu 8d31fe2a64 ARM: rmobile: Import R8A7796 PFC and GPIO tables 
Import the R8A7796 PFC and GPIO tables from the latest 3.5.3 release
from Renesas .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:25 +09:00
Marek VasutandNobuhiro Iwamatsu 0dfc2392f6 ARM: rmobile: Update R8A7795 PFC and GPIO tables 
Sync the PFC and GPIO tables with the latest 3.5.3 release from
Renesas . This adds ES2.0 support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:25 +09:00
Hiroyuki YokoyamaandNobuhiro Iwamatsu b7cebcb977 serial: sh: Add r8a7796 support 
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 2017-05-22 04:38:25 +09:00
Marek VasutandNobuhiro Iwamatsu 8ae51b6f32 net: ravb: Add Renesas Ethernet RAVB driver 
Add driver for the Renesas Ethernet AVB block found in RCar H3/M3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Based on work of:
Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Takeshi Kihara <takeshi.kihara.df@renesas.com>
Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
 2017-05-22 04:38:24 +09:00
Kouei AbeandNobuhiro Iwamatsu 1815c29738 gpio: rcar_gen3: Fix GPIO read support 
This patch fixes to read the GPIO status after confirming the
INOUT setting.

Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
 2017-05-22 04:37:30 +09:00
Tom Rini a375ff8e14 Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2017-05-18 17:17:45 -04:00
Tom Rini 753a4dde97 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2017-05-18 17:17:42 -04:00
Tom Rini a0bdf7b31d Merge branch 'master' of git://git.denx.de/u-boot-usb 2017-05-18 17:17:39 -04:00
Jean-Jacques HiblotandTom Rini ad99abe8e7 ARM: dts: am335x-evm: disable mmc3 
SDIO is not supported in u-boot, there is no point in enabling mmc3.
For this purpose, add u-boot specific dtsi that this will be included
automatically while building the dtb.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
 2017-05-18 17:17:11 -04:00
Tom Rini 7452946e7f scripts/Makefile.lib: Always have ...-u-boot.dtsi be able to override 
The intention of having a -u-boot.dtsi file is to be able to make
changes to the provided upstream dts files as well as to be able to add
nodes.  Change the logic for adding the file from making it the last
included file at the top of the dts to being included at the end of the
file.

Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
 2017-05-18 17:17:01 -04:00
Stefano Babic 5c84ad097d Merge branch 'master' of git://git.denx.de/u-boot-imx 
Signed-off-by: Stefano Babic <sbabic@denx.de>
 2017-05-18 11:53:55 +02:00
Ley Foon TanandMarek Vasut d89e979c42 arm: socfpga: Enable build for Arria 10 
Update Kconfig and Makefile to enable Arria 10.
Clean up Makefile and sorting *.o alphanumerically.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:19 +02:00
Ley Foon TanandMarek Vasut 9b21de7811 arm: socfpga: Add board files for the Arria10 
Add support for the Arria10 SoCDK.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:19 +02:00
Ley Foon TanandMarek Vasut 1b2594030d arm: socfpga: Add config and defconfig for Arria 10 
Add config and defconfig for the Arria10 and update socfpga_common.h.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:19 +02:00
Ley Foon TanandMarek Vasut 8f4c80c4fd arm: socfpga: Add SPL support for Arria 10 
Add SPL support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:18 +02:00
Ley Foon TanandMarek Vasut 3d5f7c5af3 arm: dts: Add dts and dtsi for Arria 10 
Device tree files for Arria 10

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:18 +02:00
Ley Foon TanandMarek Vasut 35b9800ff2 arm: socfpga: Add misc support for Arria 10 
Add misc support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:18 +02:00
Ley Foon TanandMarek Vasut caf36e1edb arm: socfpga: Add pinmux for Arria 10 
Add pinmux support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:18 +02:00
Ley Foon TanandMarek Vasut c887d48017 arm: socfpga: Add sdram header file for Arria 10 
Add sdram header file for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:18 +02:00
Ley Foon TanandMarek Vasut 86f032e630 arm: socfpga: Add system manager for Arria 10 
Add system manager register struct and macros for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:18 +02:00
Ley Foon TanandMarek Vasut 177ba1f927 arm: socfpga: Add clock driver for Arria 10 
Add clock driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:17 +02:00
Ley Foon TanandMarek Vasut 827e6a7e0d arm: socfpga: Add reset driver support for Arria 10 
Add reset driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:17 +02:00
Ley Foon TanandMarek Vasut d83b8193ad arm: socfpga: Add A10 macros 
Add i2c, timer and other A10 macros.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:17 +02:00
Ley Foon TanandMarek Vasut d1c559af5f arm: socfpga: Restructure misc driver 
Restructure misc driver in the preparation to support A10.
Move the Gen5 specific code to gen5 file.

Change all uint32_t_to u32.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:17 +02:00
Ley Foon TanandMarek Vasut 4ddd541d6c arm: socfpga: Restructure system manager 
Restructure system manager in the preparation to support A10.
No functional change.

Change uint32_t to u32.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:17 +02:00
Ley Foon TanandMarek Vasut 2b09ea48dd arm: socfpga: Restructure reset manager driver 
Restructure reset manager driver in the preparation to support A10.
Move the Gen5 specific code to gen5 files.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:17 +02:00
Ley Foon TanandMarek Vasut de77811589 arm: socfpga: Restructure clock manager driver 
Restructure clock manager driver in the preparation to support A10.
Move the Gen5 specific code to _gen5 files.

- Change all uint32_t to u32 and change to use macro BIT(n) for bit shift.
- Check return value from wait_for_bit(). So change return type to int for
  cm_write_with_phase() and cm_basic_init().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
 2017-05-18 11:33:16 +02:00
Liam BeguinandMarek Vasut 9ad69f0ba4 usb: lpc32xx: add i2c DM support 
Add DM support for i2c functions.

Signed-off-by: Liam Beguin <lbeguin@tycoint.com>
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Reviewed-by: Marek Vasut <marex@denx.de>
 2017-05-18 11:31:56 +02:00
Peng FanandStefano Babic c1d1e9d677 pinctrl: imx: fix memory leak 
Each time set_state is called, a new piece memory will
be allocated for pin_data, but not freed, this will
incur memory leak.

When error, the devm API could not free memory automatically.
So need call devm_kfree when error.

Issue reported by Coverity

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Agner <stefan.agner@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
 2017-05-18 11:24:34 +02:00
Stefano Babic 8ae5bb37fc imx: mx7dsabresd: fix secure config after switching to DM 
mx7dsabresd_secure_defconfig was not updated after moving to DM.

Signed-off-by: Stefano Babic <sbabic@denx.de>
 2017-05-18 11:24:34 +02:00
Peng FanandStefano Babic d1e204b566 imx: mx7dsabresd: switch to DM USB 
Switch to use DM USB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
 2017-05-18 11:24:34 +02:00
Peng FanandStefano Babic 709fef5131 imx: mx7dsabresd: reset ENET_RST_B 
Reset ENET_RST_B to make ENET function stable.
Since DM_GPIO enabled, we use "gpio_spi@0_5" which corresponds
to ENET_RST_B.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
 2017-05-18 11:24:34 +02:00
Peng FanandStefano Babic 6fbbcfdf06 imx: mx7dsabresd: enable more DM drivers 
Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO
enabled. The 74x164 drivers needs SOFT_SPI and DM_GPIO enabled.
So needs to enable them together.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
 2017-05-18 11:24:34 +02:00
Peng FanandStefano Babic aab203eb2e gpio: 74x164: make oe-pins optional 
Make oe-pins optional because some boards have fixed it to enable.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
 2017-05-18 11:24:34 +02:00
Peng FanandStefano Babic 41eb8ff5ea spi: kconfig: add soft spi Kconfig entry 
Add the Kconfig entry for SOFT_SPI which uses gpio to simulate the
SPI signals. We use it for accessing 74x164 on some i.MX boards.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Stefano Babic <sbabic@denx.de>
 2017-05-18 11:24:34 +02:00
Peng FanandStefano Babic e02ec19f4d arm: dts: imx7d-sdb: add usdhc support 
Add usdhc support

Signed-off-by: Peng Fan <peng.fan@nxp.com>
 2017-05-18 11:24:34 +02:00
Peng FanandStefano Babic 00ad3a9f73 arm: dts: imx7d-sdb: add i2c support 
Add i2c support.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
 2017-05-18 11:24:34 +02:00