Lukasz Czechowski <lukasz.czechowski@thaumatec.com> says:
This patch series extends the usb_onboard_hub driver to allow for
support of more types of onboard hub devices, and adds the Cypress HX3
hub family.
First patch in the series updates the bind function, so that it no
longer uses hardcoded compatible strings.
Next patch simplifies the code, by removing unnecessary dm_gpio function
call.
Third patch updates the remove function, which allows the prevent issues
with usb devices reenumeration, in case of calling "usb reset". Although
the issue could still occur in case of invalid initial state of reset
gpio, it is minimized with no impact on main usb_hub driver.
Fourth patch extends the driver with support for multiple power
supplies, the same way it is done in kernel driver. Finally, last patch
provides hub data and of_match table entries for Cypress HX3
Link: https://lore.kernel.org/r/20250722-usb_onboard_hub_cypress_hx3-v4-0-91c3ee958c0e@thaumatec.com
In the usb_onboard_hub_remove, the reset gpio, if available, is
freed. The pin state however, remains unchanged, as set in the
usb_onboard_hub_reset. The hub is then left enabled.
During second onboard hub probing, the hub is initially enabled
(reset pin in state "0"), and then it is being reset by the reset
function (transition to "1" and then to "0"). Because of this,
the hub first disconnects from root hub, and then it connects again.
When the devices are being discovered in the usb_scan_port in the
usb_hub driver, initially there is the USB_PORT_STAT_CONNECTION bit
not set in portstatus, but USB_PORT_STAT_C_CONNECTION set in
portchange data (which is because disconnect event occurred first).
In this condition, the driver does not wait for devices to appear.
This can cause the hub (and all child devices) to be not enumerated
when rescanning on "usb reset" command.
To fix this, set the reset gpio to active in usb_onboard_hub_remove,
to put the hub into reset state.
However, in case the hub reset pin is by default held in high
state by HW before U-Boot takes over, in which case the USB hub is
active, then during the first probe it gets reset and we might get
into the same issue of the hub being not enumerated.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
The reset GPIO is obtained during driver probing by the function
devm_gpiod_get_optional, which means the GPIO will be automatically
freed when the device is removed. Because of this, explicit call
to free the reset GPIO in hub remove function is not needed.
To support the Managed device resources, the DEVRES config must
be enabled, otherwise the devres functions fall back to non-managed
variants. Set the necessary dependency to DEVRES in Kconfig.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Currently the check in usb_onboard_hub_bind is relying on specific
compatible string for the Michrochip USB5744. Replace this with
more generic approach that will allow to add new types of devices
to the of_match table. Because the driver only needs to bind one
"half" of the hub, the peer-hub node is used to find out if it
was already done. In case peer-hub was bound, -ENODEV is returned.
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
On STM32MP reference boards, the watchdog is started by a previous
boot stage (e.g. bootrom or secure OS), so the config flag
WATCHDOG_AUTOSTART is not required.
It's preferable to rely on the DT properties "u-boot,autostart" or
"u-boot,noautostart", if needed.
For backward compatibility on defconfigs that are based on SPL,
thus cannot rely on a previous boot stage for starting the
watchdog, enable WATCHDOG_AUTOSTART in their respective defconfig.
The change in stm32mp15_dhsom.config is propagated to:
- configs/stm32mp15_dhcom_basic.config
- configs/stm32mp15_dhcor_basic.config
and then to:
- stm32mp15_dhcom_basic_defconfig
- stm32mp15_dhcom_drc02_basic_defconfig
- stm32mp15_dhcom_pdk2_basic_defconfig
- stm32mp15_dhcom_picoitx_basic_defconfig
- stm32mp15_dhcor_avenger96_basic_defconfig
- stm32mp15_dhcor_basic_defconfig
- stm32mp15_dhcor_drc_compact_basic_defconfig
- stm32mp15_dhcor_testbench_basic_defconfig
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a mean to check the IWDG status based on the peripheral version.
This is done by either checking the status bit ONF either by updating
the reload register with the same value and check if the reload succeed.
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The optional SMCWD_GET_TIMELEFT command can be used to detect if
the watchdog has already been started.
See the implementation in OP-TEE secure OS [1].
At probe time, check if the watchdog is already started and then
call wdt_set_force_autostart(). This will keep U-Boot pinging the
watchdog even when the property 'u-boot,noautostart' is present.
Link: https://github.com/OP-TEE/optee_os/commit/a7f2d4bd8632 [1]
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The watchdog could have been already started by a previous boot
stage (e.g. bootrom or secure OS). U-Boot has to start and kick
the watchdog even when CONFIG_WATCHDOG_AUTOSTART is not enabled
or when the DT property u-boot,noautostart is present.
Add the helper wdt_set_force_autostart() that can be called by the
driver's probe() when it detects that the watchdog has already
been started and is running.
Co-developed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
'apt-get update -y' may be required to make sure that the list of
packages is up-to-date and that the subsequent 'apt-get install'
operations can find the requested packages.
Fixes the following CI error:
Fetch: zstd
- trying method: binary download
- sudo apt-get install -y zstd
Exception: Error 100 running 'sudo apt-get install -y zstd': E: Unable to locate package zstd
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Bryan Brattlof <bb@ti.com>
The statement that prints the ELF object type value assumes that "%lx"
(long unsigned int, hexadecimal) is suitable for printing a uint64_t
typed value. While this may seem to work for some machines, ie. amd64,
it isn't ideal on a 32-bit system, such as x86 where uint64_t is likely
to be equivalent to a long long unsigned int, as indicated by:
../tools/mips-relocs.c:275:34:
warning: format '%lx' expects argument of type 'long unsigned int',
but argument 2 has type 'uint64_t'
{aka 'long long unsigned int'} [-Wformat=]
275 | printf("type 0x%lx\n", ehdr_field(e_type));
| ~~^
| |
| long unsigned int
| %llx
As the ehdr_field function-like macro expands to a uint64_t value,
it is better to use the PRIx64 macro in place of "%lx" to ensure that
the correct format string introducer is specified for the actual type
hiding behind uint64_t.
A similar issue is also present in the report of .rel section overflow,
where "%lx" is used to print a few size_t typed values, and would be
better served by "%zx" instead.
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
Fixes: 9630146411 ("MIPS: make size of relocation table fixed but configurable")
Fixes: 703ec9ddf9 ("MIPS: Stop building position independent code")
Cc: Paul Burton <paulburton@kernel.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Masahiro Yamada <masahiroy@kernel.org>
The xorl macro lacked surrounding parens which meant that it could have
unexpected results when used in expressions. Fix this by adding the
surrounding parens to make its use predictable.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Using strcpy to copy a 4 character string into a 4 byte field in a
structure will overflow that field as it writes the terminating \0 into
the following field. Correct this by using memcpy instead.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In boot_from_devices the variable loader is not NULL checked after
assignment and before first use but later code does check it for NULL.
Add a NULL check before first use.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Second set of u-boot-at91 features for the 2025.10 cycle:
This feature set includes the addition of new sama7d65 SoC and a new
board named sama7d65-curiosity.
A dependency exposed by "make allyesconfig" is that the logic around
this symbol was not quite correct. It needs to depend on ARCH_MVEBU and
ARM64 and then select CLK_MVEBU.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable bootstd.
Update defconfigs to the latest u-boot requirements.
Enable SYS_THUMB_BUILD and LTO and to reduce binary size.
Enable NET_RANDOM_ETHADDR.
Disable JFFS2 support.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
mac_read_from_eeprom() always display debug infos, and this messes up the
display of the "Net:" section details:
Before:
Net: EEPROM: TlvInfo v1 len=172
eth0: ethernet@11c20000
After:
Net: eth0: ethernet@11c20000
Fix by moving unconditional "EEPROM: " header into each message and
changing debug message to use log_debug().
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
In a private fork, it's not unreasonable to commit various binary
files associated to one's project, and thus put a suitable
.gitattributes file next to it to force git to treat that file as
binary. In my case, I have a .xslx spreadsheet used for computing
suitable RAM timing tables, which I wanted to put in
board/<vendor>/<project>. Git duly warned me that it would do LF/CRLF
mangling, so I also added a .gitattributes file next to it with
*.xlsx binary
but upon adding that file, git told me that I'd have to use -f because
it's a dot-file that is by default ignored.
Add .gitattributes to the list of dot-files that should not be
ignored.
While in here, sort the list and update the comment, as there are also
files which git itself does not make use of in the list, cf. linux
commit f46e65da48b2 (".gitignore: exclude .get_maintainer.ignore and
.gitattributes").
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
In do_bootvx the environment variable 'bootdev' is fetched and copied
into a buffer without confirming that it will not overflow that buffer.
Use strlcpy to ensure that the buffer will not be overflowed.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
These patches add support for the new Allwinner A523/A527/T527 SoC (all
same die), alongside with defconfigs for three boards using one of those
SoCs.
The patches are the usual combination of refactoring (of the SPL clock
code this time), tweaks to existing drivers to support peripherals in
their A523 versions, and new drivers for pincontrol and clocks. A big
chunk is of course the DRAM controller init routines, many thanks to
Jernej and Mikhail for providing this code, after a big reverse
engineering effort.
Since the DTs for the three supported boards have been merged into the
kernel repo recently, this is concluded by cherry-picks of those
patches, and the defconfig files to finally enable booting those boards.
The patches have been sitting around for a while, and folks are already
using them, so it's now time to get them into the tree.
Gitlab CI passed, and I booted that briefly on those three boards, plus
on some other SoCs to spot potential regressions.
So far developers seem to use three popular boards:
- Avaota A1: dev board with USB 3.0, dual Ethernet, small display
- X96QPro+: TV box with Gigabit Ethernet, USB 3.0, eMMC
- Radxa A5E: small dev board with USB3/M.2 2230 (muxed), dual Ethernet
Add the defconfig files for those boards, containing the DRAM parameters
and the usual Kconfig options.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Avaota A1 router board is an Open Source hardware board, designed
by YuzukiHD. Pine64 produces some boards and sells them. It uses the
Allwinner A527 or T527 SoC, and comes with the following features:
- Eight ARM Cortex-A55 cores, Mali-G57 MC1 GPU
- 1GiB/2GiB/4GiB LPDDR4 DRAM
- AXP717 + AXP323 PMIC
- Raspberry-Pi-2 compatible GPIO header
- 1 USB 2.0 type A host port, 1 USB 3.0 type A host post
- 1 USB 2.0 type C port (OTG + serial debug)
- MicroSD slot
- eMMC between 16 and 128 GiB
- on-board 16MiB bootable SPI NOR flash
- two 1Gbps Ethernet ports (via RTL8211F PHYs)
- HDMI port
- DP port
- camera and LCD connectors
- 3.5mm headphone jack
- (yet) unsupported WiFi/BT chip
- 1.3" LC display, connected via SPI
- 12 V barrel plug for power supply
Add the devicetree file describing the currently supported features.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250307005712.16828-12-andre.przywara@arm.com
[wens@csie.org: Squash in SD card detect pull resistor fix]
Link: https://patch.msgid.link/20250425003422.3465-1-andre.przywara@arm.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[ upstream commit: dbe54efa32afe5b82763c015cbe9e64c4d4e117a ]
(cherry picked from commit ebcb8469ef4336c05c6b9f409714a23cfc891fff)
The Radxa A5E is a development board using the Allwinner A527 SoC, which
is using the same die as the A523 SoC, just exposing the pins of more
peripherals (like HDMI or the 2nd MAC). The board features:
- Allwinner A527/T527 SoC: 8 ARM Cortex-A55 cores, Mali-G57 MC1 GPU
- 1GiB/2GiB/4GiB LPDDR4 DRAM
- AXP717 + AXP323 PMICs
- Raspberry-Pi-2 compatible 40pin GPIO header
- 1 USB 2.0 type C port (OTG), also power supply
- 1 USB 3.0 type A host port (multiplexed with M.2 slot)
- 1 M.2 M-key 2230 slot, with 1 PCIe2.1 lane connected (multiplexed
with USB 3.0 port)
- MicroSD slot
- optional eMMC, 8, 16 or 32GB available
- optional on-board 16MiB bootable SPI NOR flash
- two 1Gbps Ethernet ports (via MAXIO MAE0621A PHYs)
- PoE header for optional supply circuit on one Ethernet port
- WiFi 802.11 a/b/g/n/ac/ax (LB-Link BL-M8800DS2 module using AIC8800)
- HDMI port
- camera and LCD connectors
- power supply via USB-C connector (but no PD) or GPIO header pins
This .dts describes the devices as far as we support them at the moment.
The PMIC rails have been assigned as per the schematics.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250307005712.16828-14-andre.przywara@arm.com
[wens@csie.org: Squash in SD card detect pull resistor fix]
Link: https://patch.msgid.link/20250425003422.3465-1-andre.przywara@arm.com
[wens@csie.org: Rename dts file to sun55i-a527-cubie-a5e.dts]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[ upstream commit: c2520cd032ae8ca3fdaf77b3f3aa687c8cb7843f ]
(cherry picked from commit 91ad117321c0901094c1d6467df90f5f6757569a)
The X96QPro+ is a TV box using the Allwinner H728 SoC. That SoC seems to
be a package variant of the A523 family, at least it uses the same SoC
ID and is compatible as far as we can assess.
It comes with the following specs:
- Allwinner H728 SoC: 8 Arm Cortex-A55 cores, Mali-G57 MC1 GPU
- 2 or 4GiB DDR3L DRAM
- 32, 64, or 128 GiB eMMC flash
- AXP717 + AXP323 PMICs
- Gigabit Ethernet (using MAXIO PHY)
- HDMI port
- 2 * USB 2.0 ports
- 1 * USB 3.0 port
- microSD card slot
- TOSLINK digital audio output
- 3.5mm A/V port
- infrared sensor
- 7-segment display
- 5V barrel plug power supply
- power button
The PCB provides holes for soldering a UART header or cable, this is
connected to the debug UART0. There is another set of UART pins
available. The board also features a FEL button (accessible through the
3.5mm socket) and a reset button (only accessible when case is open).
This .dts just describes the basic peripherals as far as we support them
at the moment. The PMIC rail assignments are reverse engineered as far
as possible, by dumping them from a running Android system, and correlating
them to other boards using the same SoC.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250307005712.16828-13-andre.przywara@arm.com
[wens@csie.org: Squash in SD card detect pull resistor fix]
Link: https://patch.msgid.link/20250425003422.3465-1-andre.przywara@arm.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[ upstream commit: 4ee87d875071390b4e24ce46dbdd792216d61651 ]
(cherry picked from commit 693da0a03149b77a3e2bc11cfd314df8cc2fab40)
The Allwinner A523, and its siblings A527 and T527, which share the same
die, are a new family of SoCs introduced in 2023. They features eight
Arm Cortex-A55 cores, and, among the other usual peripherals, a PCIe and
USB 3.0 controller.
Add the basic SoC devicetree .dtsi for the chip, describing the
fundamental peripherals: the cores, GIC, timer, RTC, CCU and pinctrl.
Also some other peripherals are fully compatible with previous IP, so
add the USB and MMC nodes as well.
The other peripherals will be added in the future, once we understand
their compatibility and DT requirements.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250307005712.16828-9-andre.przywara@arm.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[ upstream commit: 35ac96f796649346c9b0440413dc6c5138249b3e ]
(cherry picked from commit 247a3572abcfd7a0d48e12f8f810f1cbae5ce4f4)
Add the basic Kconfig options, addresses and other values for the
existing Kconfig settings for the new Allwinner A523/T527/H728 SoC.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Add reverse engineered code to add support for DDR3 DRAM chips on the
Allwinner A523 DRAM controller.
The timings are copying what boot0 set up on the X96QPro+ TV box, though
they seem quite suboptimal, with longer latencies that would be required
for DDR3-1600. The chips are also actually capable of DDR3-1833, so
there is room for future improvement.
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
[Andre: rework to copy from H616 DDR3 driver, calculate timings]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
DRAM init code, as per reverse engineering and matching against
previous SoCs. As usual no real documentation, and the DRAM controller
is the usual mixture of close-to-previous IP and new inventions.
This version supports LPDDR4 for now only, as seen on the early boards.
This needs improvements, but it can be done later.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This adds the early A523 clock setup code, for the basic peripheral PLL
and the basic bus clocks (APB/AHB). This is quite close to the existing
H6 and H616 clock code, so this shares the same file. A few bits and bobs
are different, though, so filter for the A523 in a few occasions.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The cpu_sunxi_ncat2.h header file contains addresses of some peripherals
that are needed for the SPL, for chips that belong to the "NCAT2"
generation.
The Allwinner A523 is a member of this group, but a few addresses
differ, and we need a few more addresses, for playing with the core
reset, for instance.
Add the new addresses needed for the A523 and guard existing definitions
that conflict with that new chip.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The X-Powers AXP323 is very close sibling to the AXP313A, only that it
adds support for dual-phasing the first two DC/DC converters.
We do not really care about this particular feature, so just add the new
compatible string and tie it to the existing AXP313A support code.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner A523 SoC has a slightly changed mod clock, where the P
factor, formerly a shift value, is now a second divider value.
Also the input clock is not PLL_PERIPH0 (600MHz) anymore, but
PLL_PERIPH0_400M (for MMC0/1), so adjust the input rate calculation
accordingly. MMC2 has a different set of parents, so the input clock
is 800 MHz there.
Adjust for all of this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The new DT pinctrl binding would allow us to read the pinmux values from
the DT, but it is actually easier to just continue with hardcoding the
mux values in the driver, and matching them against the "function" name.
Add the values for the primary and secondary pin controller on the A523.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Add a clock driver for the PRCM clock controller on the Allwinner A523
family of SoCs, often also used with an "r" prefix or suffix.
This just describes the clock gates and reset lines for the few devices
that we would need, most prominently the R_I2C device for the PMIC.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Add a clock driver for the main clock controller on the Allwinner A523
family of SoCs.
As usual, this just describes the clock gates and reset lines for the
few device that U-Boot cares about: USB, Ethernet, MMC, I2C, SPI.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The watchdog in the Allwinner A523 SoC differs a bit from the one in the
previous SoCs: it lives in a separate register frame, so no longer
inside some timer device, and it manages to shuffle around some
registers a bit. But it also conveniently adds a direct reset
functionality, so we don't need to use a dummy timeout period.
Avoid introducing a new MMIO register frame C struct, but just define
the one needed register offset as a macro. Then just trigger this new
direct reset functionality in the A523 specific reset_cpu()
implementation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The Allwinner A523 features 8 CPU cores, organised in two clusters, both
driven by separate PLLs. Also there is the DSU PLL, which clocks the
hardware that connects the cores to the rest of the system.
And while the PLL registers itself are very similar, they are located in
a separate register frame, outside the main CCU, and also the register
controlling the CPU clock source (mux) is different.
Provide a separate function that reparents the two clusters and the DSU,
while their PLLs are programmed. For the actual PLL programming, we rely
on the existing shared routine.
The selection between the new A523 routine and the existing code is made
with C if statements, but since the choice is effectively made at compile
time already, the compiler optimises away the other code paths, leaving
just the one required function in.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tom Rini
Lukasz CzechowskiandTom Rini
Patrice ChotardandStefan Roese
Clément Le GofficandStefan Roese
Antonio BorneoandStefan Roese
Jerome ForissierandTom Rini
Justin SwartzandTom Rini
Andrew GoodbodyandTom Rini
Tony DinhandStefan Roese
Hugo VilleneuveandStefan Roese
Andrew DavisandTom Rini
Rasmus VillemoesandTom Rini
Casey ConnollyandTom Rini
Andre Przywara
Mikhail KalashnikovandAndre Przywara
Jernej SkrabecandAndre Przywara