Commit Graph
102815 Commits
Author SHA1 Message Date
Dmitrii MerkurevandMattijs Korpershoek 4bf92b541a fastboot: blk: introduce fastboot block flashing support
Introduce fastboot block flashing functions and helpers
to be shared with the MMC implementation.

The write logic comes from the mmc implementation, while
the partition lookup is much simpler and could be extended.

For the erase logic, allmost no block drivers exposes the
erase operation, except mmc & virtio, so in order to allow
erasiong any partition a soft-erase logic has been added
to write zero-ed buffers in a loop.

Signed-off-by: Dmitrii Merkurev <dimorinny@google.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20251121-topic-fastboot-blk-v7-1-9589d902fc91@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-11-24 10:51:16 +01:00
Tom Rini 6e7d2399c8 Merge tag 'efi-next-2025-11-25' of https://source.denx.de/u-boot/custodians/u-boot-efi into next
Pull request efi-next-2025-11-25

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/28455

UEFI:

* In UEFI selftests expose the runtime address as a global variable and
  use it to simplify some of the tests
2025-11-22 10:34:03 -06:00
Heinrich Schuchardt e81750779a efi_selftest: simplify efi_selftest_variables_runtime
Use global st_boottime and st_runtime.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-11-21 19:30:32 +01:00
Heinrich Schuchardt bef916c53f efi_selftest: simplify efi_selftest_variables
Use global st_boottime and st_runtime.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-11-21 19:30:32 +01:00
Heinrich Schuchardt 98838b56cd efi_selftest: simplify efi_st_query_variable_common
Use global st_runtime.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-11-21 19:30:32 +01:00
Heinrich Schuchardt 178900ab9a efi_selftest: simplify efi_selftest_set_virtual_address_map
Use global st_boottime and st_runtime.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-11-21 19:30:32 +01:00
Heinrich Schuchardt 96db88e621 efi_selftest: simplify efi_selftest_rtc
Use global st_runtime.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-11-21 19:30:32 +01:00
Heinrich Schuchardt e58a54571e efi_selftest: simplify efi_selftest_reset
Use global st_runtime.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-11-21 19:30:32 +01:00
Heinrich Schuchardt 4988e683bc efi_selftest: expose runtime table address
Save the address of the EFI runtime as a global variable.
This allows to simplify the setup of tests.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-11-21 19:30:32 +01:00
Tom Rini 8ff90aa64b Merge tag 'interconnect-next-20251120' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon into next
- Qualcomm RPMh cmd_db_read_slave_id() & cmd_db_read_aux_data()
- Initial Interconnect implementation + Qualcomm RPMh support
2025-11-20 08:00:11 -06:00
Neil Armstrong fb3db4aa8d qcom_defconfig: enable interconnect for SM8650
Enable the Interconnect drivers for SM8650

Link: https://patch.msgid.link/20251120-topic-interconnect-next-v5-7-e8a82720da5d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-11-20 09:17:58 +01:00
Neil Armstrong e1461a0f53 ufs: qcom: vote for interconnect bandwidth on probe
Add Interconnect voting on the UFS probe to ask for the largest
bandwidth possible.

Link: https://patch.msgid.link/20251120-topic-interconnect-next-v5-6-e8a82720da5d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-11-20 09:17:58 +01:00
Neil Armstrong 8ec059c5ce interconnect: add support for the SM8650 SoC
Add the SM8650 Interconnect nodes definitions, this is heavily based
on the Linux driver without the QoS definitions.

Link: https://patch.msgid.link/20251120-topic-interconnect-next-v5-5-e8a82720da5d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-11-20 09:17:58 +01:00
Neil Armstrong 591b9e1419 interconnect: add support for the Qualcomm RPMh helpers
The Qualcomm SoCs votes for common resources via the RPMh subsystem.

Implement the necessary helpers for Interconnect providers to add the
nodes and vote via the RPPh "BCM" voters, which are vote endpoints for
each SoC subsystems. The APPS (ARM subsystem) has a dedicated endpoint.

The BCM voter will aggregate all the bandwidth for all the nodes
associated with a BCM voter, and internally the RPMh with also
aggregate all the votes from all the SoC subsystems for the same
BCM voter.

Link: https://patch.msgid.link/20251120-topic-interconnect-next-v5-4-e8a82720da5d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-11-20 09:17:58 +01:00
Neil Armstrong 3949b33049 MAINTAINERS: add myself as Maintainer of the Generic System Interconnect Subsystem
I'll maintain the Interconnect subsystem.

Link: https://patch.msgid.link/20251120-topic-interconnect-next-v5-3-e8a82720da5d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-11-20 09:17:58 +01:00
Neil Armstrong 9ab7163710 interconnect: add DM test suite
Add a test suite exercising the whole lifetime and callbacks
of interconnect with a fake 5 providers with a split node graph.

The test suite checks the calculus are right and goes to the correct
nodes, and the lifetime of the node is correct.

Link: https://patch.msgid.link/20251120-topic-interconnect-next-v5-2-e8a82720da5d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-11-20 09:17:58 +01:00
Neil Armstrong 60a99d5ca3 Introduce the Generic System Interconnect Subsystem
Let's introduce the Generic System Interconnect subsystem based on
the counterpart Linux framework which is used to vote for bandwidth
across multiple SoC busses.

Documentation for the Linux Generic System Interconnect Subsystem can
be found at [1].

Each bus endpoints are materialised as "nodes" which are linked together,
and the DT will specify a pair of nodes to enable and set a bandwidth
on the route between those endpoints.

The hardware resources that provide those nodes and provides the way
to vote for the bandwidth are called "providers".

The Interconnect uclass code is heavily based on the Linux one, with
some small differences:
- nodes are allocated as udevices instead of Linux idr_alloc()
- tag management is minimal, only normal xlate is supported
- getting nodes states at probe is not implemented
- providers are probed on demand while the nodes links are traversed
- nodes are populated on bind
- id management is simplified, static IDs and dynamics IDs can be used
- identical consume API as Linux, only implementation differs

Fully tested with associated DM test suite.

[1] https://docs.kernel.org/driver-api/interconnect.html

Link: https://patch.msgid.link/20251120-topic-interconnect-next-v5-1-e8a82720da5d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-11-20 09:17:58 +01:00
Tom Rini b8872deb44 Merge patch series "'part name' subcommand and some robustification"
Rasmus Villemoes <ravi@prevas.dk> says:

Implement a "part name" subcommand, mirroring the existing "part
number" subcommand.

In the discussion for v1 of that, it came up that there's a bit of
inconsistency in how much and what one can assume to be initialized in
'struct disk_partition' after a successful call of one of the
get_info* family of functions. Patch 1/2 tries to consolidate
that by making sure all ->get_info invocations go through a common
helper that at least always initializes the string members.

Quentin, I've taken the liberty of including your Acks, as the
incremental diff in patch 1 is quite minor, but do speak up if I
should not have done that.

Link: https://lore.kernel.org/r/20251110205411.4075351-1-ravi@prevas.dk
2025-11-18 12:51:22 -06:00
Rasmus VillemoesandTom Rini 30890051ab cmd/part.c: implement "part name" subcommand
This is a natural buddy to the existing "part number", allowing one to
get the partition name for a given partition number.

Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Acked-by: Quentin Schuloz <quentin.schulz@cherry.de>
Tested-by: Anshul Dalal <anshuld@ti.com>
2025-11-18 12:51:09 -06:00
Rasmus VillemoesandTom Rini 3c2a947533 disk/part.c: ensure strings in struct disk_partition are valid after successful get_info
Not all ->get_info implementations necessarily populate all the string
members of struct disk_partition.

Currently, only part_get_info_by_type() (and thereby part_get_info)
ensure that the uuid strings are initialized; part_get_info_by_type()
and part_get_info_by_uuid() do not. In fact, the latter could lead to
a false positive match - if the ->get_info backend does not populate
info->uuid, stale contents in info could cause the strncasecmp() to
succeed.

None of the functions currently ensure that the ->name and ->type
strings are initialized.

Instead of forcing all callers of any of these functions to
pre-initialize info, or all implementations of the ->get_info method
to ensure there are valid C strings in all four fields, create a small
helper function and factor all invocations of ->get_info through that.

This also consolidates the -ENOSYS check and standardizes on using
log_debug() for reporting absence, instead of the current mix of
PRINTF and log_debug(). It does mean we have to special-case -ENOSYS
in the error cases inside the loops in the _by_uuid() and _by_name()
functions, but it's still a net win in #LOC.

Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Tested-by: Anshul Dalal <anshuld@ti.com>
2025-11-18 12:51:09 -06:00
Tom Rini abf15eb60c Merge patch series "remoteproc: k3-r5: Build fixes and security improvements"
Philippe Schenker <philippe.schenker@impulsing.ch> says:

This series fixes compilation errors when building for R5 cores and
addresses a security issue where authenticated images were not being
used correctly.

Patch 1: Cosmetic removal of duplicate code

Patches 2-3: Fix build errors caused by type mismatches between
function signatures and the types used in R5 builds.

Patches 4-5: fix a bug where ti_secure_image_post_process() relocates
images during authentication, but callers were still using the original
unverified addresses.

Patch 6: Implements is_running operation to allow querying R5F core status.

Link: https://lore.kernel.org/r/20251111071756.1257488-1-dev@pschenker.ch
2025-11-18 12:50:38 -06:00
Philippe SchenkerandTom Rini 0c192f52cf remoteproc: k3-r5: Implement is_running operation
Add is_running callback to query the R5F core halt status via the
TI-SCI processor control API. This allows the remoteproc framework
to determine whether the R5F core is currently runnin.

The core is considered running when the PROC_BOOT_CTRL_FLAG_R5_CORE_HALT
bit is not set in the control flags.

Signed-off-by: Philippe Schenker <philippe.schenker@impulsing.ch>
Reviewed-by: Andrew Davis <afd@ti.com>
2025-11-18 12:50:05 -06:00
Philippe SchenkerandTom Rini 3a43fc9016 remoteproc: k3-r5: Use verified image address
After ti_secure_image_post_process() authenticates the image, it may
relocate it to a different memory location and update image_addr to
point to the verified image.

However, rproc_elf_load_image() and rproc_elf_get_boot_addr() were
still using the original "addr" parameter, potentially operating on
the unverified or stale image location instead of the authenticated
image.

Use image_addr (cast to ulong to match function signatures) after
authentication to ensure all operations work with the verified image.

Signed-off-by: Philippe Schenker <philippe.schenker@impulsing.ch>
2025-11-18 12:50:05 -06:00
Philippe SchenkerandTom Rini fe114f3662 mach-k3: security: Propagate verified image addr
The ti_secure_image_check() function may relocate the image during
authentication, updating image_addr to point to the verified location.
The caller was not updated with this new address, causing it to
reference the original unverified location.

Update p_image with the verified image address after authentication
to ensure subsequent operations use the correct location.

Signed-off-by: Philippe Schenker <philippe.schenker@impulsing.ch>
2025-11-18 12:50:05 -06:00
Philippe SchenkerandTom Rini 40768f5ed3 soc: ti: pruss: Fix size ptr type in probe
When compiling for R5 with CONFIG_TI_PRUSS enabled, the
pruss_probe() function passed a u64* to ofnode_get_addr_size_index(),
which expects an fdt_size_t*. This caused a compiler error
about incompatible pointer types.

Cast the size pointer to fdt_size_t* to match the function
signature.

Signed-off-by: Philippe Schenker <philippe.schenker@impulsing.ch>
2025-11-18 12:50:05 -06:00
Philippe SchenkerandTom Rini 5d3697b7cf remoteproc: k3-r5: cast size to size_t6dd
When compiling for R5 core with CONFIG_REMOTEPROC_TI_K3_R5F,
passing 'size' (ulong) to ti_secure_image_post_process() caused
a type mismatch compiler error.

On platforms where ulong and size_t differ in size, directly
casting could lead to out-of-bounds memory access. Fix by
introducing a size_t temporary variable, passing it to the
function, and writing back the potentially modified value for
use in subsequent calls.

Signed-off-by: Philippe Schenker <philippe.schenker@impulsing.ch>
Acked-by: Andrew Davis <afd@ti.com>
2025-11-18 12:50:05 -06:00
Philippe SchenkerandTom Rini 46e372feb7 arm: dts: k3-am642-evm: Remove duplicate node
The device tree contained a duplicate DT node 'main_mmc1_pins_default',
which was already defined a few lines below. This patch removes the
redundant entry.

Signed-off-by: Philippe Schenker <philippe.schenker@impulsing.ch>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
2025-11-18 12:50:05 -06:00
Aswin MuruganandNeil Armstrong a264c0454b soc: qcom: cmd-db: Add cmd_db_read_slave_id() & cmd_db_read_aux_data() functions
Partially reverted commit "soc: qcom: cmd-db: drop unused
functions" by restoring only the cmd_db_read_slave_id() and
cmd_db_read_aux_data() functions, which were removed in that
commit. These functions are required for the RPMH Power Domain
Driver.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>> ---
Link: https://patch.msgid.link/20251113113427.2218045-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-11-18 09:29:34 +01:00
Tom Rini 96edadab54 Merge patch series "ti: add speed grades support for AM62a"
Anshul Dalal <anshuld@ti.com> says:

TI offers SoCs in various speed grades, each speed grade specifies a
certain maximum operating frequency of the clocks for each core.

In K3's boot flow, the R5 SPL starts the A53 or A72 core and configures
the correct clocks and power using the K3 ARM64 rproc driver
(compatible: ti,am654-rproc). However, the driver expects the dt node
for the ARM64 core to be set with a correct "assigned-clock-rates"
value.

Currently the dt has a value of 1.2GHz for the A53 core on AM62a, this
is incorrect for lower speed grades. Therefore this patch set adds
support for fixing this value at runtime based on the detected speed
grade from the efuse MMR.

For the speed grade table, refer to Table 6-1 of the AM62a datasheet.

Link: https://www.ti.com/lit/ds/symlink/am62a7.pdf
Link: https://lore.kernel.org/r/20251030-ti_speed_grade_fix-v1-0-703e4189640a@ti.com
2025-11-12 09:42:50 -06:00
Anshul DalalandTom Rini d4c0b8fed7 mach-k3: am62a: add support for speed grades
Speed grades indicate the maximum operating frequency of any core on the
SoC. This patch adds support for the same to AM62a, this allows the A53
core to be started with the correct frequency by the R5 SPL.

Reference:
  Device Speed Grades (Table 6-1) in AM62a7 Datasheet
  https://www.ti.com/lit/ds/symlink/am62a7.pdf (Page#82)

Signed-off-by: Anshul Dalal <anshuld@ti.com>
2025-11-12 09:42:17 -06:00
Anshul DalalandTom Rini 65a6b83a9b mach-k3: refactor A53 speed grade clock-rate fixup
The K3 ARM64 rproc driver uses the "assigned-clock-rates" value in the
respective "/a53@0" node to properly configure the clocks for the A53
core.

Although the clock value in the DT node might need to be fixed based on
SoC's speed grade at runtime. Certain SoCs such as AM62p and AM62x
already had this implemented, this patch moves the common code to
common.c to avoid duplication and simplify speed grade handling.

The logic to detect the correct entry in the "assigned-clock-rates"
property has also changed. Where we earlier relied on per SoC specific
device and clock IDs for the A53 core, we now use the "clock-names"
property which is device agnostic.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
2025-11-12 09:42:17 -06:00
Anshul DalalandTom Rini 2a909c3da7 mach-k3: am62px: remove fdt_fixup_cpu_freq_nodes_am62p
fdt_fixup_cpu_freq_nodes_am62p is used to delete unsupported opp table
entries at runtime based on the SoC's speed grade.

However, the ti-cpufreq driver in kernel already has support for
rejecting unsupported entries. Therefore this fdt fixup is not necessary
and can be dropped.

Fixes: 8d05cbef73 ("arm: mach-k3: am62p: Fixup a53 max cpu frequency by speed-grade")
Signed-off-by: Anshul Dalal <anshuld@ti.com>
2025-11-12 09:42:17 -06:00
Tom Rini 10fec1b7a3 Merge patch series "reenable dm_gpio tests, add support for gpio-line-names lookup"
Rasmus Villemoes <ravi@prevas.dk> says:

Hopefully third time's the charm.

I merely wanted to add support (mostly for use by the 'gpio' shell
command) for looking up a gpio via the gpio-line-names DT property. We
already have a "gpio_request_by_line_name()", but cmd/gpio.c does a
separate "lookup + request", so it felt more natural to teach the
lookup machinery this as well. That ran into
OF_CONTROL-but-not-OF_LIBFDT being a thing for SPL, so here's yet
another attempt.

Now, when trying to do my civic duty and add tests for this, I found
that test/dm/gpio.c has been defunct for a couple of years, and
reinstating it is not entirely trivial.

After a couple of rounds CI is now happy with this:
https://github.com/u-boot/u-boot/pull/828

Link: https://lore.kernel.org/r/20251104174458.3385564-1-ravi@prevas.dk
2025-11-11 14:53:47 -06:00
Rasmus VillemoesandTom Rini e5e4b60c55 test: gpio: add test for gpio-line-names lookup
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
2025-11-11 14:53:40 -06:00
Rasmus VillemoesandTom Rini c92c3768b6 gpio: search gpio-line-names property in dm_gpio_lookup_name
In scripts as well as interactively, it's much nicer to be able to
refer to GPIOs via their names defined in the device tree property
"gpio-line-names", instead of the rather opaque names derived from the
bank name with a _xx suffix. E.g.

  gpio read factory_reset FACTORY_RESET
  if test $factory_reset = 1 ; then ...

versus

  gpio read factory_reset gpio@481ac000_16
  if test $factory_reset = 1 ; then ...

This is also consistent with the move on the linux/userspace side towards
using line names instead of legacy chip+offset or the even more legacy
global gpio numbering in sysfs.

As dev_read_stringlist_search() depends on both OF_CONTROL and
OF_LIBFDT (which matters for the SPL case), we need some .config
conditional. However, it only adds about ~50 bytes of code to U-Boot
proper, and dm_gpio_lookup_name() most often ends up being GC'ed for
SPL, thus adds no overhead there, so for now make it a hidden symbol
which is merely a convenient shorthand for
CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(OF_LIBFDT).

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
2025-11-11 14:53:40 -06:00
Rasmus VillemoesandTom Rini 23908d8f24 test: gpio: include in build, and fixup bitrot
Commit ebaa3d053e ("test: fix CONFIG_ACPIGEN dependencies"), which
got into v2022.10-rc1, accidentally left out a $
before (CONFIG_DM_GPIO), with the effect that test/dm/gpio.c has not
been built for three years.

Unsurprisingly, the code in there has bit-rotted.

- There's a missing ; causing plain build fail.

  That code was added in 9bf87e256c ("test: dm: update test for
  open-drain/open-source emulation in gpio-uclass"), which was part of
  v2020.07-rc3, i.e. long before the commit causing gpio.c to not be
  built at all. It did build at that time, but also, the missing
  semicolon wasn't found when fa847bb409 ("test: Wrap assert macros
  in ({ ... }) and fix missing semicolons") happened in 2023.

- Commit 592b6f394a ("led: add function naming option from linux")
  bumped sandbox,gpio-count for bank gpio_a in test.dts to 25, but
  didn't update the expected global gpio numbers accordingly.

- The "lookup by label" test likely worked when it was added, but then I
  inadvertently broke it when I noticed that dm_gpio_lookup_label()
  seemed to be broken in commit 10e66449d7 ("gpio-uclass: fix gpio
  lookup by label") - which landed in v2023.01-rc1, so after gpio.c
  was no longer being built.

  The "label" (which is a u-boot concept) that a "hogged gpio" gets is
  <gpio hog node name>.gpio-hog, which is why it used to work with the
  strncmp() but doesn't with strcmp().

  We can either revert 10e66449d7 or append the ".gpio-hog" suffix as
  done below. I don't really have a dog in that race; when I did
  10e66449d7, it was because I thought the "lookup by label" was
  actually about the standardized gpio-line-names property, but then I
  learnt it was not, so is not at all useful to me.

- The leak check now fails.

  Test: gpio_leak: gpio.c
  test/dm/core.c:112, dm_leak_check_end(): uts->start.uordblks == end.uordblks: Expected 0x2a95b0 (2790832), got 0x2a9650 (2790992)
  test/dm/gpio.c:328, dm_test_gpio_leak(): 0 == dm_leak_check_end(uts): Expected 0x0 (0), got 0x1 (1)
  Test: gpio_leak: gpio.c (flat tree)
  test/dm/core.c:112, dm_leak_check_end(): uts->start.uordblks == end.uordblks: Expected 0x2a9650 (2790992), got 0x2a9700 (2791168)
  test/dm/gpio.c:328, dm_test_gpio_leak(): 0 == dm_leak_check_end(uts): Expected 0x0 (0), got 0x1 (1)

  And it fails with the same differences (160/176) even if I
  remove the three lines that actually exercise any of the gpio code,
  i.e. make the whole function amount to

    ut_assertok(dm_leak_check_end(uts));

  Test: gpio_leak: gpio.c
  test/dm/core.c:112, dm_leak_check_end(): uts->start.uordblks == end.uordblks: Expected 0x2a95b0 (2790832), got 0x2a9650 (2790992)
  test/dm/gpio.c:325, dm_test_gpio_leak(): 0 == dm_leak_check_end(uts): Expected 0x0 (0), got 0x1 (1)
  Test: gpio_leak: gpio.c (flat tree)
  test/dm/core.c:112, dm_leak_check_end(): uts->start.uordblks == end.uordblks: Expected 0x2a9650 (2790992), got 0x2a9700 (2791168)
  test/dm/gpio.c:325, dm_test_gpio_leak(): 0 == dm_leak_check_end(uts): Expected 0x0 (0), got 0x1 (1)

  So I suspect that the leak is somewhere in the test framework
  setup/teardown code - dm_leack_check_end() isn't really used
  anywhere else except in a dm/core test. Bisecting to figure out
  where that was introduced is somewhat of a hassle because of the
  other bitrot, and because of the SWIG failure that makes it very
  hard to build older U-Boots.

  So since it's better to have most of the gpio tests actually
  working instead of leaving all of gpio.c as dead code, #if 0 that
  part out and leave it as an archeological exercise.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
2025-11-11 14:53:40 -06:00
Tom Rini 62e89de769 Merge patch series "rsa: fix dependency, rename and relocate RSASSA PSS symbols"
Quentin Schulz <foss+uboot@0leil.net> says:

While historically signature verification is mostly done for FIT such
FIT_SIGNATURE dependency for signature algorithm makes sense, it isn't
the only kind of file we can verify signatures of. It can also be done
manually with rsa_verify_hash() with an embedded public key.

Considering the impacted code is guarded by RSA_VERIFY, let's make the
symbol depend on that otherwise selecting it without RSA_VERIFY won't do
anything. The FIT_SIGNATURE dependency wasn't also enough before as it
only implied RSA_VERIFY.

Then, simply relocate the RSA SSA PSS padding with the other RSA symbols
in lib/rsa instead of in boot/ and rename it to remove the mention to
FIT.

Finally, add the PSS padding wherever PKCS1.5 padding is specified as
one or the other can be used.

Link: https://lore.kernel.org/r/20251031-rsa-pss-always-v2-0-a29184ea064d@cherry.de
2025-11-11 14:53:33 -06:00
Quentin SchulzandTom Rini c50f6b11b3 rsa: update doxygen doc for RSA signature verification to mention PSS
While the verification step originally only supported PKCS1.5 as padding
algorithm for the signature, it was later extended to add support for
PSS but the doxygen doc wasn't updated to reflect that so let's fix
that oversight.

Fixes: 061daa0b61 ("rsa: add support of padding pss")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-11-11 14:53:25 -06:00
Quentin SchulzandTom Rini 360dd89b36 rsa: rename FIT_RSASSA_PSS to RSASSA_PSS and move symbols under lib/rsa
This renames FIT_RSASSA_PSS symbols to drop the FIT_ prefix to avoid
potential confusion since there's nothing FIT specific to those symbols.

It also isn't really related to booting, so boot/Kconfig is an odd place
for them to live. Since they make sense only in relation with RSA,
simply move them to lib/rsa where it makes more sense for them to
reside.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-11-11 14:53:25 -06:00
Quentin SchulzandTom Rini 973019000c boot: group SPL_FIT symbols together
Let's not mix with symbols from other phases.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-11-11 14:53:25 -06:00
Quentin SchulzandTom Rini 013033a2f9 boot: remove duplicate config entry for VPL_FIT
It's defined a bit later in the same file, so let's remove the
duplicated entry.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-11-11 14:53:25 -06:00
Quentin SchulzandTom Rini 63686bf6e0 boot: fix incorrect dependency of FIT_RSASSA_PSS
This padding has nothing to do with FIT except that we can make use of
it when verifying the FIT signatures.

This padding can also be used to verify the signature "manually" e.g. by
calling rsa_verify_hash() directly with an embedded public key.

Additionally, this padding is only useful if RSA (and specifically
RSA_VERIFY) is enabled otherwise it's not used.
The only other place it's used is in rsa-sign.c which is only built for
the host tools and handled by TOOLS_FIT_RSASSA_PSS symbol instead, so no
need to care for that one.

Finally, the FIT_SIGNATURE dependency also wasn't enough because it only
implies RSA_VERIFY, meaning it can be disabled and still have
FIT_RSASSA_PSS enabled.

So add a dependency on RSA_VERIFY and reword the input prompt.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-11-11 14:53:25 -06:00
Tom Rini 4b46f98244 Gitlab: Prefix more of the sjg lab with "sjg"
In preparation for adding more labs to CI, prefix more of the sjg lab
components with "sjg".

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-11-11 14:31:08 -06:00
Tom Rini d5e2db3a4a CI: Update to LLVM 20 release
The current stable release for LLVM is 20, so update to that from 18. No
issues seen in CI.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-11-11 08:15:06 -06:00
Tom Rini 9420160a0d CI: Move to Ubuntu 24.04 'Noble' as the base
The changes here are that we need to ensure python setuptools are
in our build virtual environments as they will no longer come in via
python even in a virtual environment. As part of this ensure setuptools
is in our cache and also include pytest-azurepipelines as we should have
been doing. Next, we move away from using apt-key directly and move that
stanza towards the rest of the apt work.  This also lets us drop
directly installing gnupg2. These steps are not strictly required for
24.04 but will be for later releases and are valid now. Finally, we drop
the unused PTYHONPATH ENV line.

In order to use these containers however, we need to stop running the
event_dump test as the 'addr2line' tool provided by binutils no longer
is able to decode those specific events in most cases. As this is a
problem with binutils and present for some time now, disabling the test
until someone has time to work with upstream this seems reasonable.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-11-10 16:02:28 -06:00
Tom Rini 365a7079fb Prepare v2026.01-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-11-10 11:30:56 -06:00
Tom Rini 6d04828b45 dm: Remove pre-schema tag support
Support for using "u-boot,dm-..." rather than "bootph-..." has been
deprecated since February 2023. Any platforms using this have had a
console message saying to migrate by 2023.07. Go and remove all support
here now, for the v2026.01 release.

The results of this change that aren't clear from the above are that we
still have a checkpatch.pl error message, and document in
doc/develop/spl.rst that they have been migrated since 2023. We also
change the key2dtsi.py tool to use the correct bootph phase rather than
the legacy phase.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-11-10 11:30:56 -06:00
Tom Rini d3b691c9d3 configs: Resync with savedefconfig
Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-11-09 10:53:38 -06:00
Tom Rini 6b27b68869 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Remaining R-Car Gen5 driver patches, MMC, clock. Also a trivial
adjustment for mailbox core to allow operation without .recv callback.
2025-11-08 09:03:54 -06:00
Tom Rini 04ccb271ff Merge patch series "Add support for TI AM6254atl SiP"
Anshul Dalal <anshuld@ti.com> says:

This patch series adds support for AM6254atl SiP (or AM62x SiP for
short) to U-Boot.

The OPN (Orderable Part Number) 'AM6254atl' expands as follows[1]:

AM6254atl
     ||||
     |||+-- Feature Lookup (L indicates 512MiB of integrated LPDDR4)
     ||+--- Device Speed Grade (T indicates 1.25GHz on A53 cores)
     |+---- Silicon PG Revision (A indicates SR 1.0)
     +----- Core configuration (4 indicates A53's in Quad core config)

AM62x SiP provides the existing AM62x SoC with 512MiB of DDR
integrated in a single packages. The first 4 patches in the series
are cherry-picked from the devicetree-rebasing repository at
'v6.18-rc2-dts'.

Link: https://lore.kernel.org/r/20251025-62sip_support-v3-0-b4c8314d0055@ti.com
2025-11-07 16:45:14 -06:00