Commit Graph
91289 Commits
Author SHA1 Message Date
Tim LunnandKever Yang 3da3bb9636 rockchip: Convert rv1126 to standard boot
RV1126 soc appears to have been missed with the conversion of
rockchip socs to standard boot.

Remove remnants of distro boot for rv1126 common and the one
existing board.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Link: https://lore.kernel.org/all/20230407223645.v8.8.I4cf7708a1ba953b9abd81375d93af34665c7b251@changeid/
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04 18:45:58 +08:00
Tim LunnandKever Yang 644e8fc2d5 ram: rockchip: Add rv1126 ddr4 support
Add support for ddr4 on rv1126. Timing detection files are imported
from downstream Rockchip BSP u-boot. Allow selecting ddr4 ram with
define CONFIG_RAM_ROCKCHIP_DDR4.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04 18:45:58 +08:00
Tim LunnandKever Yang 03ee0553a0 arm: dts: rockchip: Sync rv1126 dts from linux 6.8-rc1
Sync linux dts files for rv1126 boards from linux v6.8-rc1 tag. Includes
the newly added dts for Sonoff iHost.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04 18:45:58 +08:00
Jonas KarlmanandKever Yang 33380a5a91 rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK
Enable the DM_ETH_PHY and PHY_REALTEK now that the designware ethernet
driver call eth_phy_set_mdio_bus() to assist with resetting the eth PHY
during probe.

Fixes ethernet on the v1.21 hw revision of Radxa ROCK Pi E:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000
  => net list
  eth0 : ethernet@ff540000 86:e0:c0:ea:fa:a9 active
  eth1 : ethernet@ff550000 86:e0:c0:ea:fa:a8
  => dhcp
  Speed: 1000, full duplex
  BOOTP broadcast 1
  BOOTP broadcast 2
  BOOTP broadcast 3
  DHCP client bound to address 192.168.1.114 (1004 ms)

Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04 18:02:45 +08:00
Jonas KarlmanandKever Yang f1e2f412b0 net: designware: Reset eth phy before phy connect
Some ethernet PHY require being reset before a phy-id can be read back
on the MDIO bus. This can result in the following message being show
on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.

  Could not get PHY for ethernet@ff540000: addr -1

Add support to designware ethernet driver to reset eth phy by calling
the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL
as bus parameter to not set a shared mdio bus reference that would be
freed when probe fails. Also add a eth_phy_get_addr() call to try and
get the phy addr from DT when DM_MDIO is disabled.

This help fix ethernet on Radxa ROCK Pi E v1.21:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000

Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04 18:02:45 +08:00
Kever Yang 52e3353385 configs: rockchip: rk3036: Fix CONFIG_SPL_STACK define
The CONFIG_SPL_STACK for rk3036 is removed in below patch, need to add
it back.

Fixes: f113d7d303 ("Convert CONFIG_SPL_STACK to Kconfig")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04 18:01:03 +08:00
Kever Yang ce7ae9d2db spl: Make SPL_STACK available for ROCKCHIP_RK3036 without spl framework
rk3036 soc has limit internal sram, and not able to support spl
framework.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04 18:01:03 +08:00
YouMin ChenandKever Yang 875bc40a00 rockchip: sdram: fix LPDDR5 bank info for sys_reg version 3
This patch add support for additional bank info used by LPDDR5.

Series-version: 2

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-02-04 18:01:03 +08:00
Tom Rini 819abd0a1e Merge tag 'smbios-2024-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request smbios-2024-04-rc2

* In smbios command
  - write 'Not Specified' for missing strings
  - show correct table size for SMBIOS2.1 entry point
  - adjust formatting of handle numbers
  - add missing colon after UUID
* In generated SMBIOS table
  - avoid introducing 'Unknown' string for missing properties
  - provide RISC-V vendor ID in the type 4 structure
  - provide the correct chassis handle in structure type 2
* Rename Structure Table Maximum Size field in SMBIOS 3 entry point
2024-02-03 09:11:25 -05:00
Heinrich Schuchardt 406c410ef7 smbios: correctly name Structure Table Maximum Size field
In the SMBIOS 3 entry point the Structure Table Maximum Size field was
incorrectly named max_struct_size. A Maximum Structure Size field only
exists in the SMBIOS 2.1 entry point and has a different meaning.

Call the Structure Table Length field table_maximum_size.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-02 19:57:45 +01:00
Heinrich Schuchardt e494258ded smbios: do not determine maximum structure size
Only the SMBIOS 2.1 entry point has a field for the maximum structure size.
As we have switched to an SMBIOS 3 entry point remove the superfluous
calculation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-02 19:57:45 +01:00
Heinrich Schuchardt 551bc96be5 cmd: smbios: show correct table size for SMBIOS2.1 entry point
The SMBIOS table size for SMBIOS2.1 entry points is in field 'Structure
Table Length' (offset 0x16) and not in field 'Maximum Structure Size'
(offset 0x08).

Rename the receiving variable max_struct_size to table_maximum_size
to avoid future confusion.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-02 19:57:45 +01:00
Heinrich Schuchardt 5778c88eb0 smbios: correctly fill chassis handle
The chassis handle field in the type 2 structure must point to the handle
of the type 3 structure.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-02-02 19:57:16 +01:00
Heinrich Schuchardt 545e0e42b9 smbios: provide type 4 RISC-V SMBIOS Processor ID
For RISC-V CPUs the SMBIOS Processor ID field contains
the Machine Vendor ID from CSR mvendorid.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-02 19:57:16 +01:00
Heinrich Schuchardt 6ebf9136ec smbios: if a string value is unknown, use string number 0
The SMBIOS specification describes: "If a string field references no string,
a null (0) is placed in that string field."

Accordingly we should avoid writing a string "Unknown" to the SMBIOS table.

dmidecode displays 'Not Specified' if the string number is 0.

Commit 00a871d34e ("smbios: empty strings in smbios_add_string()")
correctly identified that strings may not have length 0 as two
consecutive NULs indentify the end of the string list. But the suggested
solution did not match the intent of the SMBIOS specification.

Fixes: 00a871d34e ("smbios: empty strings in smbios_add_string()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-02-02 19:56:54 +01:00
Matthias BruggerandHeinrich Schuchardt e31efe50b5 smbios: Fix table when no string is present
When no string is present in a table, next_ptr points to the same
location as eos. When calculating the string table length, we would only
reserve one \0. By spec a SMBIOS table has to end with two \0\0 when no
strings a present.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-02 19:56:54 +01:00
Heinrich Schuchardt c11f176ab1 cmd: smbios: replace missing string by 'Not Specified'
A missing string value is indicated by a string index of 0. In this case
print 'Not Specified' like the Linux dmidecode command does.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-02 19:56:54 +01:00
Heinrich Schuchardt e799f8a48d cmd: smbios: add missing colon after UUID
For consistent formatting add a colon ':' after the UUID label.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-02-02 19:56:34 +01:00
Heinrich Schuchardt 7ca4b0ea6a cmd: smbios: always use '0x%04x' for printing handles
Handles are u16 numbers. Consistently use '0x%04x' to print them.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-02 19:55:29 +01:00
Heinrich Schuchardt b327e64d5f smbios: get_str_from_dt() - add sysinfo_id description
Add description for parameter sysinfo_id of function get_str_from_dt().

Fixes: 07c9e683a4 ("smbios: Allow a few values to come from sysinfo")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-02-02 19:55:29 +01:00
Heinrich Schuchardt 85e490b22e lib: smbios_entr() use logical or for booleans
As a matter of programming style use logical or to combine two boolean
results.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-02-02 19:55:29 +01:00
Tom Rini 050a9b981d Merge tag 'u-boot-amlogic-fixes-20240201' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- stop printing board model twice after sysinfo update
2024-02-01 09:59:53 -05:00
Tom Rini f0df21b40c Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- add andes atcwdt200 support (Randolph)
2024-02-01 09:59:09 -05:00
RandolphandStefan Roese 094eda0660 configs: andes: add watchdog support fot andes ae350
It adds the ATCWDT200 support for Andes AE350 platform.
It also enables wdt command support.

Signed-off-by: CL Wang <cl634@andestech.com>
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-02-01 09:08:44 +01:00
RandolphandStefan Roese 4350e99937 drivers: watchdog: add andes atcwdt200 support
This patch adds an implementation of the Andes watchdog ATCWDT200 driver.

Signed-off-by: CL Wang <cl634@andestech.com>
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-02-01 09:08:44 +01:00
Tom Rini b6d8969bcb Merge tag 'u-boot-at91-2024.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91
First set of u-boot-at91 features for the 2024.04 cycle:

This set includes some DT alignments and solves a compile issue for
custom nand defconfigs.
2024-01-31 10:44:33 -05:00
Tom Rini 625e68ef65 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
* Add RISC-V falcon mode documentation
* Add Clang build support
* Add cmd to detect Debug Trigger Extension support

* Add PWM setting for Unmatched board
* Add Milk-V Duo board support
* Add new device node and enable new config option for VisionFive2 board
* Add second virtio device for RISC-V QEMU
2024-01-31 08:49:35 -05:00
Nam CaoandLeo Yu-Chi Liang 6882255ac3 riscv: dts: starfive: add regulator device
Add the axp15060 regulator device. OpenSBI uses this device to perform
board reset and shutdown.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:53 +08:00
Nam CaoandLeo Yu-Chi Liang 92802e12ef riscv: dts: jh7110: add power management unit controller node
JH7110 has a power management unit controller node. Add this node.

This device is used by OpenSBI during board reset/shutdown.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:53 +08:00
Lukasz TekieliandLeo Yu-Chi Liang 70f150759b board: visionfive2: configure PHY pad drive strength
Configure the pad drive strength register for both PHYs.
The values correspond to what can be found in the Linux DTS
for VisionFive2 v1.3b.

Pad drive strength configuration is required for the phy0 to work correctly
with 100Mbit links.

Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:49 +08:00
Lukasz TekieliandLeo Yu-Chi Liang c025c8afd4 net: phy: motorcomm: configure pad drive strength register
This ports the pad drive strength register configuration which can be
already found in the Linux driver for this PHY.

Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:49 +08:00
Kongyang LiuandLeo Yu-Chi Liang 36278b7051 doc: sophgo: milkv_duo: document Milk-V Duo board
Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:45 +08:00
Kongyang LiuandLeo Yu-Chi Liang 0dc6ee6d2b riscv: sophgo: milkv_duo: initial support added
Add support for Sophgo's Milk-V Duo board, only minimal device tree and
serial console are enabled, and it can boot via vendor first stage
bootloader.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:45 +08:00
Kongyang LiuandLeo Yu-Chi Liang f03d2ab206 riscv: dts: sophgo: add basic device tree for Milk-V Duo board
Import device tree from Linux kernel to add basic support for CPU, PLIC,
UART and Timer. The name cv1800b in the filename represent the chip used
on Milk-V Duo board.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:45 +08:00
Aurelien JarnoandLeo Yu-Chi Liang 386db9a26b configs: visionfive2: Disable ENV_IS_NOWHERE
The VisionFive 2 board supports saving the u-boot environment settings
are saved to on-board SPI flash. However the defconfig enables both
ENV_IS_NOWHERE and ENV_IS_IN_SPI_FLASH, preventing the "saveenv" command
to work. Fix that by disabling ENV_IS_NOWHERE.

Fixes: 7d79bed00c ("configs: starfive: Enable environment in SPI flash support")

Reported-by: E Shattow <lucent@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:38 +08:00
kleines FilmröllchenandLeo Yu-Chi Liang ee9f9d6a41 riscv: Support building with Clang
The -ffixed-gp option of GCC has an exact equivalent of -ffixed-x3 in
Clang.

Signed-off-by: kleines Filmröllchen <filmroellchen@serenityos.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-01-31 16:52:36 +08:00
Heinrich SchuchardtandLeo Yu-Chi Liang 6b0520c939 cmd: sbi: add support for Debug Trigger Extension
Detect and show if the SBI implements the Debug Trigger Extension.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:30 +08:00
Vincent ChenandLeo Yu-Chi Liang 282159ff24 board: sifive: spl: Initialized the PWM setting in the SPL stage
LEDs and multiple fans can be controlled by SPL. This patch ensures
that all fans have been enabled in the SPL stage. In addition, the
LED's color will be set to yellow.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Co-developed-by: Nylon Chen <nylon.chen@sifive.com>
Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Co-developed-by: Zong Li <zong.li@sifve.com>
Signed-off-by: Zong Li <zong.li@sifve.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:24 +08:00
Aurelien JarnoandLeo Yu-Chi Liang cbc45cb596 riscv: qemu: enable booting on a second virtio device
QEMU RISC-V supports multiple virtio devices, but only tries to boot to
the first one. Enable support for a second virtio device, that is useful
for instance to boot on a disk image + an installer. Ideally that should
be made dynamic, but that's a first step.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:15 +08:00
Aurelien JarnoandLeo Yu-Chi Liang 465e7e6d50 board: starfive: handle compatible property in dynamic DT configuration
The difference between the StarFive VisionFive 2 1.2A and 1.3B boards is
handled dynamically by looking at the PCB version in the EEPROM in order
to have a single u-boot version for both versions of the board. While
the "model" property is correctly handled, the "compatible" one is
always the the one of version 1.3b.

This patch add support for dynamically configuring that property.

Fixes: 9b7060bd15 ("riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B")

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:52:07 +08:00
RandolphandLeo Yu-Chi Liang a400ffad02 configs: andes: add the fdt blob copy address for SPL
Add the address to which the FDT blob is to be moved.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:51:03 +08:00
RandolphandLeo Yu-Chi Liang 10c4ab898c spl: riscv: falcon: move fdt blob to specified address
In Falcon Boot mode, the fdt blob should be move to the RAM from
kernel BSS section. To avoid being cleared by BSS initialisation.
SPL_PAYLOAD_ARGS_ADDR is the address where SPL copies.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:51:03 +08:00
RandolphandLeo Yu-Chi Liang 011d07b4d8 doc: falcon: riscv: Falcon Mode boot on RISC-V
Add documentation to introduce the Falcon Mode on RISC-V.
In this mode, the boot sequence is SPL -> OpenSBI -> Linux kernel.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-01-31 16:51:03 +08:00
Tom Rini 28760ce864 Merge tag 'clk-2024.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-clk
Clock changes for v2024.04

This pull has the usual fixes and new (clock-adjacent) drivers. It also has some
cleanups for the clock API; in particular removing the unused rfree callback.

CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/19486
2024-01-30 07:54:28 -05:00
Neil Armstrong 076529725f ARM: meson: stop printing board model after sysinfo update
After the sysinfo update, Model is printed twice, remove
the now duplicate Model print from mach-meson/board-info.

Link: https://lore.kernel.org/r/20240124-u-boot-model-print-fix-v1-1-484960069623@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-01-30 09:35:51 +01:00
Svyatoslav RyhelandSean Anderson a8dc4965f0 clk: clk-gpio: add actual gated clock
Existing gpio-gate-clock driver acts like a simple GPIO switch without any
effect on gated clock. Add actual clock actions into enable/disable ops and
implement get_rate op by passing gated clock if it is enabled.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20240110160956.4476-2-clamor95@gmail.com
[ sorted includes ]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2024-01-29 22:35:34 -05:00
Sean Anderson 0bfbb83055 clk: Document clk_ops return codes and behavior
Currently, clock consumers cannot take any programmatic action based on the
return code of a clock function. This is because there is no
standardization, and generally no way of separating e.g. "there was a major
problem setting the rate for this clock" which usually should not be
recovered from, from "this clock doesn't support setting its rate" or "this
clock doesn't support *this* rate" which could be absolutely fine depending
on the driver.

This commit aims to standardize the acceptable codes which may be returned
from clock operations. In general,

- ENOSYS should be returned when an operation is not supported for a
  particular clock.
- ENOENT may be returned if the clock ID is invalid. However, it is
  encouraged to move any checks to request() to reduce code duplication.
- EINVAL should be returned for logical errors only (such as requesting an
  invalid rate).

Each function has had specific guidance added for when to return each error
code. This is just guidance for now; most of the clock subsystem does not
yet conform to this standard. However, it is expected that new clock
drivers return these error codes.

Additionally, this commit adds expected behavior for each of the clock
operations. I believe these should be mostly straightforward and correspond
to existing behavior. I remember not understanding what the expected
invariants were for several clock functions, so hopefully this should help
out new driver authors. In the future, some of these invariants could be
checked via an optional config option.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-4-seanga2@gmail.com
2024-01-29 22:35:02 -05:00
Sean Anderson c9309f40a6 treewide: Remove clk_free
This function is a no-op. Remove it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
2024-01-29 22:35:02 -05:00
Sean Anderson 82719d3f40 clk: Remove rfree
Nothing uses this function. Remove it. Since clk_free no longer does
anything, just stub it out.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-2-seanga2@gmail.com
2024-01-29 22:35:02 -05:00
Julien MassonandSean Anderson b500447ad6 clk: fix clk_get_rate() always return ulong
When we call clk_get_rate(), we expect to get clock rate value as
ulong.
In that case we should not use log_ret() macro since it use internally
an int.
Otherwise we may return an invalid/truncated clock rate value.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Fixes: 5c5992cb90 ("clk: Add debugging for return values")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/87o7erv9p4.fsf@baylibre.com
2024-01-29 22:34:52 -05:00