Erasing the environment to start from scratch is actually very useful
and "env erase" is the proper way to do it instead of using "env
default -a && env save", so let's enable support for it.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Erasing the environment to start from scratch is actually very useful
and "env erase" is the proper way to do it instead of using "env
default -a && env save", so let's enable support for it.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
ArmSoM-Sige5 adopts the second-generation 8nm high-performance AIOT
platform Rockchip RK3576, with a 6 TOPS computing power NPU and support
for up to 16GB of large memory. It supports 4K video encoding and
decoding, offers rich interfaces including dual gigabit Ethernet ports,
WiFi 6 & BT5, and various video outputs.
Features tested on a ArmSoM Sige5 v1.1:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe NVMe
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the PCIe/USB3/SATA combo PHYs used in the RK3576 SoC.
Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add dummy support for the CLK_REF_PCIEx_PHY clocks to allow probe of the
phy-rockchip-naneng-combphy driver on RK3576.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the USB3.0+DP PHY used in the RK3576 SoC.
Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the USB2.0 PHYs used in the RK3576 SoC.
Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Like Rockchip RK3328, RK3568 and RK3588, the RK3576 also have a single
node to represent the glue and ctrl for USB 3.0.
Use rk_ops as driver data to select correct ctrl node for RK3576 DWC3.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update rk3576-u-boot.dtsi to include OTP in U-Boot pre-reloc phase for
checkboard() to be able to read information about the running SoC model
and variant from OTP and print it during boot:
U-Boot 2025.04 (Apr 22 2025 - 20:43:17 +0000)
Model: Generic RK3576
SoC: RK3576
DRAM: 8 GiB
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Implement checkboard() to print current SoC model used by a board when
U-Boot proper is running.
U-Boot 2025.04 (Apr 22 2025 - 20:43:17 +0000)
Model: Generic RK3576
SoC: RK3576
DRAM: 8 GiB
Information about the SoC model and variant is read from OTP.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a minimal generic RK3576 board that only have eMMC, SDMMC and USB
OTG enabled. This defconfig can be used to boot from eMMC or SD-card on
most RK3576 boards that follow reference board design.
eMMC and SD-card boot tested on:
- ArmSoM CM5
- ArmSoM Sige5
- FriendlyElec NanoPi M5
- Luckfox Omni3576
- Toybrick TB-RK3576D
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use 0x350e as the default USB Product ID for Rockchip RK3576, same PID
being used by the BootROM when the device is in MASKROM mode.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK3576 SoC contains a RKRNG block that can be used to generate
random numbers using the rockchip_rng driver.
Add compatible for RK3576 to support random numbers:
=> rng list
RNG #0 - rng@2a410000
=> rng
00000000: 36 dd ab 98 ec fb fe d1 cf 36 b3 e1 9b 3d 00 90 6........6...=..
00000010: f5 84 de 75 6b 27 48 9e 13 62 12 6c 50 ca 47 1a ...uk'H..b.lP.G.
00000020: b3 4d fc 43 c5 b5 2d be 07 27 03 26 bb 69 61 2a .M.C..-..'.&.ia*
00000030: 6f 70 01 83 4e ce 91 7a 5a 6c 7c 00 43 87 3e c5 op..N..zZl|.C.>.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rockchip usb gadget driver cannot build without platform specific
headers being available. Express that requirement in Kconfig as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This implements checkboard() to print the current SoC model used by a
board, e.g. one of:
SoC: PX30
SoC: PX30S
SoC: PX30K
SoC: RK3326
SoC: RK3326S
when U-Boot proper is running.
The information is read from the OTP and also the DDR_GRF. There's no
public information as far as I know about the layout and stored
information on OTP but this was provided by Rockchip themselves through
their support channel.
The OTP stores the information of whether the SoC is PX30K or something
else. To differentiate between PX30/RK3326 and PX30S/RK3326S, one needs
to read some undocumented bitfield in a DDR_GRF register as done in
vendor kernel,
c.f. https://github.com/armbian/linux-rockchip/blob/rk-6.1-rkr5.1/drivers/soc/rockchip/rockchip-cpuinfo.c#L118-L133.
I do not own a PX30S, nor RK3326/RK3326S so cannot test it works
properly.
Also add the OTP node to the pre-relocation phase of U-Boot proper so
that the SoC variant can be printed when DISPLAY_BOARDINFO is enabled.
This is not required if DISPLAY_BOARDINFO_LATE is enabled because this
happens after relocation. If both are enabled, then the SoC variant will
be printed twice in the boot log, e.g.:
U-Boot 2025.07-rc3-00014-g7cb731574ae6-dirty (May 28 2025 - 13:52:47 +0200)
Model: Theobroma Systems PX30-uQ7 SoM on Haikou devkit
SoC: PX30 <---- due to DISPLAY_BOARDINFO
DRAM: 2 GiB
PMIC: RK809 (on=0x40, off=0x00)
Core: 293 devices, 27 uclasses, devicetree: separate
MMC: mmc@ff370000: 1, mmc@ff390000: 0
Loading Environment from MMC... Reading from MMC(1)... OK
In: serial@ff030000
Out: serial@ff030000
Err: serial@ff030000
Model: Theobroma Systems PX30-uQ7 SoM on Haikou devkit
SoC: PX30 <----- due to DISPLAY_BOARDINFO_LATE
Net: eth0: ethernet@ff360000
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Fix NULL pointer dereference that happen when rockchip-inno-usb2 clock
enabled before device probe. This early clock enable call happen in process
of parent clock activation added in ac30d90f33.
Fixes: 229218373c ("phy: rockchip-inno-usb2: Add support for clkout_ctl_phy").
Fixes: ac30d90f33 ("clk: Ensure the parent clocks are enabled while reparenting")
Co-authored-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Alex Shumsky <alexthreed@gmail.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The call to cdns3_gadget_ep_free_request will free priv_req so do the
call to list_del_init which accesses the memory pointed to by priv_req
before the free.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
The existing compatible name for U-Boot's k3 system controller driver
i.e "ti,am625-system-controller" has been added to linux[1] device-tree.
This compatible in kernel is meant for configuring the Control Module
registers (CTRL_MMR0).
However in U-Boot, the matching driver was being used to load the system
firmware on the secure M-cores by the R5 SPL and therefore must be
updated to a different compatible to avoid conflicts.
Therefore, this patch renames all references of the compatible to
"ti,am654-tisci-rproc-r5". The "-r5" is appended so as to avoid any
future conflicts since r5 specific compatibles should only be useful for
U-Boot.
[1]: 5959618631fe ("dt-bindings: mfd: ti,j721e-system-controller: Add compatible string for AM654")
https://lore.kernel.org/r/20250421214620.3770172-2-afd@ti.com
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Add rauc to bootmeths variable if BOOTMETH_RAUC is enabled.
This is setting a proper default for RAUC enabled systems.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Martin Schwan <m.schwan@phytec.de>
Since the bootmeth "rauc" is not a global boot method, do not select the
corresponding BOOTMETH_GLOBAL option.
Signed-off-by: Martin Schwan <m.schwan@phytec.de>
Initially, only one STM32MP25 based board was available, the
stm32mp257f-ev1 board which was set by default in stm32mp25_defconfig.
Since commit 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
we inherited of a second MP25 based board which is the stm32mp257f-dk board.
Enable OF_UPSTREAM_BUILD_VENDOR and set OF_UPSTREAM_VENDOR to allow all
STMicroelectronics DT compilation.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Avoid unlimited while loop by adding a timeout. The timeout is
calculated based on a minimal throughput of 256 KB/s.
The timeout is set at least to 2 seconds.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
File system such as YAFFS2 need to know the number of available
OOB bytes per page to be able to choose if they should locate their
metadata in the data area or in the spare area.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In zynqmp_pinconf_set if param is PIN_CFG_IOSTANDARD or
PIN_CONFIG_POWER_SOURCE and zynqmp_pm_pinctrl_get_config returns an
error then value will not be assigned to when its value is tested to be
not equal to arg. Add code to only test value not equal to arg if ret is
false.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Link: https://lore.kernel.org/r/20250807-pinctrl_misc-v1-4-eeb564a1b032@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
Use GUSBCFG_FORCEHOSTMODE to detected the HOST forced mode as it is done
in the Linux driver drivers/usb/dwc2/core.c:dwc2_core_reset().
The host polling must be executed only if the current mode is host,
either due to the force HOST mode (which persists after core reset)
or the connector id pin.
The GUSBCFG_FORCEDEVMODE bits is used to force the device mode (for
example used on STM32MP1x platform) and when it is activated the DWC2 reset
failed with the trace:
"dwc2_core_reset: Waiting for GINTSTS_CURMODE_HOST timeout"
Fixes: c5d685b899 ("usb: dwc2: Unify flush and reset logic with v4.20a support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Junhui Liu <junhui.liu@pigmoral.tech>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
When the usb node is defined dr_mode="otg" ehci_usb_phy_mode() is called
to determine the mode from status registers.
The IMX95RM does not currently define the USBNC STATUS register but it is
assumed to be an omission as the first three registers are defined.
It has been expirimentally verified that the USBNC_PHY_STATUS register
at offset 0x23C bit4 (USBNC_PHYSTATUS_ID_DIG) reads 0 when USB_ID is GND
and 1 when floating.
Use is_imx9() as this driver works for i.MX91, i.MX93 and i.MX95 and all
of these determine the role based on the USBNC_PHY_STATUS register.
Fixes: 801b5fafd3 "(usb: ehci-mx6: Add i.MX95 support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add initial support for i.MX95 USB.30 PHY, which is similar to
the i.MX8MQ and i.MX8MP USB PHY.
The i.MX95 USB3 PHY has a Type-C Assist block (TCA) consisting of two
functional blocks (XBar assist and VBus assist) and is documented
in the i.MX95 RM Chapter 163.3.8 Type-C assist (TCA) block.
Instead of relying on an external MUX for Type-C plug orientation the
XBar can handle the flip internally.
Add initial support for i.MX95 by:
- allowing the driver to be enabled i.MX95
- resetting the XBar
- configuring the TCA in System Configuration mode (which was determined
to be necessary to enable the PHY in device-mode)
Follow-on support will need to be added to steer the XBar based on
either board design (if only one pair is brought out) or if used with a
Type-C controller.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Alice Guo <alice.guo@nxp.com>
Quentin SchulzandKever Yang
Jonas KarlmanandKever Yang
Jon LinandKever Yang
Frank WangandKever Yang
Tom RiniandKever Yang
Da XueandKever Yang
Chris MorganandKever Yang
Andrew GoodbodyandMarek Vasut
Anshul DalalandTom Rini
Wadim EgorovandTom Rini
Martin SchwanandTom Rini
Patrice Chotard
Christophe KerelloandPatrice Chotard
Venkatesh Yadav AbbarapuandMichal Simek
Alexander DahlandMichal Simek
Frank BöwinglohandMichal Simek
Patrick DelaunayandMarek Vasut
Tim HarveyandMarek Vasut