Commit Graph
104210 Commits
Author SHA1 Message Date
David LechnerandHeinrich Schuchardt 2632deee5f doc/buildman: fix missing :: on examples
Fix 4 instances in buildman.rst where examples were missing :: for
proper formatting. Three cases just had a single : and in one case,
: didn't make grammatical sense, so it gets a stand-alone :: along
with fixing the indent.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-27 10:52:43 +01:00
Aristo ChenandHeinrich Schuchardt 4bcac9511c doc: pstore: fix typo
Use "parameters have been set" and "they need" for correct grammar
in the pstore documentation.

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
2026-03-27 10:51:47 +01:00
Daniel GolleandHeinrich Schuchardt 72cc446490 treewide: fix uImage.FIT document paths
Commit 488445cefa ("doc: Move FIT into its own directory") moved the
documentation in doc/uImage.FIT to doc/usage/fit, subsequently all
documents and example sources have been converted to reStructuredText.

Fix (almost) all of the remaining occurrences of the old path and
filenames across the tree.

The exception is doc/uImage.FIT/command_syntax_extensions.txt which
apparently has been removed entirely, or at least I was unable to
locate where that document is now.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2026-03-27 10:50:29 +01:00
Tom Rini c24a72c35a Merge tag 'rpi-2026.04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2026.04-rc5:

- rpi: Update the naming for bcm2712 SoC RevD naming
- arm: bcm: Include missing errno.h
2026-03-26 09:02:05 -06:00
Peter Robinson 4e64ea8858 rpi: Update the naming for bcm2712 SoC RevD naming
The downstream Raspberry Pi uses two namings for the revD
SoC device trees, both bcm2712d0-rpi-5-b and bcm2712-d-rpi-5-b
but it seems upstream has settled on just the later, so lets
use that as it's the name that maps both upstream and downstream.

Fixes: c15a791972 ("board/raspberrypi: add bcm2712d0-rpi-5-b for Raspberry Pi 5")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2026-03-26 08:29:48 +00:00
Marek VasutandPeter Robinson b04e4b19d4 arm: bcm: Include missing errno.h
The msg.c file uses EIO macro defined in errno.h , include errno.h
to avoid build failure:

"
arch/arm/mach-bcm283x/msg.c: In function 'bcm2835_power_on_module':
arch/arm/mach-bcm283x/msg.c:73:25: error: 'EIO' undeclared (first use in this function)
   73 |                 return -EIO;
      |                         ^~~
"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-03-26 08:29:18 +00:00
Tom Rini 075bd023c7 Merge tag 'qcom-fixes-24Mar2026' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
- Assorted Qualcomm platform fixes
2026-03-24 09:15:03 -06:00
Casey Connolly 1cf505e51b watchdog: qcom: stop watchdog by default
Prevent the Qualcomm watchdog from autostarting and ensure it's stopped
when the driver probed. In some cases the watchdog is left running by
a previous bootloader stage. Disable autostart so it isn't left running
when we boot into the OS, this behaviour can be changed by enabling
autostart in the board defconfig.

Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20260121003659.69305-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-03-24 11:51:52 +01:00
Casey Connolly 4577a672ec qcom: rpmh: don't error for SLEEP requests
Just stub out non-active votes, if we return an error the caller may
propagate it and not send its active vote. Since we don't suspend
there's no risk of us entering a broken state due to missing votes.

Link: https://patch.msgid.link/20260320-casey-qcom-rpmh-serial-fixes-v1-2-b81d05832eec@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-03-24 11:49:17 +01:00
Casey Connolly 7f09aff399 serial: msm-geni: allow invalid clock
Pre-relocation we may not have a clock but it's usually been enabled for
us already, or worst case we will enable it after relocation. Erroring
out in this case will almost always cause U-Boot to hang pre-relocation
which is undesirable and may be hard to debug.

Link: https://patch.msgid.link/20260320-casey-qcom-rpmh-serial-fixes-v1-1-b81d05832eec@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-03-24 11:49:17 +01:00
Tom RiniandCasey Connolly bb5012fb66 power: regulator: qcom: Correct dependenecies for DM_REGULATOR_QCOM_USB_VBUS
The DM_REGULATOR_QCOM_USB_VBUS functionality can only work with DM_PMIC
enabled as well, so express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Link: https://patch.msgid.link/20260323195302.2363577-1-trini@konsulko.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-03-24 11:42:19 +01:00
Balaji SelvanathanandCasey Connolly 0f265c20a5 phy: qcom: qusb2: Add QCS615 QUSB2 PHY support
Add support for QCS615 QUSB2 PHY by introducing platform-specific
initialization table and register layout. The implementation reuses
the IPQ6018 register layout and defines QCS615-specific tuning
parameters for proper USB PHY operation.

Taken from Linux commit 8adbf20e0502 ("phy: qcom-qusb2: Add support for QCS615")

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260213-talos_usb-v1-3-4c4355d61437@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-03-24 11:35:06 +01:00
Balaji SelvanathanandCasey Connolly c4169dfa1d clk: qcom: qcs615: Add GCC_AHB2PHY_WEST_CLK clock support
Add GCC_AHB2PHY_WEST_CLK gate clock definition to the QCS615
clock driver. This clock is required for proper PHY operation
and eliminates clock-related warnings during USB initialization.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260213-talos_usb-v1-2-4c4355d61437@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-03-24 11:34:58 +01:00
Balaji SelvanathanandCasey Connolly c4f40d0925 clk: qcom: qcs615: Add GCC_USB3_PRIM_CLKREF_CLK support
Add support for GCC_USB3_PRIM_CLKREF_CLK to the QCS615 clock driver.
This clock is referenced in the device tree USB node but was not
implemented in U-Boot, causing "Clock 152 not found" warnings during
fastboot run.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260213-talos_usb-v1-1-4c4355d61437@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-03-24 11:34:58 +01:00
Tom Rini eb95914b9f Prepare v2026.04-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-23 14:19:17 -06:00
Tom Rini e21ac93091 Merge tag 'fsl-qoriq-for-2026.04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29615

- Fix SPI flash clock for ls102xa
2026-03-23 08:03:17 -06:00
Tom Rini f09e500f6d serial: Enable SYS_NS16550 on incorrectly migrated platforms
With the migration to DM_SERIAL in commit 191b10ac70 ("PowerPC /
Layerscape: Finish migration to DM_SERIAL") a number of platforms were
incorrectly migrated and did not enable SYS_NS16550 despite previously
having enabled the non-DM NS16650 serial driver. Enable these now.

Fixes: 191b10ac70 ("PowerPC / Layerscape: Finish migration to DM_SERIAL")
Reported-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-23 08:02:08 -06:00
Michael WalleandPeng Fan 1f305f99d2 armv7: ls102xa: fix SPI flash clock
Commit bb6f3c0f76 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value")
broke the SPI boot on the LS1021ATSN board (ls1021atsn_qspi_defconfig)
at least.

The commit message reads
   Update SCFG_QSPI_CLKSEL value : 0xC -> 0x5
   which means ClusterPLL/16

The original submitted patch had the following description:
   Value 0xC is reserved. Replace it with correct value 0x5 which
   is ClusterPLL/16

Unfortunatly, the little information which was there, was stripped even
further. Why is 0x5 the "correct" value? In fact, it seems that the
upper bit is just ignored and thus the value 0xC translates to 0x4 which
is ClusterPLL/20. This, will result in a SPI clock of 60MHz (if the PLL
is clocked at 1.2GHz). But even that is too much for the (default) 03h
read opcode (max 50MHz). Set the value to ClusterPLL/24 which is 50MHz.

Link: https://lore.kernel.org/r/1568804284-25162-1-git-send-email-kuldeep.singh@nxp.com/
Fixes: bb6f3c0f76 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 14:27:24 +08:00
Michael WalleandPeng Fan a5e46ecc35 configs: ls1021atsn: enable serial driver
Switching to DM_SERIAL disabled any serial driver. Re-enable it again.

Fixes: 191b10ac70 ("PowerPC / Layerscape: Finish migration to DM_SERIAL")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 14:27:23 +08:00
Michael WalleandPeng Fan 6dad9838d3 arm: dts: ls1021a-tsn: add default serial output
Since switching to DM_SERIAL 'stdout-path' seems to be necessary.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 14:27:23 +08:00
Tom Rini a22e9e1b8e tests: FIT: Add "clone" image attack image test
Related to the problem resolved with commit 2092322b31 ("boot: Add
fit_config_get_hash_list() to build signed node list"), add a testcase
for the problem as well.

Reported-by: Apple Security Engineering and Architecture (SEAR)
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-22 19:47:05 -06:00
Tom Rini 33756fd4a8 Merge tag 'mediatek-for-master-2026-03-17' of https://source.denx.de/u-boot/custodians/u-boot-mediatek
* A fix for mt7622 infracfg and pericfg clocks that were unusable.
2026-03-18 11:07:18 -06:00
Tom Rini e6e3383f5b Merge patch series "update MAINTAINERS for PWM LED"
Quentin Schulz <foss+uboot@0leil.net> says:

The entry is named LED while it only matches PWM LED binding and driver,
so rename it to PWM LED.

Ivan's email is bouncing, so mark the PWM LED entry as orphaned.

Link: https://lore.kernel.org/r/20260303-pwm-led-orphan-v1-0-54d14a430cb7@cherry.de
2026-03-18 11:06:15 -06:00
Quentin SchulzandTom Rini b28b77caac MAINTAINERS: make PWM LED orphan
Ivan's mail is bouncing, so update the entry status.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 11:06:10 -06:00
Quentin SchulzandTom Rini a5533e7417 MAINTAINERS: rename LED into PWM LED
It clearly only lists PWM LED driver and bindings so we should have the
entry reflect that.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 11:06:10 -06:00
Kunihiko HayashiandTom Rini eeca6ed86f image-fit: Fix mismatched parameter type in comment
The functions use 'ulong', however, the comments said 'uint32_t'.
Update the comments to match the prototype.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 11:05:57 -06:00
Daniel GolleandDavid Lechner 52d84fccfd clk: mediatek: mt7622: fix infracfg and pericfg clock operations
The MT7622 infracfg and pericfg drivers both use
mtk_common_clk_infrasys_init() for probe, which populates struct
mtk_clk_priv and stores gate definitions in the clk_tree. However,
both drivers were incorrectly wired to mtk_clk_gate_ops which expects
struct mtk_cg_priv with separately populated gates/num_gates/gates_offs
fields from mtk_common_clk_gate_init().

Since those fields were never set, any attempt to enable an infracfg or
pericfg gate clock (e.g. CLK_INFRA_TRNG) would fail with -EINVAL.

Switch both to mtk_clk_infrasys_ops and struct mtk_clk_priv to match
the init function.

Fixes: 72ab603b20 ("clk: mediatek: add driver for MT7622")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 13:51:45 -05:00
Tom Rini eefb822fb5 Merge tag 'rpi-2026.04-rc4' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2026.04-rc4:

- board/raspberrypi: add bcm2712d0-rpi-5-b for Raspberry Pi 5
- board/raspberrypi: add multi-FDT support
- rpi: pass the Video Core logs DT parameter through
- pinctrl: bcm283x: Fix GPIO pull state register values for BCM2711
2026-03-12 16:10:46 -06:00
Filip KokosińskiandPeter Robinson c15a791972 board/raspberrypi: add bcm2712d0-rpi-5-b for Raspberry Pi 5
This commit adds an FDT entry for the d0 stepping of the BCM2712 SoC.
This entry is used by the v1.1 revision of the board
(revision & 0x0f == 1).

Signed-off-by: Filip Kokosiński <filip.kokosinski@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2026-03-12 12:11:24 +00:00
Filip KokosińskiandPeter Robinson e263f901c1 board/raspberrypi: add multi-FDT support
This patch adds support for multiple FDT files per board model. This is
done by adding the FDTFILES macro, which initializes two rpi_model
struct members: fdtfiles and fdtcount.

The new-style revision codes designate LSB bits as board revision; this
value is used to choose between provided FDTs. The first element of the
fdtfiles list is used should no revision match.

Signed-off-by: Filip Kokosiński <filip.kokosinski@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2026-03-12 12:11:24 +00:00
Peter Robinson 7d5d8400fa rpi: pass the Video Core logs DT parameter through
Pass the VC logs DT parameter through to the kernel
device tree. This is used by the vclog tool and is
a useful debugging tool.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Matthias Brugger <mbrugger@suse.com>
2026-03-12 12:02:59 +00:00
Cibil PankirasandPeter Robinson 5fa0237c83 pinctrl: bcm283x: Fix GPIO pull state register values for BCM2711
BCM2711 has different pull-up/down register values compared to BCM2835

- BCM2835: NONE=0, DOWN=1, UP=2
- BCM2711: NONE=0, UP=1, DOWN=2

This patch fixes the pull state register values for BCM2711.

Fixes: 2c39d975f8 ("pinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711")
Signed-off-by: Cibil Pankiras <cibil.pankiras@egym.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2026-03-12 12:02:21 +00:00
Ilias ApalodimasandTom Rini 4cbb1c4d99 kbuild: fix cross_tools compilation
Frieder reports that after the kbuild sync running
make tools-only_defconfig
make cross_tools
fails with

UPD     include/generated/timestamp_autogenerated.h
PYMOD   rebuild
tools/Makefile:359: *** insufficient number of arguments (1) to function
'filter'.  Stop.
make: *** [Makefile:2191: tools] Error 2

After the sync 'hostprogs-always-y' contains the complete list of
the tools we need to strip, so the $(filter) command is not needed.

Fixes: bd3f9ee679 ("kbuild: Bump the build system to 6.1")
Reported-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2026-03-10 15:06:55 -06:00
Tom Rini ba7bf918da Prepare v2026.04-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-09 13:52:04 -06:00
Simon GlassandTom Rini 2092322b31 boot: Add fit_config_get_hash_list() to build signed node list
The hashed-nodes property in a FIT signature node lists which FDT paths
are included in the signature hash. It is intended as a hint so should
not be used for verification.

Add a function to build the node list from scratch by iterating the
configuration's image references. Skip properties known not to be image
references. For each image, collect the path plus all hash and cipher
subnodes.

Use the new function in fit_config_check_sig() instead of reading
'hashed-nodes'.

Update the test_vboot kernel@ test case: fit_check_sign now catches the
attack at signature-verification time (the @-suffixed node is hashed
instead of the real one, causing a mismatch) rather than at
fit_check_format() time.

Update the docs to cover this. The FIT spec can be updated separately.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Closes: https://lore.kernel.org/u-boot/20260302220937.3682128-1-trini@konsulko.com/
Reported-by: Apple Security Engineering and Architecture (SEAR)
Tested-by: Tom Rini <trini@konsulko.com>
2026-03-09 09:49:50 -06:00
Tom Rini 532a4804e9 Merge patch series "64-bit PCIe for AM64, AM69, J7200, J722S and J784S4"
Siddharth Vadapalli <s-vadapalli@ti.com> says:

Since Linux device-tree has switched to 64-bit Address space for the
PCIe Controllers on TI SoCs, currently, U-Boot needs to support the
same. This series adds support for 64-bit addressing for PCIe along with
enabling Root-Complex mode of operation for AM69 and J784S4 SoCs.

Series has been tested on all platforms being affected by this series.
Test Logs:
1. AM642-EVM
https://gist.github.com/Siddharth-Vadapalli-at-TI/82512389f8396a51e4f167c7ebe4c2a3
2. AM69-SK
https://gist.github.com/Siddharth-Vadapalli-at-TI/b20b2811804ffc6e6c063564330c0a35
3. J7200-EVM
https://gist.github.com/Siddharth-Vadapalli-at-TI/c545da68bd28a5e036803bb60f32d8e9
4. J722S-EVM
https://gist.github.com/Siddharth-Vadapalli-at-TI/3dde05c4c7076076aa20ac47a6e2d176
5. J784S4-EVM
https://gist.github.com/Siddharth-Vadapalli-at-TI/a93c1b2cd5d90f494e885d1831d3d23e

Link: https://lore.kernel.org/r/20260227115841.333073-1-s-vadapalli@ti.com
2026-03-09 09:35:51 -06:00
Siddharth VadapalliandTom Rini f0bb3940b1 configs: j722s_evm_a53_defconfig: enable 64-bit addressing for PCIe
The PCIe0 instance of PCIe on the J722S SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:50 -06:00
Siddharth VadapalliandTom Rini b04d709459 configs: j7200_evm_a72_defconfig: enable 64-bit addressing for PCIe
The PCIe1 instance of PCIe on the J7200 SoC uses the 4 GB Address Window
starting from 0x41_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:49 -06:00
Siddharth VadapalliandTom Rini 430874ce20 configs: am64x_evm_a53_defconfig: enable 64-bit addressing for PCIe
The PCIe0 instance of PCIe on the AM64x SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:47 -06:00
Siddharth VadapalliandTom Rini 724952ac41 configs: {am69_sk, j784s4_evm}_a72_defconfig: enable PCIe Root-Complex mode
The PCIe Controllers on the J784S4 and AM69 SoCs support Root-Complex
mode of operation. PCIe0 instance of PCIe on both of the SoCs is brought
out on the Starter-Kit (AM69) and EVM (J784S4) boards. Hence, enable
the configs required for Root-Complex mode of operation.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:46 -06:00
Siddharth VadapalliandTom Rini 068d05ad5f pci: pcie_cdns_ti: enable PCIe root-complex mode for J784S4 SoC
The PCIe Controllers on the J784S4 SoC support Root-Complex mode of
operation. Hence, enable it.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:43 -06:00
Siddharth VadapalliandTom Rini d62f1c98c5 arm: mach-k3: arm64-mmu: add mapping for PCIe 4 GB Address Windows
The PCIe Controllers in the K3 SoCs have 4 GB Address Windows in the
64-bit address space to map System (CPU) Addresses to PCIe Bus Addresses.
The physical addresses for these Address Windows across PCIe instances
across SoCs is as follows:

+--------+----------------+----------------+----------------+----------------+
| SoC    | PCIe0          | PCIe1          | PCIe2          | PCIe3          |
+--------+----------------+----------------+----------------+----------------+
| AM64   | 0x6_0000_0000  | NA             | NA             | NA             |
| J722S  | 0x6_0000_0000  | NA             | NA             | NA             |
| AM68   | NA             | 0x41_0000_0000 | NA             | NA             |
| J7200  | NA             | 0x41_0000_0000 | NA             | NA             |
| J721S2 | NA             | 0x41_0000_0000 | NA             | NA             |
| J742S2 | 0x40_0000_0000 | 0x41_0000_0000 | NA             | NA             |
| AM69   | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 |
| J721E  | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 |
| J784S4 | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 |
+--------+----------------+----------------+----------------+----------------+

Two regions for a 1:1 mapping from virtual addresses to physical addresses
catering to all of the above will be required, which are:
1. For AM64 and J722S SoCs
=> Start: 0x6_0000_0000 Size: 0x1_0000_0000
2. For AM68, AM69, J7200, J721E, J721S2, J742S2 and J784S4 SoCs
=> Start: 0x40_0000_0000 Size: 0x4_0000_0000

Since the 'Flash Peripherals' region from 0x5_0000_0000 to 0x8_7FFF_FFFF
includes the mapping for AM64 and J722S SoCs, only the second region
mentioned above needs to be added.

Hence, add the region to support 64-bit address space for PCIe.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:18 -06:00
Takahiro KuwanoandTom Rini 8ee2e262d1 MAINTAINERS: update SPI NOR reviewer
Tudor Ambarus will step down as SPI NOR reviewer.
I would like to take this role.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2026-03-09 08:51:36 -06:00
Raphael Gallais-PouandTom Rini 0b429f7c6b video: stm32: dsi: add .of_to_plat callback
Drivers should extract device-tree data before probing via the
.of_to_plat hook.

Implement it for stm32_dsi driver.  By doing so, it also solve a
variable shadowing in stm32_dsi_probe() where &clk was used as
peripheral clock and ref clock.

For readability some struct have been renamed such as:

  * struct stm32_dsi_priv *dsi -> struct stm32_dsi_priv *priv
  * struct clk clk -> struct clk pclk

Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2026-03-09 08:51:05 -06:00
Tom Rini b26cc03b7c Merge patch series "MAINTAINERS: Update ADI ADSP platform maintainers"
Philip Molloy <philip@philipmolloy.com> says:

This series updates the maintainers for the ADI ADSP platform. It
follows Greg's series adding support for ADI ADSP SoCs.

Timesys spent years developing and maintaining Linux support for ADI
ADSP SoCs. The maintenance contract has ended and ADI has brought that
effort in-house. Additionally, Timesys was acquired by another company.

Thanks to everyone at Timesys for all of their hard work over the years!

Link: https://lore.kernel.org/r/20260226111136.354009-1-philip@philipmolloy.com
2026-03-04 14:25:30 -06:00
Philip MolloyandTom Rini 15e2bacc30 treewide: Remove Timesys from ADI ADSP maintenance
After years of developing the ADI ADSP platform, Timesys was purchased
by another company and is no longer contracted to maintain the platform.

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Reviewed-by: Greg Malysa <malysagreg@gmail.com>
2026-03-04 14:25:27 -06:00
Philip MolloyandTom Rini bdc5f6531a MAINTAINERS: Update ARM SC5xx
After years of developing the ADI ADSP platform, Timesys was purchased
by another company and is no longer contracted to maintain the platform.

Utsav is leaving ADI after contributing to ADSP SoCs for the last 3
years. He is a founding member of the in-house team supporting the
chips.

Linux support at ADI has been consolidated. Use the company-wide mailing
list and git repository.

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Reviewed-by: Greg Malysa <malysagreg@gmail.com>
2026-03-04 14:25:27 -06:00
Daniel GolleandTom Rini 35d9b9c70e tools/atmelimage: add const qualifier to fix compiler warning
More strict checks in GCC 15 expose a new warning:
tools/atmelimage.c: In function ‘atmel_find_pmecc_parameter_in_token’:
tools/atmelimage.c:64:31: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers]
64 |                         param = strstr(token, "=");
   |                               ^
cc1: all warnings being treated as errors

Add 'const' qualifier to variable 'param' to prevent build failing
due to -Werror.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2026-03-04 14:25:18 -06:00
Tom Rini 024a0e9125 Merge tag 'u-boot-ufs-20260304' of https://source.denx.de/u-boot/custodians/u-boot-ufs
A few fixes/missing changes for UFS:
- remove unused ufs_post_bind() declaration
- Disable UTP command timeout in slow mode
- Missing MediaTek UFS PHY Driver to be used with the UFS driver
2026-03-04 14:24:59 -06:00
Tom Rini 3e91c6a36a Revert "kbuild: unexport sub_make_done to fix child make invocations"
This unfortunately introduces failure to build in other cases:
$ make ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- O=build \
	microchip_mpfs_generic_defconfig
  GEN     Makefile
#
# configuration written to .config
#
$ make ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- O=build
  HOSTCC  scripts/basic/fixdep
  GEN     Makefile
  HOSTCC  scripts/kconfig/conf.o
  YACC    scripts/kconfig/zconf.tab.[ch]
  LEX     scripts/kconfig/zconf.lex.c
  HOSTCC  scripts/kconfig/zconf.tab.o
  HOSTLD  scripts/kconfig/conf
scripts/kconfig/conf  --syncconfig Kconfig
***
*** Configuration file ".config" not found!
***
*** Please run some configurator (e.g. "make oldconfig" or
*** "make menuconfig" or "make xconfig").
***
make[4]: *** [/stuff/u-boot/scripts/kconfig/Makefile:75: syncconfig] Error 1
make[3]: *** [/stuff/u-boot/Makefile:702: syncconfig] Error 2
make[2]: *** [../Makefile:189: __sub-make] Error 2
make[1]: *** No rule to make target 'include/config/auto.conf', needed by 'include/config/uboot.release'.  Stop.
make: *** [Makefile:189: __sub-make] Error 2

This reverts commit 4284306d22.

Reported-by: Conor Dooley <conor@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-04 11:34:36 -06:00