Commit Graph
104357 Commits
Author SHA1 Message Date
Tom Rini 1e240f7206 Merge tag 'v2026.04-rc4' into next
Prepare v2026.04-rc4
2026-03-09 15:26:34 -06:00
Tom Rini ba7bf918da Prepare v2026.04-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-09 13:52:04 -06:00
Simon GlassandTom Rini 2092322b31 boot: Add fit_config_get_hash_list() to build signed node list
The hashed-nodes property in a FIT signature node lists which FDT paths
are included in the signature hash. It is intended as a hint so should
not be used for verification.

Add a function to build the node list from scratch by iterating the
configuration's image references. Skip properties known not to be image
references. For each image, collect the path plus all hash and cipher
subnodes.

Use the new function in fit_config_check_sig() instead of reading
'hashed-nodes'.

Update the test_vboot kernel@ test case: fit_check_sign now catches the
attack at signature-verification time (the @-suffixed node is hashed
instead of the real one, causing a mismatch) rather than at
fit_check_format() time.

Update the docs to cover this. The FIT spec can be updated separately.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Closes: https://lore.kernel.org/u-boot/20260302220937.3682128-1-trini@konsulko.com/
Reported-by: Apple Security Engineering and Architecture (SEAR)
Tested-by: Tom Rini <trini@konsulko.com>
2026-03-09 09:49:50 -06:00
Tom Rini 532a4804e9 Merge patch series "64-bit PCIe for AM64, AM69, J7200, J722S and J784S4"
Siddharth Vadapalli <s-vadapalli@ti.com> says:

Since Linux device-tree has switched to 64-bit Address space for the
PCIe Controllers on TI SoCs, currently, U-Boot needs to support the
same. This series adds support for 64-bit addressing for PCIe along with
enabling Root-Complex mode of operation for AM69 and J784S4 SoCs.

Series has been tested on all platforms being affected by this series.
Test Logs:
1. AM642-EVM
https://gist.github.com/Siddharth-Vadapalli-at-TI/82512389f8396a51e4f167c7ebe4c2a3
2. AM69-SK
https://gist.github.com/Siddharth-Vadapalli-at-TI/b20b2811804ffc6e6c063564330c0a35
3. J7200-EVM
https://gist.github.com/Siddharth-Vadapalli-at-TI/c545da68bd28a5e036803bb60f32d8e9
4. J722S-EVM
https://gist.github.com/Siddharth-Vadapalli-at-TI/3dde05c4c7076076aa20ac47a6e2d176
5. J784S4-EVM
https://gist.github.com/Siddharth-Vadapalli-at-TI/a93c1b2cd5d90f494e885d1831d3d23e

Link: https://lore.kernel.org/r/20260227115841.333073-1-s-vadapalli@ti.com
2026-03-09 09:35:51 -06:00
Siddharth VadapalliandTom Rini f0bb3940b1 configs: j722s_evm_a53_defconfig: enable 64-bit addressing for PCIe
The PCIe0 instance of PCIe on the J722S SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:50 -06:00
Siddharth VadapalliandTom Rini b04d709459 configs: j7200_evm_a72_defconfig: enable 64-bit addressing for PCIe
The PCIe1 instance of PCIe on the J7200 SoC uses the 4 GB Address Window
starting from 0x41_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:49 -06:00
Siddharth VadapalliandTom Rini 430874ce20 configs: am64x_evm_a53_defconfig: enable 64-bit addressing for PCIe
The PCIe0 instance of PCIe on the AM64x SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:47 -06:00
Siddharth VadapalliandTom Rini 724952ac41 configs: {am69_sk, j784s4_evm}_a72_defconfig: enable PCIe Root-Complex mode
The PCIe Controllers on the J784S4 and AM69 SoCs support Root-Complex
mode of operation. PCIe0 instance of PCIe on both of the SoCs is brought
out on the Starter-Kit (AM69) and EVM (J784S4) boards. Hence, enable
the configs required for Root-Complex mode of operation.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:46 -06:00
Siddharth VadapalliandTom Rini 068d05ad5f pci: pcie_cdns_ti: enable PCIe root-complex mode for J784S4 SoC
The PCIe Controllers on the J784S4 SoC support Root-Complex mode of
operation. Hence, enable it.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:43 -06:00
Siddharth VadapalliandTom Rini d62f1c98c5 arm: mach-k3: arm64-mmu: add mapping for PCIe 4 GB Address Windows
The PCIe Controllers in the K3 SoCs have 4 GB Address Windows in the
64-bit address space to map System (CPU) Addresses to PCIe Bus Addresses.
The physical addresses for these Address Windows across PCIe instances
across SoCs is as follows:

+--------+----------------+----------------+----------------+----------------+
| SoC    | PCIe0          | PCIe1          | PCIe2          | PCIe3          |
+--------+----------------+----------------+----------------+----------------+
| AM64   | 0x6_0000_0000  | NA             | NA             | NA             |
| J722S  | 0x6_0000_0000  | NA             | NA             | NA             |
| AM68   | NA             | 0x41_0000_0000 | NA             | NA             |
| J7200  | NA             | 0x41_0000_0000 | NA             | NA             |
| J721S2 | NA             | 0x41_0000_0000 | NA             | NA             |
| J742S2 | 0x40_0000_0000 | 0x41_0000_0000 | NA             | NA             |
| AM69   | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 |
| J721E  | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 |
| J784S4 | 0x40_0000_0000 | 0x41_0000_0000 | 0x42_0000_0000 | 0x43_0000_0000 |
+--------+----------------+----------------+----------------+----------------+

Two regions for a 1:1 mapping from virtual addresses to physical addresses
catering to all of the above will be required, which are:
1. For AM64 and J722S SoCs
=> Start: 0x6_0000_0000 Size: 0x1_0000_0000
2. For AM68, AM69, J7200, J721E, J721S2, J742S2 and J784S4 SoCs
=> Start: 0x40_0000_0000 Size: 0x4_0000_0000

Since the 'Flash Peripherals' region from 0x5_0000_0000 to 0x8_7FFF_FFFF
includes the mapping for AM64 and J722S SoCs, only the second region
mentioned above needs to be added.

Hence, add the region to support 64-bit address space for PCIe.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Fixes: 79f3e77133 ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09 09:35:18 -06:00
Takahiro KuwanoandTom Rini 8ee2e262d1 MAINTAINERS: update SPI NOR reviewer
Tudor Ambarus will step down as SPI NOR reviewer.
I would like to take this role.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2026-03-09 08:51:36 -06:00
Raphael Gallais-PouandTom Rini 0b429f7c6b video: stm32: dsi: add .of_to_plat callback
Drivers should extract device-tree data before probing via the
.of_to_plat hook.

Implement it for stm32_dsi driver.  By doing so, it also solve a
variable shadowing in stm32_dsi_probe() where &clk was used as
peripheral clock and ref clock.

For readability some struct have been renamed such as:

  * struct stm32_dsi_priv *dsi -> struct stm32_dsi_priv *priv
  * struct clk clk -> struct clk pclk

Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2026-03-09 08:51:05 -06:00
Martin SchwanandTom Rini 36add050ee test: boot: Add test for bootmeth_rauc
Add a simple unit test for testing the RAUC bootmethod. Provide only the
very basic tests for now, running a scan and list, to verify correct
detection of the RAUC bootmethod. More advanced boot tests of this
bootmethod can be added in a separate patch.

This requires another mmc image (mmc10) to contain the following
partitions:

1. boot A: contains a dummy boot.scr
2. root A: contains an empty root filesystem
3. boot B: contains a dummy boot.scr
4. root B: contains an empty root filesystem

The bootmeth_rauc scans all four partitions for existence and expects a
boot script in each boot partition.

Also add BOOTMETH_RAUC as a dependency on sandbox so that we can test
this with:

$ ./test/py/test.py -B sandbox --build -k test_ut # build the mmc10.img
$ ./test/py/test.py -B sandbox --build -k bootflow_rauc

Signed-off-by: Martin Schwan <m.schwan@phytec.de>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
[trini: mmc9 is now in use, switch to mmc10]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-06 12:09:17 -06:00
Ludwig NusselandTom Rini fe6484b402 bootm: fix booting kernel_noload image
FIT images don't work without having to explicitly specify physical
load addresses. Digging into that it looks like a flaw in
bootm_load_os().
It duplicates images->os for convenience. However, the code handling
"kernel_noload" images then updates the load address in the copy with
the value lmb_alloc_mem() returned. Later there's another call to
lmb_alloc_mem() that uses the old value. This leads to havoc due
to subsequent calls of lmb_alloc_mem() picking too low addresses.

The "fix" is to mark the local variable const to avoid accidental
assignments. This works but IMO the logic is still flawed somehow as
this leads to overlapping lmb reservations. I guess the fixed
reservation should only be done when the noload path wasn't hit.

Without the change:
+ bootm 0x40200000#qemu-arm 0x40200000#qemu-arm 0x40000000
   Using 'qemu-arm' configuration
   Verifying Hash Integrity ... OK
   Trying 'kernel' kernel subimage
     Description:  Linux kernel
     Created:      2026-02-24  14:10:09 UTC
     Type:         Kernel Image (no loading done)
     Compression:  gzip compressed
     Data Start:   0x402000b8
     Data Size:    12227440 Bytes = 11.7 MiB
     Hash algo:    sha256
     Hash value:   7ea661fdecdd1127edd419cfbf8bff52e2d5ac55c...
   Verifying Hash Integrity ... sha256+ OK
   Using 'qemu-arm' configuration
   Verifying Hash Integrity ... OK
   Trying 'ramdisk' ramdisk subimage
     Description:  Initial ramdisk
     Created:      2026-02-24  14:10:09 UTC
     Type:         RAMDisk Image
     Compression:  uncompressed
     Data Start:   0x40da9528
     Data Size:    1067114 Bytes = 1 MiB
     Architecture: AArch64
     OS:           Linux
     Load Address: unavailable
     Entry Point:  unavailable
     Hash algo:    sha256
     Hash value:   2a711dcb5f58615187645ccec615c67eddcfbb3138...
   Verifying Hash Integrity ... sha256+ OK
   Booting using the fdt blob at 0x40000000
Working FDT set to 40000000
   Uncompressing Kernel Image (no loading done) to 13a400000
   Loading Ramdisk to 400fb000, end 401ff86a ... OK
device tree - allocation error
FDT creation failed!
resetting ...
Bloblist at 0 not found (err=-2)
alloc space exhausted ptr 400 limit 0
Bloblist at 0 not found (err=-2)
[reset]

After:
+ bootm 0x40200000#qemu-arm 0x40200000#qemu-arm 0x40000000
   Using 'qemu-arm' configuration
   Verifying Hash Integrity ... OK
   Trying 'kernel' kernel subimage
     Description:  Linux kernel
     Created:      2026-02-24  14:10:09 UTC
     Type:         Kernel Image (no loading done)
     Compression:  gzip compressed
     Data Start:   0x402000b8
     Data Size:    12227440 Bytes = 11.7 MiB
     Hash algo:    sha256
     Hash value:   7ea661fdecdd1127edd419cfbf8bff52e2d5ac55ce...
   Verifying Hash Integrity ... sha256+ OK
   Using 'qemu-arm' configuration
   Verifying Hash Integrity ... OK
   Trying 'ramdisk' ramdisk subimage
     Description:  Initial ramdisk
     Created:      2026-02-24  14:10:09 UTC
     Type:         RAMDisk Image
     Compression:  uncompressed
     Data Start:   0x40da9528
     Data Size:    1067114 Bytes = 1 MiB
     Architecture: AArch64
     OS:           Linux
     Load Address: unavailable
     Entry Point:  unavailable
     Hash algo:    sha256
     Hash value:   2a711dcb5f58615187645ccec615c67eddcfbb3138...
   Verifying Hash Integrity ... sha256+ OK
   Booting using the fdt blob at 0x40000000
Working FDT set to 40000000
   Uncompressing Kernel Image (no loading done) to 13a400000
   Loading Ramdisk to 13a2fb000, end 13a3ff86a ... OK
   Loading Device Tree to 000000013a1f8000, end 000000013a2fafff ... OK
Working FDT set to 13a1f8000

Starting kernel ...

Signed-off-by: Ludwig Nussel <ludwig.nussel@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-06 10:33:35 -06:00
Tom Rini 14335ada2f Merge patch series "fw_env: cleanup flash_write_buf()"
Rafał Miłecki <rafal@milecki.pl> says:

I found flash_write_buf() somehow more difficult to follow than needed.
Some code turned out to be inconsistent and some not really needed.

There is a set of 6 patches that should be small enough to make them easy
to review. I was wondering if I should squash patches 5 and 6 but ended up
with sending two smaller diffs.

Those changes shouldn't really change any behaviour (except for smaller mem
alloc). Let me know if there are any issues with this!

Link: https://lore.kernel.org/r/20260221100011.29049-1-zajec5@gmail.com
2026-03-06 10:32:50 -06:00
Rafał MiłeckiandTom Rini 667fa1a1cd fw_env: drop unneeded variables from flash_write_buf()
Recent cleanups made some variables redundant. Both: "blocklen" and
"erase_len" ended up being used as temporary variables used locally in
some short code paths.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-06 10:32:41 -06:00
Rafał MiłeckiandTom Rini ffd8024efc fw_env: move "erasesize" calculation up in a code
Calculate "erasesize" in the same place where other offsets and lengths
/ sizes are calculated. It makes code more consistent and will allow
further cleanups.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2026-03-06 10:32:41 -06:00
Rafał MiłeckiandTom Rini 1d175b2108 fw_env: unify calculation of "blockstart" in flash_write_buf()
In both code paths "blockstart" is calculated the same way. Unify it.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-06 10:32:41 -06:00
Rafał MiłeckiandTom Rini 2f28f4116a fw_env: add ROUND_UP() helper
We already have DIV_ROUND_UP() to simplify code so add ROUND_UP() as
well. This makes code in flash_write_buf() easier to follow.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2026-03-06 10:32:41 -06:00
Rafał MiłeckiandTom Rini d80d88cb87 fw_env: allocate buffer of proper size in flash_write_buf()
When dealing with env data not aligned to flash blocks flash_write_buf()
has to use an extra buffer. It reads existing flash content to it,
modifies required part and writes it back.

While reading and writing a size stored in "write_total" is used. It's
what should be used when allocating the buffer too.

In some cases allocating memory of "erase_len" size could result in
allocating too big buffer. That wouldn't break anything but it was
making code less intuitive.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2026-03-06 10:32:41 -06:00
Rafał MiłeckiandTom Rini 1197954d58 fw_env: use "erasesize" variable in writing loop
Use "erasesize" instead of "blocklen" in flash_write_buf()'s loop. This
change touches code executed for bad NAND blocks so it doesn't affect
any behaviour (for NAND flashes "blocklen" and "erasesize" are equal).

This just makes code a bit more consistent as "erasesize" is what is
used all around inside the writing loop.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2026-03-06 10:32:41 -06:00
Tom Rini 47dabe3b96 Merge branch 'master' of git://source.denx.de/u-boot-usb into next
- Change the address parsing for MUSB and another patch to add
  compatibles for ti,musb-am33xx and bind functions that check the
  dr_mode.
2026-03-06 08:15:44 -06:00
Markus Schneider-Pargmann (TI.com)andTom Rini 4cf2275ee7 usb: musb-new: Add compatibles for ti,musb-am33xx
The upstream devicetree am33xx.dtsi does not have a "ti,am33xx-usb"
compatible, it uses "ti,sysc-omap4" for the same node. The
implementation of ti-musb uses a wrapper driver that binds to
ti,am33xx-usb and creates new devices ti-musb-host and
ti-musb-peripheral depending on the dr_mode property.

To avoid this wrapper driver with the upstream devicetree, add
compatibles for "ti,musb-am33xx" to both ti-musb-host and
ti-musb-peripheral. Add a bind function that checks for the correct
dr_mode value and rejects binding if it is not the correct driver.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
2026-03-06 08:15:43 -06:00
Markus Schneider-Pargmann (TI.com)andTom Rini 9bf19639a7 usb: musb-new: Relative ctrl_mod address parsing
For the upstream DT the ctrl_mod node is using a relative register
address which is not translated by the current code.

Make address parsing understand relative addresses.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
2026-03-06 08:15:43 -06:00
Tom Rini b26cc03b7c Merge patch series "MAINTAINERS: Update ADI ADSP platform maintainers"
Philip Molloy <philip@philipmolloy.com> says:

This series updates the maintainers for the ADI ADSP platform. It
follows Greg's series adding support for ADI ADSP SoCs.

Timesys spent years developing and maintaining Linux support for ADI
ADSP SoCs. The maintenance contract has ended and ADI has brought that
effort in-house. Additionally, Timesys was acquired by another company.

Thanks to everyone at Timesys for all of their hard work over the years!

Link: https://lore.kernel.org/r/20260226111136.354009-1-philip@philipmolloy.com
2026-03-04 14:25:30 -06:00
Philip MolloyandTom Rini 15e2bacc30 treewide: Remove Timesys from ADI ADSP maintenance
After years of developing the ADI ADSP platform, Timesys was purchased
by another company and is no longer contracted to maintain the platform.

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Reviewed-by: Greg Malysa <malysagreg@gmail.com>
2026-03-04 14:25:27 -06:00
Philip MolloyandTom Rini bdc5f6531a MAINTAINERS: Update ARM SC5xx
After years of developing the ADI ADSP platform, Timesys was purchased
by another company and is no longer contracted to maintain the platform.

Utsav is leaving ADI after contributing to ADSP SoCs for the last 3
years. He is a founding member of the in-house team supporting the
chips.

Linux support at ADI has been consolidated. Use the company-wide mailing
list and git repository.

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Reviewed-by: Greg Malysa <malysagreg@gmail.com>
2026-03-04 14:25:27 -06:00
Daniel GolleandTom Rini 35d9b9c70e tools/atmelimage: add const qualifier to fix compiler warning
More strict checks in GCC 15 expose a new warning:
tools/atmelimage.c: In function ‘atmel_find_pmecc_parameter_in_token’:
tools/atmelimage.c:64:31: error: assignment discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers]
64 |                         param = strstr(token, "=");
   |                               ^
cc1: all warnings being treated as errors

Add 'const' qualifier to variable 'param' to prevent build failing
due to -Werror.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2026-03-04 14:25:18 -06:00
Tom Rini 024a0e9125 Merge tag 'u-boot-ufs-20260304' of https://source.denx.de/u-boot/custodians/u-boot-ufs
A few fixes/missing changes for UFS:
- remove unused ufs_post_bind() declaration
- Disable UTP command timeout in slow mode
- Missing MediaTek UFS PHY Driver to be used with the UFS driver
2026-03-04 14:24:59 -06:00
Tom Rini 3e91c6a36a Revert "kbuild: unexport sub_make_done to fix child make invocations"
This unfortunately introduces failure to build in other cases:
$ make ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- O=build \
	microchip_mpfs_generic_defconfig
  GEN     Makefile
#
# configuration written to .config
#
$ make ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- O=build
  HOSTCC  scripts/basic/fixdep
  GEN     Makefile
  HOSTCC  scripts/kconfig/conf.o
  YACC    scripts/kconfig/zconf.tab.[ch]
  LEX     scripts/kconfig/zconf.lex.c
  HOSTCC  scripts/kconfig/zconf.tab.o
  HOSTLD  scripts/kconfig/conf
scripts/kconfig/conf  --syncconfig Kconfig
***
*** Configuration file ".config" not found!
***
*** Please run some configurator (e.g. "make oldconfig" or
*** "make menuconfig" or "make xconfig").
***
make[4]: *** [/stuff/u-boot/scripts/kconfig/Makefile:75: syncconfig] Error 1
make[3]: *** [/stuff/u-boot/Makefile:702: syncconfig] Error 2
make[2]: *** [../Makefile:189: __sub-make] Error 2
make[1]: *** No rule to make target 'include/config/auto.conf', needed by 'include/config/uboot.release'.  Stop.
make: *** [Makefile:189: __sub-make] Error 2

This reverts commit 4284306d22.

Reported-by: Conor Dooley <conor@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-03-04 11:34:36 -06:00
Tom Rini b1f5666706 Merge tag 'u-boot-dfu-next-20260303' of https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-20260303

CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/29417

Fastboot:
* mmc: make boot partition offset configurable for bootloader offsets
* arch: imx8qxp: Override weak fb_mmc_get_boot_offset
2026-03-03 12:56:37 -06:00
Marek VasutandTom Rini f473a453b0 kbuild: Drop phandle from diff between base DT and U-Boot augmented DT if DEVICE_TREE_DEBUG=1
Remove the "phandle = <0x..>;" properties from the DT diff between
unpatched base DT and U-Boot augmented DT if DEVICE_TREE_DEBUG=1.
The phandle numbers are only generated by DTC, but not referenced
anywhere in the DT, because the original references are specifically
not replaced by phandle numbers when recent DTC is invoked with the
-I dts -O dts flags . The phandle number are therefore only a noise
in the diff, filter them out.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-03 10:34:57 -06:00
Simon GlassandTom Rini 4284306d22 kbuild: unexport sub_make_done to fix child make invocations
The exported sub_make_done variable leaks into the environment of all
child processes. When make targets like tcheck spawn independent make
invocations with O=, those child makes inherit sub_make_done=1, skip
the KBUILD_OUTPUT setup and try to build in the source tree.

There is a workaround that resets sub_make_done to 0 for specific test
targets, but this isn't great since it has tolist every target that
spawns independent make invocations.

Instead, unexport sub_make_done once we are in the final make
invocation. The direct sub-make already has the value in its
environment from the export, and no further propagation is needed.
This also allows the per-target workaround to be removed.

Fixes: 27529f1cb0 ("kbuild: skip parsing pre sub-make code for recursion")
Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-03 10:34:54 -06:00
Simon GlassandTom Rini 8353239dab menu: Move shortcut-key handling to bootmenu_loop()
The bootmenu_conv_key() function is shared with expo subsystem for key
input. Adding alphanumeric-to-BKEY_SHORTCUT conversion there causes expo
to swallow typed characters instead of inserting them as text, since
BKEY_SHORTCUT falls in the range that expo treats as a command key
rather than passing through.

Move the shortcut-key detection into bootmenu_loop() where it is
only used in the bootmenu context.

Fixes: 8c986521c3 ("cmd: bootmenu: permit to select bootmenu entry with a shortcut")
Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-03-03 10:34:52 -06:00
Hugo VilleneuveandTom Rini e15b78bcf7 drivers: cpu: fix syntax error in Kconfig documentation
Replace then -> they so that the sentence makes sense.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-03 10:34:49 -06:00
Romain GantoisandTom Rini 39e1ccc777 dm: core: Don't allow ofnode_to_fdt() to return NULL
The ofnode_to_fdt() function may return a NULL pointer in multiple cases.
Or, this function's return value is often passed directly to functions such
as fdt_getprop() which end up dereferencing it, thus causing a NULL pointer
exception.

Don't allow ofnode_to_fdt() to return NULL, to avoid a NULL pointer
dereference.

Reviewed-by: Raphaël Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Romain Gantois <romain.gantois@bootlin.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-03-03 10:34:45 -06:00
Tom Rini c0ca147ac6 Merge tag 'u-boot-imx-next-20260228' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/29404

- Miscelanous improvements for Siemens Capricorn board.
- Convert i.MX6 IPUv3 driver to use clock framework.
- Skip voltage switching for fixed 1.8V regulator on fsl_esdhc_imx.
- Support printing imx8m pinmux.
- Enter fastboot on USB boot by default on phycore-imx93.
- Use arch override for env_get_location() on imx95.
2026-03-02 13:44:46 -06:00
Stefan EichenbergerandTom Rini 8d24789abe common/memsize.c: Fix get_ram_size() original data restore
The get_ram_size() function fails to restore the original RAM data when
the data cache is enabled. This issue was observed on an AM625 R5 SPL
with 512MB of RAM and is a regression that became visible with
commit bc07851897 ("board: ti: Pull redundant DDR functions to a common
location and Fixup DDR size when ECC is enabled").

Observed boot failure messages:
  Warning: Did not detect image signing certificate. Skipping authentication to prevent boot failure. This will fail on Security Enforcing(HS-SE) devices
  Authentication passed
  Starting ATF on ARM64 core...

The system then hangs. This indicates that without a data cache flush,
data in the cache is not coherent with RAM, preventing the system from
booting. This was verified by printing the content of this address when
the issue occurs.

Add a data cache flush after each restore operation to resolve this
issue.

Fixes: bc07851897 ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Fixes: 1c64b98c1e ("common/memsize.c: Fix get_ram_size() when cache is enabled")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Reviewed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Tested-by: Francesco Dolcini <francesco.dolcini@toradex.com> # Toradex Verdin AM62
2026-03-02 08:21:47 -06:00
Julien StephanandNeil Armstrong 47905f2846 drivers: ufs: remove unused ufs_post_bind() declaration
Commit 067c1b0332 ("ufs: Call ufs_scsi_bind() from uclass .post_bind")
inlined ufs_scsi_bind() into ufs_post_bind() as trivial
device_bind_driver() call.

ufs_scsi_bind() is no longer referenced anywhere in the codebase, so
drop its declaration from include/ufs.h.

Drivers used to include <ufs.h> to include prototype of ufs_scsi_bind()
function, so we can now safely remove such includes.

Fixes: 067c1b0332 ("ufs: Call ufs_scsi_bind() from uclass .post_bind")
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260203-cleanup-ufs-header-v1-1-4c10424485f0@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-03-02 15:20:02 +01:00
Igor BelwonandNeil Armstrong 25f1425431 phy: Add MediaTek UFS PHY Driver
This UFS M-PHY driver can be used on recent MediaTek SoCs as the
primary PHY for the UFS controller.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://patch.msgid.link/20251011-mtk-ufs-uboot-v1-1-a05f991ee150@mentallysanemainliners.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-03-02 15:19:17 +01:00
Padmarao BegariandNeil Armstrong 080b4f0995 ufs: Disable UTP command timeout in slow mode
When the UFS controller is operating in slow (PWM) mode,
the driver is disabled the timeout for UTP send commands.
In high-speed mode, the timeout remains enabled to
detect stalled or failed transfers. This change ensures reliable
operation in slow mode, where command completion may take longer
and timeouts are not required.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/e6deb9086afab9d2bdd53db8ecbc7db93af5204d.1764169598.git.michal.simek@amd.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2026-03-02 15:19:17 +01:00
Sébastien SzymanskiandFabio Estevam 56e5f5290f arm: imx: imx95: Use arch override for env_get_location()
Like commit b9e48705e0 ("arm: imx: imx9: Use arch override for
env_get_location()"), use arch-level implementation here so that
env_get_location() can be used on board-level.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
2026-02-28 15:35:19 -03:00
Peng FanandFabio Estevam 85d55a610e pinctrl: nxp: imx9: Guard pinctrl match table with CONFIG_IMX9[X]
The i.MX9 pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX9[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng FanandFabio Estevam ce4f470eb4 pinctrl: nxp: imx91: Support print pin muxing
Add support for printing pin names and current mux configuration on i.MX91
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX91
pads.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng FanandFabio Estevam 87cf5b3c89 pinctrl: nxp: imx93: Support print pin muxing
Add support for printing pin names and current mux configuration on
i.MX93 when CMD_PINMUX is enabled.

 - A full pin descriptor table for i.MX93 pads.
 - Implementation of get_pins_count(), get_pin_name(), and
   get_pin_muxing() in the i.MX9 pinctrl driver.

There is no good way to add real mux names, so just dump the function ID
from the mux register.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng FanandFabio Estevam 9c74ce7846 pinctrl: nxp: imx93: Rename to imx9
We are going to add pinctrl data support for both i.MX93 and i.MX91.
Since these SoCs share the same pinctrl driver structure, rename
pinctrl-imx93.c to a more generic pinctrl-imx9.c and update all related
variable and function names accordingly.

This prepares the driver for supporting additional i.MX9 family SoCs.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng FanandFabio Estevam d7a7653dfc pinctrl: nxp: imx8m: Guard pinctrl match table with CONFIG_IMX8M[X]
The i.MX8M pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX8M[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng FanandFabio Estevam 5a06dd2924 pinctrl: nxp: imx8mq: Support print pin muxing
Add support for printing pin names and current mux configuration on i.MX8MQ
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MQ
pads.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng FanandFabio Estevam 18a62c12e1 pinctrl: nxp: imx8mm: Support print pin muxing
Add support for printing pin names and current mux configuration on i.MX8MM
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MM
pads.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00
Peng FanandFabio Estevam b994cf0acf pinctrl: nxp: imx8mn: Support print pin muxing
Add support for printing pin names and current mux configuration on i.MX8MN
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MN
pads.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-02-28 15:31:59 -03:00