imx: Support i.MX91 11x11 EVK board
Add i.MX91 11x11 EVK Board support. - Four ddr scripts included w/o inline ecc feature. - SDHC/NETWORK/I2C/UART supported - PCA9451 supported, default nominal drive mode - Documentation added. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Peng Fan
Fabio Estevam
@@ -0,0 +1,195 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2024 NXP
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*/
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#include "imx91-u-boot.dtsi"
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/ {
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdog3>;
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bootph-pre-ram;
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bootph-some-ram;
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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};
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&{/soc@0} {
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bootph-all;
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bootph-pre-ram;
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};
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&aips1 {
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bootph-pre-ram;
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bootph-all;
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};
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&aips2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&aips3 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&iomuxc {
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bootph-pre-ram;
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bootph-some-ram;
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};
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®_usdhc2_vmmc {
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u-boot,off-on-delay-us = <20000>;
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_reg_usdhc2_vmmc {
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bootph-pre-ram;
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};
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&pinctrl_uart1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_usdhc1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_usdhc2_gpio {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_usdhc2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gpio1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gpio2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gpio3 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gpio4 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&lpuart1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&usdhc1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&usdhc2 {
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bootph-pre-ram;
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bootph-some-ram;
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fsl,signal-voltage-switch-extra-delay-ms = <8>;
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};
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&lpi2c1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&lpi2c2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&lpi2c3 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&{/soc@0/bus@44000000/i2c@44350000/pmic@25} {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&{/soc@0/bus@44000000/i2c@44350000/pmic@25/regulators} {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_lpi2c1 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_lpi2c2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl_lpi2c3 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&fec {
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compatible = "fsl,imx91-fec", "fsl,imx93-fec", "fsl,imx8mq-fec";
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phy-reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <15>;
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phy-reset-post-delay = <100>;
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};
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ðphy1 {
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reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
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reset-assert-us = <15000>;
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reset-deassert-us = <100000>;
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};
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&s4muap {
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bootph-pre-ram;
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bootph-some-ram;
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status = "okay";
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};
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&clk {
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bootph-all;
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bootph-pre-ram;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-rates;
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/delete-property/ assigned-clock-parents;
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};
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&osc_32k {
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bootph-all;
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bootph-pre-ram;
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};
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&osc_24m {
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bootph-all;
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bootph-pre-ram;
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};
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&clk_ext1 {
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bootph-all;
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bootph-pre-ram;
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};
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@@ -0,0 +1,92 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2023 Mathieu Othacehe <m.othacehe@gmail.com>
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*/
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/ {
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binman: binman {
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multiple-images;
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};
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};
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&A55_0 {
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clocks = <&clk IMX93_CLK_A55_SEL>;
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};
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&binman {
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u-boot-spl-ddr {
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align = <4>;
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align-size = <4>;
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filename = "u-boot-spl-ddr.bin";
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pad-byte = <0xff>;
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u-boot-spl {
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align-end = <4>;
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filename = "u-boot-spl.bin";
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};
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ddr-1d-imem-fw {
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filename = "lpddr4_imem_1d_v202201.bin";
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align-end = <4>;
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type = "blob-ext";
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};
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ddr-1d-dmem-fw {
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filename = "lpddr4_dmem_1d_v202201.bin";
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align-end = <4>;
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type = "blob-ext";
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};
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ddr-2d-imem-fw {
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filename = "lpddr4_imem_2d_v202201.bin";
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align-end = <4>;
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type = "blob-ext";
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};
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ddr-2d-dmem-fw {
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filename = "lpddr4_dmem_2d_v202201.bin";
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align-end = <4>;
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type = "blob-ext";
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};
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};
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spl {
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filename = "spl.bin";
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mkimage {
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args = "-n spl/u-boot-spl.cfgout -T imx8image -e 0x204A0000";
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blob {
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filename = "u-boot-spl-ddr.bin";
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};
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};
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};
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u-boot-container {
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filename = "u-boot-container.bin";
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mkimage {
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args = "-n u-boot-container.cfgout -T imx8image -e 0x0";
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blob {
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filename = "u-boot.bin";
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};
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};
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};
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imx-boot {
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filename = "flash.bin";
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pad-byte = <0x00>;
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spl: blob-ext@1 {
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filename = "spl.bin";
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offset = <0x0>;
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align-size = <0x400>;
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align = <0x400>;
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};
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uboot: blob-ext@2 {
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filename = "u-boot-container.bin";
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};
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};
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};
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@@ -29,6 +29,12 @@ choice
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prompt "NXP i.MX9 board select"
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optional
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config TARGET_IMX91_11X11_EVK
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bool "imx91_11x11_evk"
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select OF_BOARD_FIXUP
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select IMX91
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imply OF_UPSTREAM
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config TARGET_IMX93_9X9_QSB
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bool "imx93_qsb"
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select OF_BOARD_FIXUP
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@@ -56,6 +62,7 @@ config TARGET_PHYCORE_IMX93
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endchoice
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source "board/freescale/imx91_evk/Kconfig"
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source "board/freescale/imx93_evk/Kconfig"
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source "board/freescale/imx93_qsb/Kconfig"
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source "board/phytec/phycore_imx93/Kconfig"
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@@ -0,0 +1,19 @@
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if TARGET_IMX91_11X11_EVK
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config SYS_BOARD
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default "imx91_evk"
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config SYS_VENDOR
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default "freescale"
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config SYS_CONFIG_NAME
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default "imx91_evk"
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config IMX91_EVK_LPDDR4
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bool "Using LPDDR4 Timing and PMIC voltage"
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default y
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select IMX9_LPDDR4X
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help
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Select the LPDDR4 timing and 1.1V VDDQ
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endif
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@@ -0,0 +1,7 @@
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i.MX91 11x11 EVK BOARD
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M: Peng Fan <peng.fan@nxp.com>
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S: Maintained
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F: board/freescale/imx91_evk/
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F: include/configs/imx91_evk.h
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F: configs/imx91_11x11_evk_defconfig
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F: configs/imx91_11x11_evk_inline_ecc_defconfig
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@@ -0,0 +1,16 @@
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#
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# Copyright 2024 NXP
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += imx91_evk.o
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ifdef CONFIG_XPL_BUILD
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obj-y += spl.o
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ifdef CONFIG_IMX9_DRAM_INLINE_ECC
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obj-$(CONFIG_IMX91_EVK_LPDDR4) += lpddr4_timing_2400mts_ecc.o lpddr4_timing_1600mts_ecc.o
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else
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obj-$(CONFIG_IMX91_EVK_LPDDR4) += lpddr4_timing_2400mts.o lpddr4_timing_1600mts.o
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endif
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endif
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@@ -0,0 +1,33 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2024 NXP
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*/
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#include <env.h>
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#include <init.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <asm/arch/sys_proto.h>
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int board_init(void)
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{
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return 0;
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}
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int board_late_init(void)
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{
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#ifdef CONFIG_ENV_IS_IN_MMC
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board_late_mmc_env_init();
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#endif
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env_set("sec_boot", "no");
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#ifdef CONFIG_AHAB_BOOT
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env_set("sec_boot", "yes");
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#endif
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#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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env_set("board_name", "11X11_EVK");
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env_set("board_rev", "iMX93");
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#endif
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return 0;
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}
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@@ -0,0 +1,63 @@
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/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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boot_targets=mmc0 mmc1
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boot_fit=no
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bootm_size=0x10000000
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cntr_addr=0x98000000
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cntr_file=os_cntr_signed.bin
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console=ttyLP0,115200 earlycon
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fdt_addr_r=0x83000000
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fdt_addr=0x83000000
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fdtfile=CONFIG_DEFAULT_FDT_FILE
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image=Image
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mmcpart=1
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mmcroot=/dev/mmcblk1p2 rootwait rw
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mmcautodetect=yes
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mmcargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot}
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prepare_mcore=setenv mcore_clk clk-imx93.mcore_booted
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loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
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loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}
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loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file}
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auth_os=auth_cntr ${cntr_addr}
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boot_os=booti ${loadaddr} - ${fdt_addr_r}
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mmcboot=
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echo Booting from mmc ...;
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run mmcargs;
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if test ${sec_boot} = yes; then
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if run auth_os; then
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run boot_os;
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else
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echo ERR: failed to authenticate;
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fi;
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else
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if run loadfdt; then
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run boot_os;
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else
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echo WARN: Cannot load the DT;
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fi;
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fi;
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netargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=/dev/nfs
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ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp
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netboot=
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echo Booting from net ...;
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run netargs;
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if test ${ip_dyn} = yes; then
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setenv get_cmd dhcp;
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else
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setenv get_cmd tftp;
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fi;
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if test ${sec_boot} = yes; then
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${get_cmd} ${cntr_addr} ${cntr_file};
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if run auth_os; then
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run boot_os;
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else
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echo ERR: failed to authenticate;
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fi;
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else
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${get_cmd} ${loadaddr} ${image};
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if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then
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run boot_os;
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else
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echo WARN: Cannot load the DT;
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fi;
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fi;
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,167 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2024 NXP
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*/
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#include <command.h>
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#include <cpu_func.h>
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#include <hang.h>
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#include <image.h>
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#include <init.h>
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#include <log.h>
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#include <spl.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/mu.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/arch-mx7ulp/gpio.h>
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#include <asm/mach-imx/ele_api.h>
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#include <asm/mach-imx/syscounter.h>
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#include <asm/sections.h>
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#include <dm/uclass.h>
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#include <dm/device.h>
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#include <dm/uclass-internal.h>
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#include <dm/device-internal.h>
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#include <linux/delay.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/ccm_regs.h>
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#include <asm/arch/ddr.h>
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#include <power/pmic.h>
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#include <power/pca9450.h>
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#include <asm/arch/trdc.h>
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DECLARE_GLOBAL_DATA_PTR;
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int spl_board_boot_device(enum boot_device boot_dev_spl)
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{
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return BOOT_DEVICE_BOOTROM;
|
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}
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||||
|
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void spl_board_init(void)
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{
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||||
int ret;
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ret = ele_start_rng();
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if (ret)
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printf("Fail to start RNG: %d\n", ret);
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puts("Normal Boot\n");
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||||
}
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||||
|
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extern struct dram_timing_info dram_timing_1600mts;
|
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void spl_dram_init(void)
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{
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struct dram_timing_info *ptiming = &dram_timing;
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||||
|
||||
if (is_voltage_mode(VOLT_LOW_DRIVE))
|
||||
ptiming = &dram_timing_1600mts;
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||||
|
||||
printf("DDR: %uMTS\n", ptiming->fsp_msg[0].drate);
|
||||
ddr_init(ptiming);
|
||||
}
|
||||
|
||||
#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
|
||||
int power_init_board(void)
|
||||
{
|
||||
struct udevice *dev;
|
||||
int ret;
|
||||
unsigned int val = 0, buck_val;
|
||||
|
||||
ret = pmic_get("pmic@25", &dev);
|
||||
if (ret == -ENODEV) {
|
||||
puts("ERROR: Get PMIC PCA9451A failed!\n");
|
||||
return ret;
|
||||
}
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
/* BUCKxOUT_DVS0/1 control BUCK123 output */
|
||||
pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
|
||||
|
||||
/* enable DVS control through PMIC_STBY_REQ */
|
||||
pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
|
||||
|
||||
ret = pmic_reg_read(dev, PCA9450_PWR_CTRL);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
val = ret;
|
||||
|
||||
if (is_voltage_mode(VOLT_LOW_DRIVE)) {
|
||||
buck_val = 0x0c; /* 0.8V for Low drive mode */
|
||||
printf("PMIC: Low Drive Voltage Mode\n");
|
||||
} else if (is_voltage_mode(VOLT_NOMINAL_DRIVE)) {
|
||||
buck_val = 0x10; /* 0.85V for Nominal drive mode */
|
||||
printf("PMIC: Nominal Voltage Mode\n");
|
||||
} else {
|
||||
buck_val = 0x14; /* 0.9V for Over drive mode */
|
||||
printf("PMIC: Over Drive Voltage Mode\n");
|
||||
}
|
||||
|
||||
if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) {
|
||||
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val);
|
||||
pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val);
|
||||
} else {
|
||||
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val + 0x4);
|
||||
pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val + 0x4);
|
||||
}
|
||||
|
||||
/* Set VDDQ to 1.1V from buck2 (buck2 not used for iMX91 EVK) */
|
||||
pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x28);
|
||||
|
||||
/* set standby voltage to 0.65V */
|
||||
if (val & PCA9450_REG_PWRCTRL_TOFF_DEB)
|
||||
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x0);
|
||||
else
|
||||
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4);
|
||||
|
||||
/* I2C_LT_EN*/
|
||||
pmic_reg_write(dev, 0xa, 0x3);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
void board_init_f(ulong dummy)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* Clear the BSS. */
|
||||
memset(__bss_start, 0, __bss_end - __bss_start);
|
||||
|
||||
timer_init();
|
||||
|
||||
arch_cpu_init();
|
||||
|
||||
spl_early_init();
|
||||
|
||||
preloader_console_init();
|
||||
|
||||
ret = imx9_probe_mu();
|
||||
if (ret) {
|
||||
printf("Fail to init ELE API\n");
|
||||
} else {
|
||||
debug("SOC: 0x%x\n", gd->arch.soc_rev);
|
||||
debug("LC: 0x%x\n", gd->arch.lifecycle);
|
||||
}
|
||||
|
||||
clock_init_late();
|
||||
|
||||
power_init_board();
|
||||
|
||||
if (!is_voltage_mode(VOLT_LOW_DRIVE))
|
||||
set_arm_clk(get_cpu_speed_grade_hz());
|
||||
|
||||
/* Init power of mix */
|
||||
soc_power_init();
|
||||
|
||||
/* Setup TRDC for DDR access */
|
||||
trdc_init();
|
||||
|
||||
/* DDR initialization */
|
||||
spl_dram_init();
|
||||
|
||||
board_init_r(NULL, 0);
|
||||
}
|
||||
@@ -0,0 +1,145 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_IMX9=y
|
||||
CONFIG_TEXT_BASE=0x80200000
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x18000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_ENV_SOURCE_FILE="imx91_evk"
|
||||
CONFIG_SF_DEFAULT_SPEED=40000000
|
||||
CONFIG_ENV_SIZE=0x4000
|
||||
CONFIG_ENV_OFFSET=0x700000
|
||||
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx91-11x11-evk"
|
||||
CONFIG_TARGET_IMX91_11X11_EVK=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
CONFIG_SYS_MONITOR_LEN=524288
|
||||
CONFIG_SPL_SERIAL=y
|
||||
CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL_STACK=0x204E0000
|
||||
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_TEXT_BASE=0x204A0000
|
||||
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
||||
CONFIG_SPL_BSS_START_ADDR=0x20498000
|
||||
CONFIG_SPL_BSS_MAX_SIZE=0x2000
|
||||
CONFIG_SYS_LOAD_ADDR=0x80400000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_CMD_DEKBLOB=y
|
||||
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
|
||||
CONFIG_SYS_MEMTEST_START=0x80000000
|
||||
CONFIG_SYS_MEMTEST_END=0x90000000
|
||||
CONFIG_REMAKE_ELF=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_OF_SYSTEM_SETUP=y
|
||||
CONFIG_DEFAULT_FDT_FILE="imx91-11x11-evk.dtb"
|
||||
CONFIG_SYS_CBSIZE=2048
|
||||
CONFIG_SYS_PBSIZE=2074
|
||||
CONFIG_ARCH_MISC_INIT=y
|
||||
CONFIG_BOARD_LATE_INIT=y
|
||||
CONFIG_SPL_MAX_SIZE=0x26000
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
CONFIG_SPL_BOOTROM_SUPPORT=y
|
||||
CONFIG_SPL_LOAD_IMX_CONTAINER=y
|
||||
CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/container.cfg"
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
CONFIG_SPL_SYS_MALLOC=y
|
||||
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
|
||||
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x83200000
|
||||
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_POWER=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_SYS_PROMPT="u-boot=> "
|
||||
CONFIG_CMD_CPU=y
|
||||
CONFIG_CMD_ERASEENV=y
|
||||
CONFIG_CMD_NVEDIT_EFI=y
|
||||
CONFIG_CRC32_VERIFY=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_CMD_CLK=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_FUSE=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_POWEROFF=y
|
||||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_EFIDEBUG=y
|
||||
CONFIG_CMD_RTC=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_GETTIME=y
|
||||
CONFIG_CMD_TIMER=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_NOWHERE=y
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_SYS_MMC_ENV_DEV=1
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_USE_ETHPRIME=y
|
||||
CONFIG_ETHPRIME="eth1"
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_ADC=y
|
||||
CONFIG_ADC_IMX93=y
|
||||
CONFIG_CLK_IMX93=y
|
||||
CONFIG_CPU=y
|
||||
CONFIG_CPU_IMX=y
|
||||
CONFIG_SAVED_DRAM_TIMING_BASE=0x2049C000
|
||||
CONFIG_IMX_RGPIO2P=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_ADP5585_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_IMX_LPI2C=y
|
||||
CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_MMC_IO_VOLTAGE=y
|
||||
CONFIG_MMC_UHS_SUPPORT=y
|
||||
CONFIG_MMC_HS400_ES_SUPPORT=y
|
||||
CONFIG_MMC_HS400_SUPPORT=y
|
||||
CONFIG_FSL_USDHC=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
CONFIG_DWC_ETH_QOS_IMX=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_PINCTRL_IMX93=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_DM_PMIC_PCA9450=y
|
||||
CONFIG_SPL_DM_PMIC_PCA9450=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_PCA9450=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_DM_RTC=y
|
||||
CONFIG_RTC_EMULATION=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_FSL_LPUART=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_NXP_FSPI=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SYSRESET_CMD_POWEROFF=y
|
||||
CONFIG_SYSRESET_PSCI=y
|
||||
CONFIG_ULP_WATCHDOG=y
|
||||
CONFIG_WDT=y
|
||||
CONFIG_SHA384=y
|
||||
CONFIG_LZO=y
|
||||
CONFIG_BZIP2=y
|
||||
@@ -0,0 +1,146 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_IMX9=y
|
||||
CONFIG_TEXT_BASE=0x80200000
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x18000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_ENV_SOURCE_FILE="imx91_evk"
|
||||
CONFIG_SF_DEFAULT_SPEED=40000000
|
||||
CONFIG_ENV_SIZE=0x4000
|
||||
CONFIG_ENV_OFFSET=0x700000
|
||||
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx91-11x11-evk"
|
||||
CONFIG_TARGET_IMX91_11X11_EVK=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
CONFIG_SYS_MONITOR_LEN=524288
|
||||
CONFIG_SPL_SERIAL=y
|
||||
CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL_STACK=0x204E0000
|
||||
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_SPL_TEXT_BASE=0x204A0000
|
||||
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
||||
CONFIG_SPL_BSS_START_ADDR=0x20498000
|
||||
CONFIG_SPL_BSS_MAX_SIZE=0x2000
|
||||
CONFIG_SYS_LOAD_ADDR=0x80400000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_CMD_DEKBLOB=y
|
||||
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
|
||||
CONFIG_SYS_MEMTEST_START=0x80000000
|
||||
CONFIG_SYS_MEMTEST_END=0x90000000
|
||||
CONFIG_REMAKE_ELF=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_OF_SYSTEM_SETUP=y
|
||||
CONFIG_DEFAULT_FDT_FILE="imx91-11x11-evk.dtb"
|
||||
CONFIG_SYS_CBSIZE=2048
|
||||
CONFIG_SYS_PBSIZE=2074
|
||||
CONFIG_ARCH_MISC_INIT=y
|
||||
CONFIG_BOARD_LATE_INIT=y
|
||||
CONFIG_SPL_MAX_SIZE=0x26000
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
CONFIG_SPL_BOOTROM_SUPPORT=y
|
||||
CONFIG_SPL_LOAD_IMX_CONTAINER=y
|
||||
CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/container.cfg"
|
||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||
CONFIG_SPL_SYS_MALLOC=y
|
||||
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
|
||||
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x83200000
|
||||
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_POWER=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_SYS_PROMPT="u-boot=> "
|
||||
CONFIG_CMD_CPU=y
|
||||
CONFIG_CMD_ERASEENV=y
|
||||
CONFIG_CMD_NVEDIT_EFI=y
|
||||
CONFIG_CRC32_VERIFY=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_CMD_CLK=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_FUSE=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_POWEROFF=y
|
||||
CONFIG_CMD_SNTP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_EFIDEBUG=y
|
||||
CONFIG_CMD_RTC=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_GETTIME=y
|
||||
CONFIG_CMD_TIMER=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_NOWHERE=y
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_SYS_MMC_ENV_DEV=1
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_USE_ETHPRIME=y
|
||||
CONFIG_ETHPRIME="eth1"
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_ADC=y
|
||||
CONFIG_ADC_IMX93=y
|
||||
CONFIG_CLK_IMX93=y
|
||||
CONFIG_CPU=y
|
||||
CONFIG_CPU_IMX=y
|
||||
CONFIG_SAVED_DRAM_TIMING_BASE=0x2049C000
|
||||
CONFIG_IMX9_DRAM_INLINE_ECC=y
|
||||
CONFIG_IMX_RGPIO2P=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_ADP5585_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_IMX_LPI2C=y
|
||||
CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_MMC_IO_VOLTAGE=y
|
||||
CONFIG_MMC_UHS_SUPPORT=y
|
||||
CONFIG_MMC_HS400_ES_SUPPORT=y
|
||||
CONFIG_MMC_HS400_SUPPORT=y
|
||||
CONFIG_FSL_USDHC=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_PHY_ANEG_TIMEOUT=20000
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
CONFIG_DWC_ETH_QOS_IMX=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_PINCTRL_IMX93=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_DM_PMIC_PCA9450=y
|
||||
CONFIG_SPL_DM_PMIC_PCA9450=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_PCA9450=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_DM_RTC=y
|
||||
CONFIG_RTC_EMULATION=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_FSL_LPUART=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_NXP_FSPI=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SYSRESET_CMD_POWEROFF=y
|
||||
CONFIG_SYSRESET_PSCI=y
|
||||
CONFIG_ULP_WATCHDOG=y
|
||||
CONFIG_WDT=y
|
||||
CONFIG_SHA384=y
|
||||
CONFIG_LZO=y
|
||||
CONFIG_BZIP2=y
|
||||
@@ -0,0 +1,70 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
imx91_11x11_EVK
|
||||
=======================
|
||||
|
||||
U-Boot for the NXP i.MX91 11x11 EVK
|
||||
|
||||
Quick Start
|
||||
-----------
|
||||
|
||||
- Get and Build the ARM Trusted firmware
|
||||
- Get the DDR firmware
|
||||
- Get ahab-container.img
|
||||
- Build U-Boot
|
||||
- Boot
|
||||
|
||||
Get and Build the ARM Trusted firmware
|
||||
--------------------------------------
|
||||
|
||||
Note: srctree is U-Boot source directory
|
||||
Get ATF from: https://github.com/nxp-imx/imx-atf/
|
||||
branch: lf_v2.10
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ unset LDFLAGS
|
||||
$ make PLAT=imx91 bl31
|
||||
$ cp build/imx91/release/bl31.bin $(srctree)
|
||||
|
||||
Get the DDR firmware
|
||||
--------------------
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin
|
||||
$ chmod +x firmware-imx-8.21.bin
|
||||
$ ./firmware-imx-8.21.bin
|
||||
$ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
|
||||
|
||||
Get ahab-container.img
|
||||
---------------------------------------
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-1.3.0-17945fc.bin
|
||||
$ chmod +x firmware-ele-imx-1.3.0-17945fc.bin
|
||||
$ ./firmware-ele-imx-1.3.0-17945fc.bin
|
||||
$ cp firmware-ele-imx-1.3.0-17945fc/mx91a0-ahab-container.img $(srctree)
|
||||
|
||||
Build U-Boot
|
||||
------------
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ export CROSS_COMPILE=aarch64-poky-linux-
|
||||
$ make imx91_11x11_evk_defconfig or imx91_11x11_evk_inline_ecc_defconfig
|
||||
$ make
|
||||
|
||||
- Inline ECC is to enable DDR ECC feature with imx91_11x11_evk_inline_ecc_defconfig
|
||||
|
||||
Burn the flash.bin to MicroSD card offset 32KB:
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
|
||||
|
||||
Boot
|
||||
----
|
||||
|
||||
Set Boot switch to SD boot
|
||||
@@ -12,6 +12,7 @@ NXP Semiconductors
|
||||
imx8mq_evk
|
||||
imx8qxp_mek
|
||||
imx8ulp_evk
|
||||
imx91_11x11_evk
|
||||
imx93_9x9_qsb
|
||||
imx93_11x11_evk
|
||||
imxrt1020-evk
|
||||
|
||||
@@ -0,0 +1,21 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright 2024 NXP
|
||||
*/
|
||||
|
||||
#ifndef __IMX91_EVK_H
|
||||
#define __IMX91_EVK_H
|
||||
|
||||
#define CFG_SYS_UBOOT_BASE \
|
||||
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
|
||||
|
||||
#define CFG_SYS_INIT_RAM_ADDR 0x80000000
|
||||
#define CFG_SYS_INIT_RAM_SIZE 0x200000
|
||||
|
||||
#define CFG_SYS_SDRAM_BASE 0x80000000
|
||||
#define PHYS_SDRAM 0x80000000
|
||||
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
|
||||
|
||||
#define WDOG_BASE_ADDR WDG3_BASE_ADDR
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user