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Merge tag 'u-boot-stm32-20251205' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

Browse Source 
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/28641

_ update LED management for STMicroelectronics boards
_ Add 1 GiB DRAM support for STM32MP13x DHCOR SoM
_ Fix 512 MiB DRAM support for STM32MP13x DHCOR SoM
_ Fix handling OPTEE in middle of the DRAM
_ Add missing debug UART build for STM32MP1 DHSOM
This commit is contained in:
Tom Rini
2025-12-05 08:33:49 -06:00
parent 59f9fcc1f5 b6e61ec062
commit ff258d03b9
33 changed files with 169 additions and 184 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/dts/stm32mp13-ddr3-dhsom-1x2Gb-1066-binG.dtsi
+3 -3
View File
@@ -3,13 +3,13 @@
* Copyright (C) 2025, DH electronics - All Rights Reserved
*
* STM32MP13xx DHSOM configuration
* 1x DDR3L 1Gb, 16-bit, 533MHz, Single Die Package in flyby topology.
* Reference used W631GU6MB15I from Winbond
* 1x DDR3L 4Gb, 16-bit, 533MHz, Single Die Package in flyby topology.
* Reference used W634GU6RB11I from Winbond
*
* DDR type / Platform DDR3/3L
* freq 533MHz
* width 16
* datasheet 0 = W631GU6MB15I / DDR3-1333
* datasheet 0 = W634GU6RB11I / DDR3-1866
* DDR density 2
* timing mode optimized
* address mapping : RBC
arch/arm/dts/stm32mp13-ddr3-dhsom-1x4Gb-1066-binG.dtsi
+100
View File
@@ -0,0 +1,100 @@
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* Copyright (C) 2025, DH electronics - All Rights Reserved
*
* STM32MP13xx DHSOM configuration
* 1x DDR3L 8Gb, 16-bit, 533MHz, Single Die Package in flyby topology.
* Reference used W638GU6QB11I from Winbond
*
* DDR type / Platform DDR3/3L
* freq 533MHz
* width 16
* datasheet 0 = W638GU6QB11I / DDR3-1866
* DDR density 4
* timing mode optimized
* address mapping : RBC
* Tc > + 85C : J
*/
#define DDR_MEM_COMPATIBLE ddr3l-dhsom-1066-888-bin-g-1x4gb-533mhz
#define DDR_MEM_NAME "DDR3-DDR3L 16bits 533000kHz"
#define DDR_MEM_SPEED 533000
#define DDR_MEM_SIZE 0x40000000
#define DDR_MSTR 0x00040401
#define DDR_MRCTRL0 0x00000010
#define DDR_MRCTRL1 0x00000000
#define DDR_DERATEEN 0x00000000
#define DDR_DERATEINT 0x00800000
#define DDR_PWRCTL 0x00000000
#define DDR_PWRTMG 0x00400010
#define DDR_HWLPCTL 0x00000000
#define DDR_RFSHCTL0 0x00210000
#define DDR_RFSHCTL3 0x00000000
#define DDR_RFSHTMG 0x0081008B
#define DDR_CRCPARCTL0 0x00000000
#define DDR_DRAMTMG0 0x121B2414
#define DDR_DRAMTMG1 0x000A041B
#define DDR_DRAMTMG2 0x0607080F
#define DDR_DRAMTMG3 0x0050400C
#define DDR_DRAMTMG4 0x07040607
#define DDR_DRAMTMG5 0x06060403
#define DDR_DRAMTMG6 0x02020002
#define DDR_DRAMTMG7 0x00000202
#define DDR_DRAMTMG8 0x00001005
#define DDR_DRAMTMG14 0x000000A0
#define DDR_ZQCTL0 0xC2000040
#define DDR_DFITMG0 0x02050105
#define DDR_DFITMG1 0x00000202
#define DDR_DFILPCFG0 0x07000000
#define DDR_DFIUPD0 0xC0400003
#define DDR_DFIUPD1 0x00000000
#define DDR_DFIUPD2 0x00000000
#define DDR_DFIPHYMSTR 0x00000000
#define DDR_ADDRMAP1 0x00080808
#define DDR_ADDRMAP2 0x00000000
#define DDR_ADDRMAP3 0x00000000
#define DDR_ADDRMAP4 0x00001F1F
#define DDR_ADDRMAP5 0x07070707
#define DDR_ADDRMAP6 0x07070707
#define DDR_ADDRMAP9 0x00000000
#define DDR_ADDRMAP10 0x00000000
#define DDR_ADDRMAP11 0x00000000
#define DDR_ODTCFG 0x06000600
#define DDR_ODTMAP 0x00000001
#define DDR_SCHED 0x00000F01
#define DDR_SCHED1 0x00000000
#define DDR_PERFHPR1 0x00000001
#define DDR_PERFLPR1 0x04000200
#define DDR_PERFWR1 0x08000400
#define DDR_DBG0 0x00000000
#define DDR_DBG1 0x00000000
#define DDR_DBGCMD 0x00000000
#define DDR_POISONCFG 0x00000000
#define DDR_PCCFG 0x00000010
#define DDR_PCFGR_0 0x00000000
#define DDR_PCFGW_0 0x00000000
#define DDR_PCFGQOS0_0 0x00100009
#define DDR_PCFGQOS1_0 0x00000020
#define DDR_PCFGWQOS0_0 0x01100B03
#define DDR_PCFGWQOS1_0 0x01000200
#define DDR_PGCR 0x01442E02
#define DDR_PTR0 0x0022AA5B
#define DDR_PTR1 0x04841104
#define DDR_PTR2 0x042DA068
#define DDR_ACIOCR 0x10400812
#define DDR_DXCCR 0x00000C40
#define DDR_DSGCR 0xF200011F
#define DDR_DCR 0x0000000B
#define DDR_DTPR0 0x36D477D0
#define DDR_DTPR1 0x098B00D8
#define DDR_DTPR2 0x10023600
#define DDR_MR0 0x00000830
#define DDR_MR1 0x00000000
#define DDR_MR2 0x00000208
#define DDR_MR3 0x00000000
#define DDR_ODTCR 0x00010000
#define DDR_ZQ0CR1 0x00000038
#define DDR_DX0GCR 0x0000CE81
#define DDR_DX1GCR 0x0000CE81
#include "stm32mp13-ddr.dtsi"
arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
-6
View File
@@ -11,8 +11,6 @@
};
config {
u-boot,boot-led = "led-blue";
u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "u-boot-env";
st,adc_usb_pd = <&adc1 6>, <&adc1 12>;
};
@@ -34,10 +32,6 @@
led-blue {
/delete-property/default-state;
};
led-red {
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
};
};
};
arch/arm/dts/stm32mp13xx-dhcor-u-boot.dtsi
+1
View File
@@ -6,6 +6,7 @@
#include <dt-bindings/clock/stm32mp13-clksrc.h>
#include "stm32mp13-u-boot.dtsi"
#include "stm32mp13-ddr3-dhsom-1x2Gb-1066-binG.dtsi"
#include "stm32mp13-ddr3-dhsom-1x4Gb-1066-binG.dtsi"
/ {
aliases {
arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi
-6
View File
@@ -13,8 +13,6 @@
};
config {
u-boot,boot-led = "led-blue";
u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "u-boot-env";
st,adc_usb_pd = <&adc1 18>, <&adc1 19>;
};
@@ -39,10 +37,6 @@
led-blue {
/delete-property/label;
};
led-red {
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
};
};
};
arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
-5
View File
@@ -15,8 +15,6 @@
};
config {
u-boot,boot-led = "led-blue";
u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "fip";
st,adc_usb_pd = <&adc1 18>, <&adc1 19>;
};
@@ -68,9 +66,6 @@
/delete-property/label;
};
led-red {
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
};
};
};
arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi
-14
View File
@@ -12,8 +12,6 @@
};
config {
u-boot,boot-led = "led-blue";
u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "u-boot-env";
};
@@ -32,18 +30,6 @@
gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
};
led {
compatible = "gpio-leds";
led-blue {
gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
};
led-red {
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
};
};
};
&uart4 {
arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
-14
View File
@@ -14,8 +14,6 @@
};
config {
u-boot,boot-led = "led-blue";
u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "fip";
};
@@ -57,18 +55,6 @@
gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
};
led {
compatible = "gpio-leds";
led-blue {
gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
};
led-red {
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
};
};
};
&clk_hse {
arch/arm/dts/stm32mp235f-dk-u-boot.dtsi
-1
View File
@@ -7,7 +7,6 @@
/ {
config {
u-boot,boot-led = "led-blue";
u-boot,mmc-env-partition = "u-boot-env";
};
arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi
-1
View File
@@ -7,7 +7,6 @@
/ {
config {
u-boot,boot-led = "led-blue";
u-boot,mmc-env-partition = "u-boot-env";
};
};
arch/arm/mach-stm32mp/dram_init.c
+3 -1
View File
@@ -65,6 +65,7 @@ int dram_init(void)
phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
{
phys_addr_t top = gd->ram_top;
phys_size_t size;
phys_addr_t reg;
u32 optee_start, optee_size;
@@ -86,7 +87,8 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
/* Reserved memory for OP-TEE at END of DDR for STM32MP1 SoC */
if (IS_ENABLED(CONFIG_STM32MP13X) || IS_ENABLED(CONFIG_STM32MP15X)) {
if (!optee_get_reserved_memory(&optee_start, &optee_size))
reg = ALIGN(optee_start - size, MMU_SECTION_SIZE);
if (optee_start + optee_size == top)
reg = ALIGN(optee_start - size, MMU_SECTION_SIZE);
}
/* before relocation, mark the U-Boot memory as cacheable by default */
arch/arm/mach-stm32mp/stm32mp1/cpu.c
+6 -5
View File
@@ -82,11 +82,12 @@ void dram_bank_mmu_setup(int bank)
i++) {
addr = i << MMU_SECTION_SHIFT;
option = DCACHE_DEFAULT_OPTION;
if (use_lmb &&
(lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP) ||
(gd->ram_top && addr >= gd->ram_top))
)
option = 0; /* INVALID ENTRY in TLB */
if (use_lmb) {
if (lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP))
continue;
if (gd->ram_top && addr >= gd->ram_top)
option = 0; /* INVALID ENTRY in TLB */
}
set_section_dcache(i, option);
}
}
board/dhelectronics/dh_stm32mp1/Makefile
+2
View File
@@ -3,6 +3,8 @@
# Copyright (C) 2018, STMicroelectronics - All Rights Reserved
#
obj-$(CONFIG_DEBUG_UART_BOARD_INIT) += ../../st/stm32mp1/debug_uart.o
obj-$(CONFIG_PMIC_STPMIC1) += ../../st/common/stpmic1.o
obj-y += board.o
board/dhelectronics/dh_stm32mp1/board.c
+21 -9
View File
@@ -304,17 +304,29 @@ static void board_get_coding_straps(void)
int board_stm32mp1_ddr_config_name_match(struct udevice *dev,
const char *name)
{
if (ddr3code == 1 &&
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x1gb-533mhz"))
return 0;
if (IS_ENABLED(CONFIG_TARGET_DH_STM32MP13X)) {
if (ddr3code == 1 &&
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-1x2gb-533mhz"))
return 0;
if (ddr3code == 2 &&
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x2gb-533mhz"))
return 0;
if (ddr3code == 2 &&
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-1x4gb-533mhz"))
return 0;
}
if (ddr3code == 3 &&
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x4gb-533mhz"))
return 0;
if (IS_ENABLED(CONFIG_TARGET_DH_STM32MP15X)) {
if (ddr3code == 1 &&
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x1gb-533mhz"))
return 0;
if (ddr3code == 2 &&
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x2gb-533mhz"))
return 0;
if (ddr3code == 3 &&
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x4gb-533mhz"))
return 0;
}
return -EINVAL;
}
board/st/stm32f429-discovery/Makefile
-1
View File
@@ -7,4 +7,3 @@
# Kamil Lulko, <kamil.lulko@gmail.com>
obj-y := stm32f429-discovery.o
obj-y += led.o
board/st/stm32f429-discovery/led.c
-39
View File
@@ -1,39 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2015
* Kamil Lulko, <kamil.lulko@gmail.com>
*/
#include <status_led.h>
#include <asm-generic/gpio.h>
#define RED_LED 110
#define GREEN_LED 109
void coloured_LED_init(void)
{
gpio_request(RED_LED, "red led");
gpio_direction_output(RED_LED, 0);
gpio_request(GREEN_LED, "green led");
gpio_direction_output(GREEN_LED, 0);
}
void red_led_off(void)
{
gpio_set_value(RED_LED, 0);
}
void green_led_off(void)
{
gpio_set_value(GREEN_LED, 0);
}
void red_led_on(void)
{
gpio_set_value(RED_LED, 1);
}
void green_led_on(void)
{
gpio_set_value(GREEN_LED, 1);
}
board/st/stm32mp1/stm32mp1.c
+4 -41
View File
@@ -247,41 +247,6 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
}
#endif /* CONFIG_USB_GADGET_DOWNLOAD */
static int get_led(struct udevice **dev, char *led_string)
{
const char *led_name;
int ret;
led_name = ofnode_conf_read_str(led_string);
if (!led_name) {
log_debug("could not find %s config string\n", led_string);
return -ENOENT;
}
ret = led_get_by_label(led_name, dev);
if (ret) {
log_debug("get=%d\n", ret);
return ret;
}
return 0;
}
static int setup_led(enum led_state_t cmd)
{
struct udevice *dev;
int ret;
if (!CONFIG_IS_ENABLED(LED))
return 0;
ret = get_led(&dev, "u-boot,boot-led");
if (ret)
return ret;
ret = led_set_state(dev, cmd);
return ret;
}
static void __maybe_unused led_error_blink(u32 nb_blink)
{
int ret;
@@ -292,9 +257,9 @@ static void __maybe_unused led_error_blink(u32 nb_blink)
return;
if (CONFIG_IS_ENABLED(LED)) {
ret = get_led(&led, "u-boot,error-led");
ret = led_get_by_label("red:status", &led);
if (!ret) {
/* make u-boot,error-led blinking */
/* make led "red:status" blinking */
/* if U32_MAX and 125ms interval, for 17.02 years */
for (i = 0; i < 2 * nb_blink; i++) {
led_set_state(led, LEDST_TOGGLE);
@@ -418,7 +383,7 @@ static int board_check_usb_power(void)
* If highest and lowest value are either both below
* USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
* means USB TYPE-C is in unattached mode, this is an issue, make
* u-boot,error-led blinking and stop boot process.
* led "red:status" blinking and stop boot process.
*/
if ((max_uV > USB_LOW_THRESHOLD_UV &&
min_uV > USB_LOW_THRESHOLD_UV) ||
@@ -672,8 +637,6 @@ int board_init(void)
if (IS_ENABLED(CONFIG_ARMV7_NONSEC))
sysconf_init();
setup_led(LEDST_ON);
#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
efi_guid_t image_type_guid = STM32MP_FIP_IMAGE_GUID;
@@ -736,7 +699,7 @@ int board_late_init(void)
void board_quiesce_devices(void)
{
setup_led(LEDST_OFF);
led_boot_off();
}
enum env_location env_get_location(enum env_operation op, int prio)
board/st/stm32mp2/stm32mp2.c
+1 -37
View File
@@ -58,41 +58,6 @@ int checkboard(void)
return 0;
}
static int get_led(struct udevice **dev, char *led_string)
{
const char *led_name;
int ret;
led_name = ofnode_conf_read_str(led_string);
if (!led_name) {
log_debug("could not find %s config string\n", led_string);
return -ENOENT;
}
ret = led_get_by_label(led_name, dev);
if (ret) {
log_debug("get=%d\n", ret);
return ret;
}
return 0;
}
static int setup_led(enum led_state_t cmd)
{
struct udevice *dev;
int ret;
if (!CONFIG_IS_ENABLED(LED))
return 0;
ret = get_led(&dev, "u-boot,boot-led");
if (ret)
return ret;
ret = led_set_state(dev, cmd);
return ret;
}
static void check_user_button(void)
{
struct udevice *button;
@@ -118,7 +83,6 @@ static void check_user_button(void)
/* board dependent setup after realloc */
int board_init(void)
{
setup_led(LEDST_ON);
check_user_button();
return 0;
@@ -222,5 +186,5 @@ int board_late_init(void)
void board_quiesce_devices(void)
{
setup_led(LEDST_OFF);
led_boot_off();
}
configs/stm32f429-discovery_defconfig
+3
View File
@@ -29,6 +29,9 @@ CONFIG_CMD_TIMER=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_NO_NET=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
configs/stm32f469-discovery_defconfig
+3
View File
@@ -29,6 +29,9 @@ CONFIG_CMD_TIMER=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_RELOC_GD_ENV_ADDR=y
CONFIG_NO_NET=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_ARM_PL180_MMCI=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
configs/stm32f746-disco_defconfig
+3
View File
@@ -37,6 +37,9 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_RELOC_GD_ENV_ADDR=y
CONFIG_NETCONSOLE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_ARM_PL180_MMCI=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
configs/stm32f769-disco_defconfig
+3
View File
@@ -38,6 +38,9 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_RELOC_GD_ENV_ADDR=y
CONFIG_NETCONSOLE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_ARM_PL180_MMCI=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
configs/stm32h743-disco_defconfig
+3
View File
@@ -32,5 +32,8 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_RELOC_GD_ENV_ADDR=y
CONFIG_NO_NET=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_STM32_SDMMC2=y
# CONFIG_PINCTRL_FULL is not set
configs/stm32h743-eval_defconfig
+3
View File
@@ -32,5 +32,8 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_RELOC_GD_ENV_ADDR=y
CONFIG_NO_NET=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_STM32_SDMMC2=y
# CONFIG_PINCTRL_FULL is not set
configs/stm32h747-disco_defconfig
+3
View File
@@ -32,5 +32,8 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_RELOC_GD_ENV_ADDR=y
CONFIG_NO_NET=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_STM32_SDMMC2=y
# CONFIG_PINCTRL_FULL is not set
configs/stm32mp13_defconfig
+1
View File
@@ -74,6 +74,7 @@ CONFIG_GPIO_HOG=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
configs/stm32mp15_basic_defconfig
+1
View File
@@ -123,6 +123,7 @@ CONFIG_HWSPINLOCK_STM32=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_STM32_FMC2_EBI=y
CONFIG_SUPPORT_EMMC_BOOT=y
configs/stm32mp15_defconfig
+1
View File
@@ -94,6 +94,7 @@ CONFIG_HWSPINLOCK_STM32=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_STM32_FMC2_EBI=y
CONFIG_SUPPORT_EMMC_BOOT=y
configs/stm32mp15_dhsom.config
-1
View File
@@ -2,7 +2,6 @@
# CONFIG_ARMV7_VIRT is not set
# CONFIG_BINMAN_FDT is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_SIZE_LIMIT=1441792
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_BOOTDELAY=1
configs/stm32mp15_trusted_defconfig
+1
View File
@@ -95,6 +95,7 @@ CONFIG_HWSPINLOCK_STM32=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_STM32_FMC2_EBI=y
CONFIG_SUPPORT_EMMC_BOOT=y
configs/stm32mp23_defconfig
+1
View File
@@ -55,6 +55,7 @@ CONFIG_GPIO_HOG=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
configs/stm32mp25_defconfig
+1
View File
@@ -61,6 +61,7 @@ CONFIG_GPIO_HOG=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
CONFIG_LED=y
CONFIG_LED_BOOT=y
CONFIG_LED_GPIO=y
CONFIG_STM32_OMM=y
CONFIG_SUPPORT_EMMC_BOOT=y
configs/stm32mp_dhsom.config
+1
View File
@@ -6,6 +6,7 @@
# CONFIG_SPL_PARTITION_UUIDS is not set
# CONFIG_SPL_PINCTRL_FULL is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_CMD_BOOTCOUNT=y