spi: cadence: Use reset_reset_bulk() for proper reset cycling
Use the new reset_reset_bulk() API to properly cycle reset signals during probe instead of just deasserting them. This ensures the controller is properly reset before initialization. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/92e614075d2c4820d3e4485aa0bdda11efd1f7ca.1779709539.git.michal.simek@amd.com
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@@ -31,6 +31,8 @@
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#define CQSPI_DISABLE_STIG_MODE BIT(0)
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#define CQSPI_DMA_MODE BIT(1)
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#define CQSPI_RESET_DELAY_US 10
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__weak int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv,
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const struct spi_mem_op *op)
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{
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@@ -256,19 +258,9 @@ static int cadence_spi_probe(struct udevice *bus)
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priv->resets = devm_reset_bulk_get_optional(bus);
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if (priv->resets) {
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/* Assert all OSPI reset lines */
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ret = reset_assert_bulk(priv->resets);
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ret = reset_reset_bulk(priv->resets, CQSPI_RESET_DELAY_US);
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if (ret) {
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dev_err(bus, "Failed to assert OSPI reset: %d\n", ret);
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return ret;
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}
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udelay(10);
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/* Deassert all OSPI reset lines */
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ret = reset_deassert_bulk(priv->resets);
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if (ret) {
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dev_err(bus, "Failed to deassert OSPI reset: %d\n", ret);
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dev_err(bus, "Failed to reset OSPI: %d\n", ret);
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return ret;
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}
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}
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