arm64: renesas: Use reset macro from common header

Clean up to avoid more reset macro duplication.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit is contained in:
Hai Pham
2025-11-06 20:09:59 +01:00
committed by Marek Vasut
parent 7786458612
commit eb5ffe54ad
3 changed files with 3 additions and 12 deletions
@@ -29,6 +29,8 @@
#define RST_BASE 0xE6160000 /* Domain0 */
#define RST_SRESCR0 (RST_BASE + 0x18)
#define RST_SPRES 0x5AA58000
#define RST_WDTRSTCR (RST_BASE + 0x10)
#define RST_RWDT 0xA55A8002
/* Arm Generic Timer */
#define CNTCR_BASE 0xE6080000
+1 -4
View File
@@ -8,6 +8,7 @@
#include <asm/io.h>
#include <asm/psci.h>
#include <asm/secure.h>
#include <asm/arch/renesas.h>
int __secure psci_features(u32 function_id, u32 psci_fid)
{
@@ -29,10 +30,6 @@ u32 __secure psci_version(void)
return ARM_PSCI_VER_0_2;
}
#define RST_BASE 0xE6160000 /* Domain0 */
#define RST_SRESCR0 (RST_BASE + 0x18)
#define RST_SPRES 0x5AA58000
void __secure __noreturn psci_system_reset(void)
{
writel(RST_SPRES, RST_SRESCR0);
-8
View File
@@ -16,10 +16,6 @@
#include <image.h>
#include <linux/errno.h>
#define RST_BASE 0xE6160000 /* Domain0 */
#define RST_WDTRSTCR (RST_BASE + 0x10)
#define RST_RWDT 0xA55A8002
DECLARE_GLOBAL_DATA_PTR;
static void init_generic_timer(void)
@@ -77,10 +73,6 @@ int board_init(void)
return 0;
}
#define RST_BASE 0xE6160000 /* Domain0 */
#define RST_SRESCR0 (RST_BASE + 0x18)
#define RST_SPRES 0x5AA58000
void __weak reset_cpu(void)
{
writel(RST_SPRES, RST_SRESCR0);