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arch: arm: dts: k3-j721s2-r5: Introduce k3-j721s2-r5.dtsi

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Create an SoC R5 dtsi file that could be used at board level R5 files. This
would help in keeping the SoC level changes in sync across board files.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
This commit is contained in:
Manorit Chawdhry
2024-05-16 15:00:38 -06:00
committed by Tom Rini
parent 30fee2a917
commit e84b004abc
4 changed files with 84 additions and 154 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/dts/k3-am68-sk-r5-base-board.dts
+1 -77
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@@ -9,80 +9,4 @@
#include "k3-j721s2-ddr-evm-lp4-4266.dtsi"
#include "k3-j721s2-ddr.dtsi"
#include "k3-am68-sk-base-board-u-boot.dtsi"
/ {
chosen {
tick-timer = &mcu_timer0;
};
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
};
a72_0: a72@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a90000 0x0 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 1>;
assigned-clocks = <&k3_clks 61 1>, <&k3_clks 202 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <2000000000>;
ti,sci = <&sms>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <3>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_mcu 21>,
<&secure_proxy_mcu 23>;
bootph-pre-ram;
};
};
&mcu_timer0 {
clock-frequency = <250000000>;
bootph-pre-ram;
};
&secure_proxy_mcu {
bootph-pre-ram;
status = "okay";
};
&secure_proxy_sa3 {
bootph-pre-ram;
status = "okay";
};
&cbass_mcu_wakeup {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>, <&secure_proxy_sa3 5>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&sms {
mboxes= <&secure_proxy_mcu 8>, <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
};
&mcu_ringacc {
ti,sci = <&dm_tifs>;
};
&mcu_udmap {
ti,sci = <&dm_tifs>;
};
#include "k3-j721s2-r5.dtsi"
arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
+1 -77
View File
@@ -9,80 +9,4 @@
#include "k3-j721s2-ddr-evm-lp4-4266.dtsi"
#include "k3-j721s2-ddr.dtsi"
#include "k3-j721s2-common-proc-board-u-boot.dtsi"
/ {
chosen {
tick-timer = &mcu_timer0;
};
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
};
a72_0: a72@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a90000 0x0 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 1>;
assigned-clocks = <&k3_clks 61 1>, <&k3_clks 202 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <2000000000>;
ti,sci = <&sms>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <3>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_mcu 21>,
<&secure_proxy_mcu 23>;
bootph-pre-ram;
};
};
&mcu_timer0 {
clock-frequency = <250000000>;
bootph-pre-ram;
};
&secure_proxy_sa3 {
bootph-pre-ram;
status = "okay";
};
&secure_proxy_mcu {
bootph-pre-ram;
status = "okay";
};
&cbass_mcu_wakeup {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>, <&secure_proxy_sa3 5>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&sms {
mboxes= <&secure_proxy_mcu 8>, <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
};
&mcu_ringacc {
ti,sci = <&dm_tifs>;
};
&mcu_udmap {
ti,sci = <&dm_tifs>;
};
#include "k3-j721s2-r5.dtsi"
arch/arm/dts/k3-j721s2-r5.dtsi
+81
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@@ -0,0 +1,81 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
chosen {
tick-timer = &mcu_timer0;
};
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
};
a72_0: a72@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a90000 0x0 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 1>;
assigned-clocks = <&k3_clks 61 1>, <&k3_clks 202 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <2000000000>;
ti,sci = <&sms>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <3>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_mcu 21>,
<&secure_proxy_mcu 23>;
bootph-pre-ram;
};
};
&mcu_timer0 {
clock-frequency = <250000000>;
bootph-pre-ram;
};
&secure_proxy_sa3 {
bootph-pre-ram;
status = "okay";
};
&secure_proxy_mcu {
bootph-pre-ram;
status = "okay";
};
&cbass_mcu_wakeup {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>, <&secure_proxy_sa3 5>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&sms {
mboxes= <&secure_proxy_mcu 8>, <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
};
&mcu_ringacc {
ti,sci = <&dm_tifs>;
};
&mcu_udmap {
ti,sci = <&dm_tifs>;
};
board/ti/j721s2/MAINTAINERS
+1
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@@ -14,6 +14,7 @@ F: arch/arm/dts/k3-j721s2-thermal.dtsi
F: arch/arm/dts/k3-j721s2-som-p0.dtsi
F: arch/arm/dts/k3-j721s2-common-proc-board.dts
F: arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
F: arch/arm/dts/k3-j721s2-r5.dtsi
F: arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
F: arch/arm/dts/k3-j721s2-ddr.dtsi
F: arch/arm/dts/k3-j721s2-ddr-evm-lp4-4266.dtsi