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net: sh_eth: arm: renesas: README: Drop CFG_SH_ETHER_PHY_ADDR

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Drop CFG_SH_ETHER_PHY_ADDR from README and configuration files, this
value is never used, PHY address is extracted from control DT instead.
No functional change intended.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit is contained in:
Marek Vasut
2025-07-10 19:26:56 +02:00
parent 397b5e9ce4
commit e583ea549e
12 changed files with 0 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files
README
-3
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@@ -379,9 +379,6 @@ The following options need to be configured:
CONFIG_SH_ETHER
Support for Renesas on-chip Ethernet controller
CFG_SH_ETHER_PHY_ADDR
Define the ETH PHY's address
- TPM Support:
CONFIG_TPM
Support TPM devices.
drivers/net/sh_eth.c
-4
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@@ -29,10 +29,6 @@
#include "sh_eth.h"
#ifndef CFG_SH_ETHER_PHY_ADDR
# error "Please define CFG_SH_ETHER_PHY_ADDR"
#endif
static void flush_cache_wback(void *addr, unsigned long len)
{
flush_dcache_range((unsigned long)addr,
include/configs/alt.h
-1
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@@ -21,7 +21,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SH Ether */
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
/* Board Clock */
include/configs/condor.h
-1
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@@ -14,7 +14,6 @@
/* Environment compatibility */
/* SH Ether */
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
/* Board Clock */
include/configs/gose.h
-1
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@@ -20,7 +20,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512u * 1024 * 1024)
/* SH Ether */
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
/* Board Clock */
include/configs/grpeach.h
-1
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@@ -17,7 +17,6 @@
#define CFG_SYS_SDRAM_SIZE (10 * 1024 * 1024)
/* Network interface */
#define CFG_SH_ETHER_PHY_ADDR 0
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#endif /* __GRPEACH_H */
include/configs/koelsch.h
-1
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@@ -20,7 +20,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SH Ether */
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
/* Board Clock */
include/configs/lager.h
-1
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@@ -21,7 +21,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SH Ether */
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
/* Board Clock */
include/configs/porter.h
-1
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@@ -22,7 +22,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024)
/* SH Ether */
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
/* Board Clock */
include/configs/silk.h
-1
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@@ -22,7 +22,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SH Ether */
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
/* Board Clock */
include/configs/stout.h
-1
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@@ -26,7 +26,6 @@
#define CFG_SCIF_A
/* SH Ether */
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
/* Board Clock */
include/configs/v3hsk.h
-1
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@@ -15,7 +15,6 @@
/* Environment compatibility */
/* SH Ether */
#define CFG_SH_ETHER_PHY_ADDR 0x0
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII_ID
/* Board Clock */