board: chagall: add Pegatron Chagall support

The Pegatron Chagall (originally built by Pegatron, but later rebranded by
other vendors under names Fujitsu Stylistic M532, Olivetti Olipad 3,
Siragon 4N, Realpad Bunaken, DNS AirTab P110w / P110g etc) is a mostly
business-oriented tablet sold in 2012 in different variants, mostly in
Europe, with slight differences in storage size (16GB/32GB) and presence
of built-in cellular modem.

Tested-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
This commit is contained in:
Svyatoslav Ryhel
2025-08-01 08:43:41 +03:00
parent 0106f051d7
commit d564f395bc
13 changed files with 1532 additions and 0 deletions
+1
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@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += \
tegra30-lg-p895.dtb \
tegra30-microsoft-surface-rt.dtb \
tegra30-ouya.dtb \
tegra30-pegatron-chagall.dtb \
tegra30-tec-ng.dtb \
tegra30-wexler-qc750.dtb \
tegra114-asus-tf701t.dtb \
File diff suppressed because it is too large Load Diff
+5
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@@ -16,6 +16,10 @@ config TARGET_CARDHU
bool "NVIDIA Tegra30 Cardhu evaluation board"
select BOARD_LATE_INIT
config TARGET_CHAGALL
bool "Pegatron Tegra30 Chagall board"
select BOARD_LATE_INIT
config TARGET_COLIBRI_T30
bool "Toradex Colibri T30 board"
select BOARD_LATE_INIT
@@ -64,6 +68,7 @@ config SYS_SOC
source "board/toradex/apalis_t30/Kconfig"
source "board/nvidia/beaver/Kconfig"
source "board/nvidia/cardhu/Kconfig"
source "board/pegatron/chagall/Kconfig"
source "board/toradex/colibri_t30/Kconfig"
source "board/htc/endeavoru/Kconfig"
source "board/asus/grouper/Kconfig"
+13
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@@ -0,0 +1,13 @@
if TARGET_CHAGALL
config SYS_BOARD
default "chagall"
config SYS_VENDOR
default "pegatron"
config TEGRA_BOARD_STRING
string "Default Tegra board name"
default "Pegatron Chagall"
endif
+7
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@@ -0,0 +1,7 @@
CHAGALL BOARD
M: Svyatoslav Ryhel <clamor95@gmail.com>
S: Maintained
F: arch/arm/dts/tegra30-pegatron-chagall.dts
F: board/pegatron/chagall/
F: configs/chagall_defconfig
F: doc/board/pegatron/chagall.rst
+11
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@@ -0,0 +1,11 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2010-2012
# NVIDIA Corporation <www.nvidia.com>
#
# (C) Copyright 2021
# Svyatoslav Ryhel <clamor95@gmail.com>
obj-$(CONFIG_XPL_BUILD) += chagall-spl.o
obj-y += chagall.o
+41
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@@ -0,0 +1,41 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Chagall SPL stage configuration
*
* (C) Copyright 2010-2013
* NVIDIA Corporation <www.nvidia.com>
*
* (C) Copyright 2021
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
#include <asm/arch/tegra.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
#define TPS65911_I2C_ADDR (0x2D << 1)
#define TPS65911_VDDCTRL_OP_REG 0x28
#define TPS65911_VDDCTRL_SR_REG 0x27
#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG)
#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG)
#define TPS62361B_I2C_ADDR (0x60 << 1)
#define TPS62361B_SET3_REG 0x03
#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG)
void pmic_enable_cpu_vdd(void)
{
/* Set VDD_CORE to 1.200V. */
tegra_i2c_ll_write(TPS62361B_I2C_ADDR, TPS62361B_SET3_DATA);
udelay(1000);
/*
* Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus.
* First set VDD to 1.0125V, then enable the VDD regulator.
*/
tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_OP_DATA);
udelay(1000);
tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_SR_DATA);
udelay(10 * 1000);
}
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@@ -0,0 +1,23 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2010-2013
* NVIDIA Corporation <www.nvidia.com>
*
* (C) Copyright 2021
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
/* Chagall derives from Cardhu board */
#include <fdt_support.h>
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
{
/* Remove TrustZone nodes */
fdt_del_node_and_alias(blob, "/firmware");
fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000");
return 0;
}
#endif
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@@ -0,0 +1,9 @@
button_cmd_0_name=Volume Down
button_cmd_0=bootmenu
bootmenu_0=mount external storage=usb start && ums 0 mmc 1; bootmenu
bootmenu_1=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu
bootmenu_2=reboot RCM=enterrcm
bootmenu_3=reboot=reset
bootmenu_4=power off=poweroff
bootmenu_delay=-1
+80
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@@ -0,0 +1,80 @@
CONFIG_ARM=y
CONFIG_ARCH_TEGRA=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_TEXT_BASE=0x80110000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SOURCE_FILE="chagall"
CONFIG_ENV_SIZE=0x3000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DEFAULT_DEVICE_TREE="tegra30-pegatron-chagall"
CONFIG_SPL_STACK=0x800ffffc
CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_TEGRA30=y
CONFIG_TARGET_CHAGALL=y
CONFIG_BUTTON_CMD=y
CONFIG_BOOTDELAY=0
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_KEYED_CTRLC=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="bootflow scan; echo 'Boot configuration not found... Power off in 3 sec'; sleep 3; poweroff"
CONFIG_SYS_PBSIZE=2084
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_HAVE_INIT_STACK=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80090000
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra30 (Chagall) # "
# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_POWEROFF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_UMS_ABORT_KEYED=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PAUSE=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
CONFIG_BUTTON=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x91000000
CONFIG_FASTBOOT_BUF_SIZE=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_SYS_I2C_TEGRA=y
CONFIG_BUTTON_KEYBOARD=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_TPS65910=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_TPS65911=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_SYSRESET_TPS65910=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_TEGRA=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_GADGET=y
CONFIG_CI_UDC=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_LOGO is not set
CONFIG_VIDEO_BRIDGE=y
CONFIG_VIDEO_BRIDGE_LVDS_CODEC=y
CONFIG_VIDEO_TEGRA=y
+1
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@@ -47,6 +47,7 @@ Board-specific doc
nxp/index
openpiton/index
ouya/index
pegatron/index
phytec/index
purism/index
qualcomm/index
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@@ -0,0 +1,41 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for the Pegatron Chagall tablet
======================================
Quick Start
-----------
- Build U-Boot
- Boot
Build U-Boot
------------
.. code-block:: bash
$ export CROSS_COMPILE=arm-none-eabi-
$ make chagall_defconfig
$ make
After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
image, ready for loading.
Boot
----
Currently, U-Boot can be preloaded into RAM via the Fusée Gelée. To enter
RCM protocol use ``power`` and ``volume up`` key combination from powered
off device. The host PC should recognize an APX device.
Built U-Boot ``u-boot-dtb-tegra.bin`` can be loaded from fusee-tools
directory with
.. code-block:: bash
$ ./run_bootloader.sh -s T30 -t ./bct/chagall.bct
To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
eMMC. Additionally, if the Volume Down button is pressed while loading, the
device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
as mass storage, fastboot, reboot, reboot RCM and poweroff.
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@@ -0,0 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
Pegatron
========
.. toctree::
:maxdepth: 2
chagall