CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29808

- Add env variables to assist boot for various LS boards
- Add gpio scmi driver
- Fix setting the function for scmi pinctrl
- Use standard device tree pin muxing format for scmi pinctrl
- Fix protocol version fetch for non-CCF platforms in scmi clk
This commit is contained in:
Tom Rini
2026-04-09 12:17:28 -06:00
17 changed files with 400 additions and 124 deletions
+6 -6
View File
@@ -341,6 +341,12 @@ static int scmi_clk_probe(struct udevice *dev)
if (ret)
return ret;
ret = scmi_generic_protocol_version(dev, SCMI_PROTOCOL_ID_CLOCK, &priv->version);
if (ret) {
dev_dbg(dev, "%s: get SCMI clock management protocol version failed\n", __func__);
return ret;
}
if (!CONFIG_IS_ENABLED(CLK_CCF))
return 0;
@@ -352,12 +358,6 @@ static int scmi_clk_probe(struct udevice *dev)
if (ret)
return ret;
ret = scmi_generic_protocol_version(dev, SCMI_PROTOCOL_ID_CLOCK, &priv->version);
if (ret) {
dev_dbg(dev, "%s: get SCMI clock management protocol version failed\n", __func__);
return ret;
}
clk_scmi_bulk = kzalloc(num_clocks * sizeof(*clk_scmi), GFP_KERNEL);
if (!clk_scmi_bulk)
return -ENOMEM;
+2
View File
@@ -259,6 +259,8 @@ static int scmi_pinctrl_settings_configure_helper(struct udevice *dev,
in->attr = 0;
in->attr |= FIELD_PREP(GENMASK(9, 2), num_configs);
in->attr |= FIELD_PREP(GENMASK(1, 0), select_type);
if (function_id != SCMI_PINCTRL_FUNCTION_NONE)
in->attr |= BIT(10);
memcpy(in->configs, configs, num_configs * sizeof(u32) * 2);
ret = devm_scmi_process_msg(dev, &msg);
+6
View File
@@ -732,6 +732,12 @@ config SLG7XL45106_I2C_GPO
8-bit gpo expander, all gpo lines are controlled by writing
value into data register.
config GPIO_SCMI
bool "SCMI GPIO pinctrl driver"
depends on DM_GPIO && PINCTRL_SCMI
help
Support pinctrl GPIO over the SCMI interface.
config ADP5585_GPIO
bool "ADP5585 GPIO driver"
depends on DM_GPIO && DM_I2C
+1
View File
@@ -78,6 +78,7 @@ obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
obj-$(CONFIG_ADP5588_GPIO) += adp5588_gpio.o
obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
obj-$(CONFIG_GPIO_SCMI) += gpio_scmi.o
obj-$(CONFIG_$(PHASE_)ADP5585_GPIO) += adp5585_gpio.o
obj-$(CONFIG_RZG2L_GPIO) += rzg2l-gpio.o
obj-$(CONFIG_MPFS_GPIO) += mpfs_gpio.o
+248
View File
@@ -0,0 +1,248 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2026 Linaro Ltd.
*/
#include <asm/gpio.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
#include <linux/list.h>
#include <scmi_protocols.h>
struct scmi_gpio_range {
u32 base;
u32 offset;
u32 npins;
struct list_head list;
};
static int bank_cnt;
struct scmi_gpio_priv {
struct udevice *pin_dev;
struct list_head gpio_ranges;
char *bank_name;
u32 num_pins;
u16 *pins;
};
static int scmi_gpio_request(struct udevice *dev, unsigned int offset, const char *label)
{
struct scmi_gpio_priv *priv = dev_get_priv(dev);
int pin;
int ret;
if (offset >= priv->num_pins)
return -EINVAL;
pin = priv->pins[offset];
ret = scmi_pinctrl_request(priv->pin_dev, SCMI_PIN, pin);
if (ret == -EOPNOTSUPP)
ret = 0;
if (ret)
dev_err(dev, "%s(): request failed: %d\n", __func__, ret);
return ret;
}
static int scmi_gpio_rfree(struct udevice *dev, unsigned int offset)
{
struct scmi_gpio_priv *priv = dev_get_priv(dev);
int pin;
int ret;
if (offset >= priv->num_pins)
return -EINVAL;
pin = priv->pins[offset];
ret = scmi_pinctrl_release(priv->pin_dev, SCMI_PIN, pin);
if (ret == -EOPNOTSUPP)
ret = 0;
if (ret)
dev_err(dev, "%s(): release failed: %d\n", __func__, ret);
return ret;
}
static int scmi_gpio_set_flags(struct udevice *dev, unsigned int offset, ulong flags)
{
struct scmi_gpio_priv *priv = dev_get_priv(dev);
const int MAX_FLAGS = 10;
u32 configs[MAX_FLAGS * 2];
int cnt = 0;
u32 pin;
if (offset >= priv->num_pins)
return -EINVAL;
pin = priv->pins[offset];
if (flags & GPIOD_IS_OUT) {
configs[cnt++] = SCMI_PIN_OUTPUT_MODE;
configs[cnt++] = 1;
configs[cnt++] = SCMI_PIN_OUTPUT_VALUE;
if (flags & GPIOD_IS_OUT_ACTIVE)
configs[cnt++] = 1;
else
configs[cnt++] = 0;
}
if (flags & GPIOD_IS_IN) {
configs[cnt++] = SCMI_PIN_INPUT_MODE;
configs[cnt++] = 1;
}
if (flags & GPIOD_OPEN_DRAIN) {
configs[cnt++] = SCMI_PIN_DRIVE_OPEN_DRAIN;
configs[cnt++] = 1;
}
if (flags & GPIOD_OPEN_SOURCE) {
configs[cnt++] = SCMI_PIN_DRIVE_OPEN_SOURCE;
configs[cnt++] = 1;
}
if (flags & GPIOD_PULL_UP) {
configs[cnt++] = SCMI_PIN_BIAS_PULL_UP;
configs[cnt++] = 1;
}
if (flags & GPIOD_PULL_DOWN) {
configs[cnt++] = SCMI_PIN_BIAS_PULL_DOWN;
configs[cnt++] = 1;
}
/* TODO: handle GPIOD_ACTIVE_LOW and GPIOD_IS_AF flags */
return scmi_pinctrl_settings_configure(priv->pin_dev, SCMI_PIN, pin,
cnt / 2, &configs[0]);
}
static int scmi_gpio_get_value(struct udevice *dev, unsigned int offset)
{
struct scmi_gpio_priv *priv = dev_get_priv(dev);
u32 value;
int pin;
int ret;
if (offset >= priv->num_pins)
return -EINVAL;
pin = priv->pins[offset];
ret = scmi_pinctrl_settings_get_one(priv->pin_dev, SCMI_PIN, pin,
SCMI_PIN_INPUT_VALUE, &value);
if (ret) {
dev_err(dev, "settings_get_one() failed: %d\n", ret);
return ret;
}
return value;
}
static int scmi_gpio_get_function(struct udevice *dev, unsigned int offset)
{
struct scmi_gpio_priv *priv = dev_get_priv(dev);
u32 value;
int pin;
int ret;
if (offset >= priv->num_pins)
return -EINVAL;
pin = priv->pins[offset];
ret = scmi_pinctrl_settings_get_one(priv->pin_dev, SCMI_PIN, pin,
SCMI_PIN_INPUT_MODE,
&value);
if (ret) {
dev_err(dev, "settings_get() failed %d\n", ret);
return ret;
}
if (value)
return GPIOF_INPUT;
return GPIOF_OUTPUT;
}
static const struct dm_gpio_ops scmi_gpio_ops = {
.request = scmi_gpio_request,
.rfree = scmi_gpio_rfree,
.set_flags = scmi_gpio_set_flags,
.get_value = scmi_gpio_get_value,
.get_function = scmi_gpio_get_function,
};
static int scmi_gpio_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct scmi_gpio_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args args;
struct scmi_gpio_range *range;
int index = 0;
int ret, i;
INIT_LIST_HEAD(&priv->gpio_ranges);
for (;; index++) {
ret = dev_read_phandle_with_args(dev, "gpio-ranges",
NULL, 3, index, &args);
if (ret)
break;
if (index == 0) {
ret = uclass_get_device_by_ofnode(UCLASS_PINCTRL,
args.node,
&priv->pin_dev);
if (ret) {
dev_err(dev, "failed to find pinctrl device: %d\n", ret);
return ret;
}
}
range = devm_kmalloc(dev, sizeof(*range), GFP_KERNEL);
if (!range)
return -ENOMEM;
range->base = args.args[0];
if (range->base != priv->num_pins) {
dev_err(dev, "no gaps allowed in between pins %d vs %d\n",
priv->num_pins, range->base);
return -EINVAL;
}
range->offset = args.args[1];
range->npins = args.args[2];
priv->num_pins += args.args[2];
list_add_tail(&range->list, &priv->gpio_ranges);
}
if (priv->num_pins == 0) {
dev_err(dev, "failed to registier pin-groups\n");
return -EINVAL;
}
priv->pins = devm_kzalloc(dev, priv->num_pins * sizeof(u16), GFP_KERNEL);
if (!priv->pins)
return -ENOMEM;
list_for_each_entry(range, &priv->gpio_ranges, list) {
for (i = 0; i < range->npins; i++)
priv->pins[range->base + i] = range->offset + i;
}
ret = snprintf(NULL, 0, "gpio_scmi%d_", bank_cnt);
uc_priv->bank_name = devm_kzalloc(dev, ret + 1, GFP_KERNEL);
if (!uc_priv->bank_name)
return -ENOMEM;
snprintf((char *)uc_priv->bank_name, ret + 1, "gpio_scmi%d_", bank_cnt);
bank_cnt++;
uc_priv->gpio_count = priv->num_pins;
return 0;
}
static const struct udevice_id scmi_gpio_match[] = {
{ .compatible = "scmi-pinctrl-gpio" },
{ }
};
U_BOOT_DRIVER(scmi_pinctrl_gpio) = {
.name = "scmi_pinctrl_gpio",
.id = UCLASS_GPIO,
.of_match = scmi_gpio_match,
.probe = scmi_gpio_probe,
.priv_auto = sizeof(struct scmi_gpio_priv),
.ops = &scmi_gpio_ops,
};
+31 -14
View File
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014 Freescale Semiconductor, Inc.
* Copyright 2017-2018, 2020-2021 NXP
* Copyright 2017-2018, 2020-2021, 2025 NXP
*/
#include <config.h>
#include <command.h>
@@ -72,6 +72,7 @@ static u64 mc_lazy_dpl_addr;
static u32 dpsparser_obj_id;
static u16 dpsparser_handle;
static char *mc_err_msg_apply_spb[] = MC_ERROR_MSG_APPLY_SPB;
static bool wait_for_dpl;
#ifdef DEBUG
void dump_ram_words(const char *title, void *addr)
@@ -653,7 +654,7 @@ static int load_mc_aiop_img(u64 aiop_fw_addr)
}
#endif
static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
static int wait_for_mc(u32 *final_reg_gsr)
{
u32 reg_gsr;
u32 mc_fw_boot_status;
@@ -792,7 +793,7 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
* Deassert reset and release MC core 0 to run
*/
out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
error = wait_for_mc(true, &reg_gsr);
error = wait_for_mc(&reg_gsr);
if (error != 0)
goto out;
@@ -855,13 +856,20 @@ int mc_apply_dpl(u64 mc_dpl_addr)
* Tell the MC to deploy the DPL:
*/
out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
printf("fsl-mc: Deploying data path layout ... ");
error = wait_for_mc(false, &reg_gsr);
if (!error)
mc_dpl_applied = 0;
/* Wait for the MC firmware to finish processing the DPL */
if (wait_for_dpl) {
printf("fsl-mc: Deploying data path layout ... ");
error = wait_for_mc(&reg_gsr);
if (error)
return error;
} else {
printf("fsl-mc: Started the DPL deploy process\n");
}
return error;
mc_dpl_applied = 0;
return 0;
}
int get_mc_boot_status(void)
@@ -1995,6 +2003,11 @@ static int do_fsl_mc(struct cmd_tbl *cmdtp, int flag, int argc,
* later from announce_and_cleanup().
*/
mc_lazy_dpl_addr = mc_dpl_addr;
wait_for_dpl = true;
if (argc >= 5 && strcmp(argv[4], "nowait") == 0)
wait_for_dpl = false;
break;
}
@@ -2023,6 +2036,10 @@ static int do_fsl_mc(struct cmd_tbl *cmdtp, int flag, int argc,
mc_apply_addr = simple_strtoull(argv[3], NULL, 16);
wait_for_dpl = true;
if (argc >= 5 && strcmp(argv[4], "nowait") == 0)
wait_for_dpl = false;
/* The user wants DPL applied now */
if (!fsl_mc_ldpaa_exit(NULL))
err = mc_apply_dpl(mc_apply_addr);
@@ -2070,12 +2087,12 @@ static int do_fsl_mc(struct cmd_tbl *cmdtp, int flag, int argc,
U_BOOT_CMD(
fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
"DPAA2 command to manage Management Complex (MC)",
"start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
"fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
"fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
"fsl_mc apply spb [spb_addr] - Apply SPB Soft Parser Blob\n"
"fsl_mc start aiop [FW_addr] - Start AIOP\n"
"fsl_mc dump_log - Dump MC Log\n"
"fsl_mc start mc <fw_addr> <DPC_addr> - Start the Management Complex firmware\n"
"fsl_mc apply dpl <dpl_addr> [nowait] - Apply the DPL (Data Path Layout) file\n"
"fsl_mc lazyapply dpl <DPL_addr> [nowait] - Apply the DPL (Data Path Layout) file on exit\n"
"fsl_mc apply spb <spb_addr> - Apply the SPB Soft Parser Blob\n"
"fsl_mc start aiop <fw_addr> - Start AIOP\n"
"fsl_mc dump_log - Dump the MC Log\n"
);
void mc_env_boot(void)
+58 -101
View File
@@ -33,20 +33,6 @@ static const struct pinconf_param pinctrl_scmi_conf_params[] = {
/* The SCMI spec also include "default", "pull-mode" and "input-value */
};
static bool valid_selector(struct udevice *dev, enum select_type select_type, u32 selector)
{
struct pinctrl_scmi_priv *priv = dev_get_priv(dev);
if (select_type == SCMI_PIN)
return selector < priv->num_pins;
if (select_type == SCMI_GROUP)
return selector < priv->num_groups;
if (select_type == SCMI_FUNCTION)
return selector < priv->num_functions;
return false;
}
static int pinctrl_scmi_get_pins_count(struct udevice *dev)
{
struct pinctrl_scmi_priv *priv = dev_get_priv(dev);
@@ -98,6 +84,38 @@ static const char *pinctrl_scmi_get_function_name(struct udevice *dev, unsigned
return (const char *)priv->function_info[selector].name;
}
static int pinctrl_scmi_get_function_id(struct udevice *dev, const char *function)
{
struct pinctrl_scmi_priv *priv = dev_get_priv(dev);
int i;
if (!function)
return -EINVAL;
for (i = 0; i < priv->num_functions; i++) {
if (strcmp(priv->function_info[i].name, function) == 0)
return i;
}
return -EINVAL;
}
static int pinctrl_scmi_get_group_id(struct udevice *dev, const char *group)
{
struct pinctrl_scmi_priv *priv = dev_get_priv(dev);
int i;
if (!group)
return -EINVAL;
for (i = 0; i < priv->num_groups; i++) {
if (strcmp(priv->group_info[i].name, group) == 0)
return i;
}
return -EINVAL;
}
static int pinctrl_scmi_pinmux_set(struct udevice *dev, u32 pin, u32 function)
{
struct pinctrl_scmi_priv *priv = dev_get_priv(dev);
@@ -120,96 +138,35 @@ static int pinctrl_scmi_pinmux_group_set(struct udevice *dev, u32 group, u32 fun
static int pinctrl_scmi_set_state(struct udevice *dev, struct udevice *config)
{
struct pinctrl_scmi_priv *priv = dev_get_priv(dev);
/* batch the setup into 20 lines at a go (there are 5 u32s in a config) */
const int batch_count = 20 * 5;
u32 prev_type = -1u;
u32 prev_selector;
u32 *configs;
const u32 *prop;
int offset, cnt, len;
int ret = 0;
int function_id, group_id;
const char *function;
const char **groups;
int group_count;
int ret;
int i;
prop = dev_read_prop(config, "pinmux", &len);
if (!prop)
return 0;
if (len % sizeof(u32) * 5) {
dev_err(dev, "invalid pin configuration: len=%d\n", len);
return -FDT_ERR_BADSTRUCTURE;
}
configs = kcalloc(batch_count, sizeof(u32), GFP_KERNEL);
if (!configs)
return -ENOMEM;
offset = 0;
cnt = 0;
while (offset + 4 < len / sizeof(u32)) {
u32 select_type = fdt32_to_cpu(prop[offset]);
u32 selector = fdt32_to_cpu(prop[offset + 1]);
u32 function = fdt32_to_cpu(prop[offset + 2]);
u32 config_type = fdt32_to_cpu(prop[offset + 3]);
u32 config_value = fdt32_to_cpu(prop[offset + 4]);
if (select_type > SCMI_GROUP ||
!valid_selector(dev, select_type, selector) ||
(function != SCMI_PINCTRL_FUNCTION_NONE &&
function > priv->num_functions)) {
dev_err(dev, "invalid pinctrl data (%u %u %u %u %u)\n",
select_type, selector, function, config_type,
config_value);
ret = -EINVAL;
goto free;
}
if (function != SCMI_PINCTRL_FUNCTION_NONE) {
if (cnt) {
ret = scmi_pinctrl_settings_configure(dev,
prev_type,
prev_selector,
cnt / 2, configs);
if (ret)
goto free;
prev_type = -1u;
cnt = 0;
}
scmi_pinctrl_set_function(dev, select_type, selector, function);
offset += 5;
continue;
}
if (cnt == batch_count)
goto set;
if (prev_type == -1u)
goto store;
if (select_type == prev_type && selector == prev_selector)
goto store;
set:
ret = scmi_pinctrl_settings_configure(dev, prev_type, prev_selector,
cnt / 2, configs);
if (ret)
goto free;
cnt = 0;
store:
prev_type = select_type;
prev_selector = selector;
configs[cnt++] = config_type;
configs[cnt++] = config_value;
offset += 5;
}
if (cnt)
ret = scmi_pinctrl_settings_configure(dev, prev_type, prev_selector,
cnt / 2, configs);
free:
kfree(configs);
ret = dev_read_string_index(config, "function", 0, &function);
if (ret)
dev_err(dev, "set_state() failed: %d\n", ret);
return ret;
return ret;
function_id = pinctrl_scmi_get_function_id(dev, function);
if (function_id < 0)
return function_id;
group_count = dev_read_string_list(config, "groups", &groups);
if (group_count < 0)
return group_count;
for (i = 0; i < group_count; i++) {
group_id = pinctrl_scmi_get_group_id(dev, groups[i]);
if (group_id < 0)
return group_id;
ret = pinctrl_scmi_pinmux_group_set(dev, group_id, function_id);
if (ret)
return ret;
}
return 0;
}
static int get_pin_muxing(struct udevice *dev, unsigned int selector,
+4
View File
@@ -54,6 +54,9 @@
"board=ls1028ardb\0" \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"fdtfile=fsl-ls1028a-rdb.dtb\0" \
"image=Image\0" \
"extra_bootargs=iommu.passthrough=1 arm-smmu.disable_bypass=0\0" \
"othbootargs=video=1920x1080-32@60 cma=640M\0" \
"ramdisk_addr=0x800000\0" \
"ramdisk_size=0x2000000\0" \
"bootm_size=0x10000000\0" \
@@ -76,6 +79,7 @@
"kernelhdr_addr_sd=0x3000\0" \
"kernelhdr_size_sd=0x20\0" \
"console=ttyS0,115200\0" \
"console_dbg=earlycon=uart8250,mmio,0x21c0500\0" \
BOOTENV \
"boot_scripts=ls1028ardb_boot.scr\0" \
"boot_script_hdr=hdr_ls1028ardb_bs.out\0" \
+1 -1
View File
@@ -88,7 +88,7 @@
#include <config_distro_bootcmd.h>
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
#define EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"initrd_high=0xffffffffffffffff\0" \
"kernel_addr=0x61000000\0" \
+5
View File
@@ -295,6 +295,11 @@
/*
* Environment
*/
#ifndef SPL_NO_MISC
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS
#endif
#include <asm/fsl_secure_boot.h>
+10
View File
@@ -201,4 +201,14 @@
#include <asm/fsl_secure_boot.h>
#ifndef SPL_NO_MISC
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS \
"board=ls1043ardb\0" \
"fdtfile=fsl-ls1043a-rdb-sdk.dtb\0" \
"image=Image\0" \
"console_dbg=earlycon=uart8250,mmio,0x21c0500\0"
#endif
#endif /* __LS1043ARDB_H__ */
+1 -1
View File
@@ -83,7 +83,7 @@
#endif
#ifndef SPL_NO_MISC
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
#define EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"ramdisk_addr=0x800000\0" \
"ramdisk_size=0x2000000\0" \
+6
View File
@@ -70,6 +70,12 @@
/*
* Environment
*/
#ifndef SPL_NO_MISC
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS
#endif
#define CFG_SYS_FSL_QSPI_BASE 0x40000000
#undef BOOT_TARGET_DEVICES
+5
View File
@@ -312,6 +312,11 @@
/*
* Environment
*/
#ifndef SPL_NO_MISC
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS
#endif
#ifdef CONFIG_TFABOOT
#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
+10
View File
@@ -131,4 +131,14 @@
#include <asm/fsl_secure_boot.h>
#ifndef SPL_NO_MISC
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS \
"board=ls1046ardb\0" \
"fdtfile=fsl-ls1046a-rdb-sdk.dtb\0" \
"image=Image\0" \
"console_dbg=earlycon=uart8250,mmio,0x21c0500\0"
#endif
#endif /* __LS1046ARDB_H__ */
+1 -1
View File
@@ -137,7 +137,7 @@
"kernelhdr_addr_sd=0x3000\0" \
"kernel_size_sd=0x14000\0" \
"kernelhdr_size_sd=0x20\0" \
"console=ttyAMA0,38400n8\0" \
"console=ttyAMA0,115200\0" \
BOOTENV \
"mcmemsize=0x70000000\0" \
XSPI_MC_INIT_CMD \
+5
View File
@@ -21,6 +21,11 @@
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
"board=lx2160ardb\0" \
"fdtfile=fsl-lx2160a-rdb.dtb\0" \
"image=Image\0" \
"extra_bootargs=pci=pcie_bus_perf\0" \
"console_dbg=earlycon=pl011,mmio32,0x21c0000\0" \
EXTRA_ENV_SETTINGS \
"boot_scripts=lx2160ardb_boot.scr\0" \
"boot_script_hdr=hdr_lx2160ardb_bs.out\0" \